au1000_ircc.h 3.7 KB

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  1. /*
  2. *
  3. * BRIEF MODULE DESCRIPTION
  4. * Au1000 IrDA driver.
  5. *
  6. * Copyright 2001 MontaVista Software Inc.
  7. * Author: MontaVista Software, Inc.
  8. * ppopov@mvista.com or source@mvista.com
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  16. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  18. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  21. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  22. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. *
  26. * You should have received a copy of the GNU General Public License along
  27. * with this program; if not, write to the Free Software Foundation, Inc.,
  28. * 675 Mass Ave, Cambridge, MA 02139, USA.
  29. */
  30. #ifndef AU1000_IRCC_H
  31. #define AU1000_IRCC_H
  32. #include <linux/time.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/pm.h>
  35. #include <asm/io.h>
  36. #define NUM_IR_IFF 1
  37. #define NUM_IR_DESC 64
  38. #define RING_SIZE_4 0x0
  39. #define RING_SIZE_16 0x3
  40. #define RING_SIZE_64 0xF
  41. #define MAX_NUM_IR_DESC 64
  42. #define MAX_BUF_SIZE 2048
  43. #define BPS_115200 0
  44. #define BPS_57600 1
  45. #define BPS_38400 2
  46. #define BPS_19200 5
  47. #define BPS_9600 11
  48. #define BPS_2400 47
  49. /* Ring descriptor flags */
  50. #define AU_OWN (1<<7) /* tx,rx */
  51. #define IR_DIS_CRC (1<<6) /* tx */
  52. #define IR_BAD_CRC (1<<5) /* tx */
  53. #define IR_NEED_PULSE (1<<4) /* tx */
  54. #define IR_FORCE_UNDER (1<<3) /* tx */
  55. #define IR_DISABLE_TX (1<<2) /* tx */
  56. #define IR_HW_UNDER (1<<0) /* tx */
  57. #define IR_TX_ERROR (IR_DIS_CRC|IR_BAD_CRC|IR_HW_UNDER)
  58. #define IR_PHY_ERROR (1<<6) /* rx */
  59. #define IR_CRC_ERROR (1<<5) /* rx */
  60. #define IR_MAX_LEN (1<<4) /* rx */
  61. #define IR_FIFO_OVER (1<<3) /* rx */
  62. #define IR_SIR_ERROR (1<<2) /* rx */
  63. #define IR_RX_ERROR (IR_PHY_ERROR|IR_CRC_ERROR| \
  64. IR_MAX_LEN|IR_FIFO_OVER|IR_SIR_ERROR)
  65. typedef struct db_dest {
  66. struct db_dest *pnext;
  67. volatile u32 *vaddr;
  68. dma_addr_t dma_addr;
  69. } db_dest_t;
  70. typedef struct ring_desc {
  71. u8 count_0; /* 7:0 */
  72. u8 count_1; /* 12:8 */
  73. u8 reserved;
  74. u8 flags;
  75. u8 addr_0; /* 7:0 */
  76. u8 addr_1; /* 15:8 */
  77. u8 addr_2; /* 23:16 */
  78. u8 addr_3; /* 31:24 */
  79. } ring_dest_t;
  80. /* Private data for each instance */
  81. struct au1k_private {
  82. db_dest_t *pDBfree;
  83. db_dest_t db[2*NUM_IR_DESC];
  84. volatile ring_dest_t *rx_ring[NUM_IR_DESC];
  85. volatile ring_dest_t *tx_ring[NUM_IR_DESC];
  86. db_dest_t *rx_db_inuse[NUM_IR_DESC];
  87. db_dest_t *tx_db_inuse[NUM_IR_DESC];
  88. u32 rx_head;
  89. u32 tx_head;
  90. u32 tx_tail;
  91. u32 tx_full;
  92. iobuff_t rx_buff;
  93. struct net_device *netdev;
  94. struct timeval stamp;
  95. struct timeval now;
  96. struct qos_info qos;
  97. struct irlap_cb *irlap;
  98. u8 open;
  99. u32 speed;
  100. u32 newspeed;
  101. u32 intr_work_done; /* number of Rx and Tx pkts processed in the isr */
  102. struct timer_list timer;
  103. spinlock_t lock; /* For serializing operations */
  104. };
  105. #endif /* AU1000_IRCC_H */