baycom_epp.c 34 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286
  1. /*****************************************************************************/
  2. /*
  3. * baycom_epp.c -- baycom epp radio modem driver.
  4. *
  5. * Copyright (C) 1998-2000
  6. * Thomas Sailer (sailer@ife.ee.ethz.ch)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Please note that the GPL allows you to use the driver, NOT the radio.
  23. * In order to use the radio, you need a license from the communications
  24. * authority of your country.
  25. *
  26. *
  27. * History:
  28. * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef)
  29. * 0.2 21.04.1998 Massive rework by Thomas Sailer
  30. * Integrated FPGA EPP modem configuration routines
  31. * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program
  32. * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface
  33. * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall
  34. * removed some pre-2.2 kernel compatibility cruft
  35. * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
  36. * 0.7 12.02.2000 adapted to softnet driver interface
  37. *
  38. */
  39. /*****************************************************************************/
  40. #include <linux/crc-ccitt.h>
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/init.h>
  44. #include <linux/string.h>
  45. #include <linux/workqueue.h>
  46. #include <linux/fs.h>
  47. #include <linux/parport.h>
  48. #include <linux/if_arp.h>
  49. #include <linux/hdlcdrv.h>
  50. #include <linux/baycom.h>
  51. #include <linux/jiffies.h>
  52. #include <linux/random.h>
  53. #include <net/ax25.h>
  54. #include <asm/uaccess.h>
  55. /* --------------------------------------------------------------------- */
  56. #define BAYCOM_DEBUG
  57. #define BAYCOM_MAGIC 19730510
  58. /* --------------------------------------------------------------------- */
  59. static const char paranoia_str[] = KERN_ERR
  60. "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
  61. static const char bc_drvname[] = "baycom_epp";
  62. static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  63. KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n";
  64. /* --------------------------------------------------------------------- */
  65. #define NR_PORTS 4
  66. static struct net_device *baycom_device[NR_PORTS];
  67. /* --------------------------------------------------------------------- */
  68. /* EPP status register */
  69. #define EPP_DCDBIT 0x80
  70. #define EPP_PTTBIT 0x08
  71. #define EPP_NREF 0x01
  72. #define EPP_NRAEF 0x02
  73. #define EPP_NRHF 0x04
  74. #define EPP_NTHF 0x20
  75. #define EPP_NTAEF 0x10
  76. #define EPP_NTEF EPP_PTTBIT
  77. /* EPP control register */
  78. #define EPP_TX_FIFO_ENABLE 0x10
  79. #define EPP_RX_FIFO_ENABLE 0x08
  80. #define EPP_MODEM_ENABLE 0x20
  81. #define EPP_LEDS 0xC0
  82. #define EPP_IRQ_ENABLE 0x10
  83. /* LPT registers */
  84. #define LPTREG_ECONTROL 0x402
  85. #define LPTREG_CONFIGB 0x401
  86. #define LPTREG_CONFIGA 0x400
  87. #define LPTREG_EPPDATA 0x004
  88. #define LPTREG_EPPADDR 0x003
  89. #define LPTREG_CONTROL 0x002
  90. #define LPTREG_STATUS 0x001
  91. #define LPTREG_DATA 0x000
  92. /* LPT control register */
  93. #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */
  94. #define LPTCTRL_WRITE 0x01
  95. #define LPTCTRL_ADDRSTB 0x08
  96. #define LPTCTRL_DATASTB 0x02
  97. #define LPTCTRL_INTEN 0x10
  98. /* LPT status register */
  99. #define LPTSTAT_SHIFT_NINTR 6
  100. #define LPTSTAT_WAIT 0x80
  101. #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR)
  102. #define LPTSTAT_PE 0x20
  103. #define LPTSTAT_DONE 0x10
  104. #define LPTSTAT_NERROR 0x08
  105. #define LPTSTAT_EPPTIMEOUT 0x01
  106. /* LPT data register */
  107. #define LPTDATA_SHIFT_TDI 0
  108. #define LPTDATA_SHIFT_TMS 2
  109. #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI)
  110. #define LPTDATA_TCK 0x02
  111. #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS)
  112. #define LPTDATA_INITBIAS 0x80
  113. /* EPP modem config/status bits */
  114. #define EPP_DCDBIT 0x80
  115. #define EPP_PTTBIT 0x08
  116. #define EPP_RXEBIT 0x01
  117. #define EPP_RXAEBIT 0x02
  118. #define EPP_RXHFULL 0x04
  119. #define EPP_NTHF 0x20
  120. #define EPP_NTAEF 0x10
  121. #define EPP_NTEF EPP_PTTBIT
  122. #define EPP_TX_FIFO_ENABLE 0x10
  123. #define EPP_RX_FIFO_ENABLE 0x08
  124. #define EPP_MODEM_ENABLE 0x20
  125. #define EPP_LEDS 0xC0
  126. #define EPP_IRQ_ENABLE 0x10
  127. /* Xilinx 4k JTAG instructions */
  128. #define XC4K_IRLENGTH 3
  129. #define XC4K_EXTEST 0
  130. #define XC4K_PRELOAD 1
  131. #define XC4K_CONFIGURE 5
  132. #define XC4K_BYPASS 7
  133. #define EPP_CONVENTIONAL 0
  134. #define EPP_FPGA 1
  135. #define EPP_FPGAEXTSTATUS 2
  136. #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8)
  137. /* ---------------------------------------------------------------------- */
  138. /*
  139. * Information that need to be kept for each board.
  140. */
  141. struct baycom_state {
  142. int magic;
  143. struct pardevice *pdev;
  144. struct net_device *dev;
  145. unsigned int work_running;
  146. struct delayed_work run_work;
  147. unsigned int modem;
  148. unsigned int bitrate;
  149. unsigned char stat;
  150. struct {
  151. unsigned int intclk;
  152. unsigned int fclk;
  153. unsigned int bps;
  154. unsigned int extmodem;
  155. unsigned int loopback;
  156. } cfg;
  157. struct hdlcdrv_channel_params ch_params;
  158. struct {
  159. unsigned int bitbuf, bitstream, numbits, state;
  160. unsigned char *bufptr;
  161. int bufcnt;
  162. unsigned char buf[TXBUFFER_SIZE];
  163. } hdlcrx;
  164. struct {
  165. int calibrate;
  166. int slotcnt;
  167. int flags;
  168. enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
  169. unsigned char *bufptr;
  170. int bufcnt;
  171. unsigned char buf[TXBUFFER_SIZE];
  172. } hdlctx;
  173. unsigned int ptt_keyed;
  174. struct sk_buff *skb; /* next transmit packet */
  175. #ifdef BAYCOM_DEBUG
  176. struct debug_vals {
  177. unsigned long last_jiffies;
  178. unsigned cur_intcnt;
  179. unsigned last_intcnt;
  180. int cur_pllcorr;
  181. int last_pllcorr;
  182. unsigned int mod_cycles;
  183. unsigned int demod_cycles;
  184. } debug_vals;
  185. #endif /* BAYCOM_DEBUG */
  186. };
  187. /* --------------------------------------------------------------------- */
  188. #define KISS_VERBOSE
  189. /* --------------------------------------------------------------------- */
  190. #define PARAM_TXDELAY 1
  191. #define PARAM_PERSIST 2
  192. #define PARAM_SLOTTIME 3
  193. #define PARAM_TXTAIL 4
  194. #define PARAM_FULLDUP 5
  195. #define PARAM_HARDWARE 6
  196. #define PARAM_RETURN 255
  197. /* --------------------------------------------------------------------- */
  198. /*
  199. * the CRC routines are stolen from WAMPES
  200. * by Dieter Deyke
  201. */
  202. /*---------------------------------------------------------------------------*/
  203. #if 0
  204. static inline void append_crc_ccitt(unsigned char *buffer, int len)
  205. {
  206. unsigned int crc = 0xffff;
  207. for (;len>0;len--)
  208. crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
  209. crc ^= 0xffff;
  210. *buffer++ = crc;
  211. *buffer++ = crc >> 8;
  212. }
  213. #endif
  214. /*---------------------------------------------------------------------------*/
  215. static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
  216. {
  217. return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
  218. }
  219. /*---------------------------------------------------------------------------*/
  220. static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
  221. {
  222. return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
  223. }
  224. /* ---------------------------------------------------------------------- */
  225. #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
  226. /* --------------------------------------------------------------------- */
  227. static inline void baycom_int_freq(struct baycom_state *bc)
  228. {
  229. #ifdef BAYCOM_DEBUG
  230. unsigned long cur_jiffies = jiffies;
  231. /*
  232. * measure the interrupt frequency
  233. */
  234. bc->debug_vals.cur_intcnt++;
  235. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  236. bc->debug_vals.last_jiffies = cur_jiffies;
  237. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  238. bc->debug_vals.cur_intcnt = 0;
  239. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  240. bc->debug_vals.cur_pllcorr = 0;
  241. }
  242. #endif /* BAYCOM_DEBUG */
  243. }
  244. /* ---------------------------------------------------------------------- */
  245. /*
  246. * eppconfig_path should be setable via /proc/sys.
  247. */
  248. static char eppconfig_path[256] = "/usr/sbin/eppfpga";
  249. static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
  250. /* eppconfig: called during ifconfig up to configure the modem */
  251. static int eppconfig(struct baycom_state *bc)
  252. {
  253. char modearg[256];
  254. char portarg[16];
  255. char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
  256. NULL };
  257. /* set up arguments */
  258. sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
  259. bc->cfg.intclk ? "int" : "ext",
  260. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  261. (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
  262. bc->cfg.loopback ? ",loopback" : "");
  263. sprintf(portarg, "%ld", bc->pdev->port->base);
  264. printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
  265. return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
  266. }
  267. /* ---------------------------------------------------------------------- */
  268. static inline void do_kiss_params(struct baycom_state *bc,
  269. unsigned char *data, unsigned long len)
  270. {
  271. #ifdef KISS_VERBOSE
  272. #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
  273. #else /* KISS_VERBOSE */
  274. #define PKP(a,b)
  275. #endif /* KISS_VERBOSE */
  276. if (len < 2)
  277. return;
  278. switch(data[0]) {
  279. case PARAM_TXDELAY:
  280. bc->ch_params.tx_delay = data[1];
  281. PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
  282. break;
  283. case PARAM_PERSIST:
  284. bc->ch_params.ppersist = data[1];
  285. PKP("p persistence = %u", bc->ch_params.ppersist);
  286. break;
  287. case PARAM_SLOTTIME:
  288. bc->ch_params.slottime = data[1];
  289. PKP("slot time = %ums", bc->ch_params.slottime);
  290. break;
  291. case PARAM_TXTAIL:
  292. bc->ch_params.tx_tail = data[1];
  293. PKP("TX tail = %ums", bc->ch_params.tx_tail);
  294. break;
  295. case PARAM_FULLDUP:
  296. bc->ch_params.fulldup = !!data[1];
  297. PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
  298. break;
  299. default:
  300. break;
  301. }
  302. #undef PKP
  303. }
  304. /* --------------------------------------------------------------------- */
  305. static void encode_hdlc(struct baycom_state *bc)
  306. {
  307. struct sk_buff *skb;
  308. unsigned char *wp, *bp;
  309. int pkt_len;
  310. unsigned bitstream, notbitstream, bitbuf, numbit, crc;
  311. unsigned char crcarr[2];
  312. int j;
  313. if (bc->hdlctx.bufcnt > 0)
  314. return;
  315. skb = bc->skb;
  316. if (!skb)
  317. return;
  318. bc->skb = NULL;
  319. pkt_len = skb->len-1; /* strip KISS byte */
  320. wp = bc->hdlctx.buf;
  321. bp = skb->data+1;
  322. crc = calc_crc_ccitt(bp, pkt_len);
  323. crcarr[0] = crc;
  324. crcarr[1] = crc >> 8;
  325. *wp++ = 0x7e;
  326. bitstream = bitbuf = numbit = 0;
  327. while (pkt_len > -2) {
  328. bitstream >>= 8;
  329. bitstream |= ((unsigned int)*bp) << 8;
  330. bitbuf |= ((unsigned int)*bp) << numbit;
  331. notbitstream = ~bitstream;
  332. bp++;
  333. pkt_len--;
  334. if (!pkt_len)
  335. bp = crcarr;
  336. for (j = 0; j < 8; j++)
  337. if (unlikely(!(notbitstream & (0x1f0 << j)))) {
  338. bitstream &= ~(0x100 << j);
  339. bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
  340. ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
  341. numbit++;
  342. notbitstream = ~bitstream;
  343. }
  344. numbit += 8;
  345. while (numbit >= 8) {
  346. *wp++ = bitbuf;
  347. bitbuf >>= 8;
  348. numbit -= 8;
  349. }
  350. }
  351. bitbuf |= 0x7e7e << numbit;
  352. numbit += 16;
  353. while (numbit >= 8) {
  354. *wp++ = bitbuf;
  355. bitbuf >>= 8;
  356. numbit -= 8;
  357. }
  358. bc->hdlctx.bufptr = bc->hdlctx.buf;
  359. bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
  360. dev_kfree_skb(skb);
  361. bc->dev->stats.tx_packets++;
  362. }
  363. /* ---------------------------------------------------------------------- */
  364. static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
  365. {
  366. struct parport *pp = bc->pdev->port;
  367. unsigned char tmp[128];
  368. int i, j;
  369. if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
  370. bc->hdlctx.state = tx_idle;
  371. if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
  372. if (bc->hdlctx.bufcnt <= 0)
  373. encode_hdlc(bc);
  374. if (bc->hdlctx.bufcnt <= 0)
  375. return 0;
  376. if (!bc->ch_params.fulldup) {
  377. if (!(stat & EPP_DCDBIT)) {
  378. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  379. return 0;
  380. }
  381. if ((--bc->hdlctx.slotcnt) > 0)
  382. return 0;
  383. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  384. if ((random32() % 256) > bc->ch_params.ppersist)
  385. return 0;
  386. }
  387. }
  388. if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
  389. bc->hdlctx.state = tx_keyup;
  390. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
  391. bc->ptt_keyed++;
  392. }
  393. while (cnt > 0) {
  394. switch (bc->hdlctx.state) {
  395. case tx_keyup:
  396. i = min_t(int, cnt, bc->hdlctx.flags);
  397. cnt -= i;
  398. bc->hdlctx.flags -= i;
  399. if (bc->hdlctx.flags <= 0)
  400. bc->hdlctx.state = tx_data;
  401. memset(tmp, 0x7e, sizeof(tmp));
  402. while (i > 0) {
  403. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  404. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  405. return -1;
  406. i -= j;
  407. }
  408. break;
  409. case tx_data:
  410. if (bc->hdlctx.bufcnt <= 0) {
  411. encode_hdlc(bc);
  412. if (bc->hdlctx.bufcnt <= 0) {
  413. bc->hdlctx.state = tx_tail;
  414. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
  415. break;
  416. }
  417. }
  418. i = min_t(int, cnt, bc->hdlctx.bufcnt);
  419. bc->hdlctx.bufcnt -= i;
  420. cnt -= i;
  421. if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
  422. return -1;
  423. bc->hdlctx.bufptr += i;
  424. break;
  425. case tx_tail:
  426. encode_hdlc(bc);
  427. if (bc->hdlctx.bufcnt > 0) {
  428. bc->hdlctx.state = tx_data;
  429. break;
  430. }
  431. i = min_t(int, cnt, bc->hdlctx.flags);
  432. if (i) {
  433. cnt -= i;
  434. bc->hdlctx.flags -= i;
  435. memset(tmp, 0x7e, sizeof(tmp));
  436. while (i > 0) {
  437. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  438. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  439. return -1;
  440. i -= j;
  441. }
  442. break;
  443. }
  444. default: /* fall through */
  445. if (bc->hdlctx.calibrate <= 0)
  446. return 0;
  447. i = min_t(int, cnt, bc->hdlctx.calibrate);
  448. cnt -= i;
  449. bc->hdlctx.calibrate -= i;
  450. memset(tmp, 0, sizeof(tmp));
  451. while (i > 0) {
  452. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  453. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  454. return -1;
  455. i -= j;
  456. }
  457. break;
  458. }
  459. }
  460. return 0;
  461. }
  462. /* ---------------------------------------------------------------------- */
  463. static void do_rxpacket(struct net_device *dev)
  464. {
  465. struct baycom_state *bc = netdev_priv(dev);
  466. struct sk_buff *skb;
  467. unsigned char *cp;
  468. unsigned pktlen;
  469. if (bc->hdlcrx.bufcnt < 4)
  470. return;
  471. if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
  472. return;
  473. pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
  474. if (!(skb = dev_alloc_skb(pktlen))) {
  475. printk("%s: memory squeeze, dropping packet\n", dev->name);
  476. dev->stats.rx_dropped++;
  477. return;
  478. }
  479. cp = skb_put(skb, pktlen);
  480. *cp++ = 0; /* KISS kludge */
  481. memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
  482. skb->protocol = ax25_type_trans(skb, dev);
  483. netif_rx(skb);
  484. dev->stats.rx_packets++;
  485. }
  486. static int receive(struct net_device *dev, int cnt)
  487. {
  488. struct baycom_state *bc = netdev_priv(dev);
  489. struct parport *pp = bc->pdev->port;
  490. unsigned int bitbuf, notbitstream, bitstream, numbits, state;
  491. unsigned char tmp[128];
  492. unsigned char *cp;
  493. int cnt2, ret = 0;
  494. int j;
  495. numbits = bc->hdlcrx.numbits;
  496. state = bc->hdlcrx.state;
  497. bitstream = bc->hdlcrx.bitstream;
  498. bitbuf = bc->hdlcrx.bitbuf;
  499. while (cnt > 0) {
  500. cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
  501. cnt -= cnt2;
  502. if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
  503. ret = -1;
  504. break;
  505. }
  506. cp = tmp;
  507. for (; cnt2 > 0; cnt2--, cp++) {
  508. bitstream >>= 8;
  509. bitstream |= (*cp) << 8;
  510. bitbuf >>= 8;
  511. bitbuf |= (*cp) << 8;
  512. numbits += 8;
  513. notbitstream = ~bitstream;
  514. for (j = 0; j < 8; j++) {
  515. /* flag or abort */
  516. if (unlikely(!(notbitstream & (0x0fc << j)))) {
  517. /* abort received */
  518. if (!(notbitstream & (0x1fc << j)))
  519. state = 0;
  520. /* not flag received */
  521. else if (!(bitstream & (0x1fe << j)) != (0x0fc << j)) {
  522. if (state)
  523. do_rxpacket(dev);
  524. bc->hdlcrx.bufcnt = 0;
  525. bc->hdlcrx.bufptr = bc->hdlcrx.buf;
  526. state = 1;
  527. numbits = 7-j;
  528. }
  529. }
  530. /* stuffed bit */
  531. else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
  532. numbits--;
  533. bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
  534. }
  535. }
  536. while (state && numbits >= 8) {
  537. if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
  538. state = 0;
  539. } else {
  540. *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
  541. bc->hdlcrx.bufcnt++;
  542. numbits -= 8;
  543. }
  544. }
  545. }
  546. }
  547. bc->hdlcrx.numbits = numbits;
  548. bc->hdlcrx.state = state;
  549. bc->hdlcrx.bitstream = bitstream;
  550. bc->hdlcrx.bitbuf = bitbuf;
  551. return ret;
  552. }
  553. /* --------------------------------------------------------------------- */
  554. #ifdef __i386__
  555. #include <asm/msr.h>
  556. #define GETTICK(x) \
  557. ({ \
  558. if (cpu_has_tsc) \
  559. rdtscl(x); \
  560. })
  561. #else /* __i386__ */
  562. #define GETTICK(x)
  563. #endif /* __i386__ */
  564. static void epp_bh(struct work_struct *work)
  565. {
  566. struct net_device *dev;
  567. struct baycom_state *bc;
  568. struct parport *pp;
  569. unsigned char stat;
  570. unsigned char tmp[2];
  571. unsigned int time1 = 0, time2 = 0, time3 = 0;
  572. int cnt, cnt2;
  573. bc = container_of(work, struct baycom_state, run_work.work);
  574. dev = bc->dev;
  575. if (!bc->work_running)
  576. return;
  577. baycom_int_freq(bc);
  578. pp = bc->pdev->port;
  579. /* update status */
  580. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  581. goto epptimeout;
  582. bc->stat = stat;
  583. bc->debug_vals.last_pllcorr = stat;
  584. GETTICK(time1);
  585. if (bc->modem == EPP_FPGAEXTSTATUS) {
  586. /* get input count */
  587. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
  588. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  589. goto epptimeout;
  590. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  591. goto epptimeout;
  592. cnt = tmp[0] | (tmp[1] << 8);
  593. cnt &= 0x7fff;
  594. /* get output count */
  595. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
  596. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  597. goto epptimeout;
  598. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  599. goto epptimeout;
  600. cnt2 = tmp[0] | (tmp[1] << 8);
  601. cnt2 = 16384 - (cnt2 & 0x7fff);
  602. /* return to normal */
  603. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  604. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  605. goto epptimeout;
  606. if (transmit(bc, cnt2, stat))
  607. goto epptimeout;
  608. GETTICK(time2);
  609. if (receive(dev, cnt))
  610. goto epptimeout;
  611. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  612. goto epptimeout;
  613. bc->stat = stat;
  614. } else {
  615. /* try to tx */
  616. switch (stat & (EPP_NTAEF|EPP_NTHF)) {
  617. case EPP_NTHF:
  618. cnt = 2048 - 256;
  619. break;
  620. case EPP_NTAEF:
  621. cnt = 2048 - 1793;
  622. break;
  623. case 0:
  624. cnt = 0;
  625. break;
  626. default:
  627. cnt = 2048 - 1025;
  628. break;
  629. }
  630. if (transmit(bc, cnt, stat))
  631. goto epptimeout;
  632. GETTICK(time2);
  633. /* do receiver */
  634. while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
  635. switch (stat & (EPP_NRAEF|EPP_NRHF)) {
  636. case EPP_NRAEF:
  637. cnt = 1025;
  638. break;
  639. case 0:
  640. cnt = 1793;
  641. break;
  642. default:
  643. cnt = 256;
  644. break;
  645. }
  646. if (receive(dev, cnt))
  647. goto epptimeout;
  648. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  649. goto epptimeout;
  650. }
  651. cnt = 0;
  652. if (bc->bitrate < 50000)
  653. cnt = 256;
  654. else if (bc->bitrate < 100000)
  655. cnt = 128;
  656. while (cnt > 0 && stat & EPP_NREF) {
  657. if (receive(dev, 1))
  658. goto epptimeout;
  659. cnt--;
  660. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  661. goto epptimeout;
  662. }
  663. }
  664. GETTICK(time3);
  665. #ifdef BAYCOM_DEBUG
  666. bc->debug_vals.mod_cycles = time2 - time1;
  667. bc->debug_vals.demod_cycles = time3 - time2;
  668. #endif /* BAYCOM_DEBUG */
  669. schedule_delayed_work(&bc->run_work, 1);
  670. if (!bc->skb)
  671. netif_wake_queue(dev);
  672. return;
  673. epptimeout:
  674. printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
  675. }
  676. /* ---------------------------------------------------------------------- */
  677. /*
  678. * ===================== network driver interface =========================
  679. */
  680. static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
  681. {
  682. struct baycom_state *bc = netdev_priv(dev);
  683. if (skb->data[0] != 0) {
  684. do_kiss_params(bc, skb->data, skb->len);
  685. dev_kfree_skb(skb);
  686. return 0;
  687. }
  688. if (bc->skb)
  689. return -1;
  690. /* strip KISS byte */
  691. if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
  692. dev_kfree_skb(skb);
  693. return 0;
  694. }
  695. netif_stop_queue(dev);
  696. bc->skb = skb;
  697. return 0;
  698. }
  699. /* --------------------------------------------------------------------- */
  700. static int baycom_set_mac_address(struct net_device *dev, void *addr)
  701. {
  702. struct sockaddr *sa = (struct sockaddr *)addr;
  703. /* addr is an AX.25 shifted ASCII mac address */
  704. memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
  705. return 0;
  706. }
  707. /* --------------------------------------------------------------------- */
  708. static void epp_wakeup(void *handle)
  709. {
  710. struct net_device *dev = (struct net_device *)handle;
  711. struct baycom_state *bc = netdev_priv(dev);
  712. printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
  713. if (!parport_claim(bc->pdev))
  714. printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
  715. }
  716. /* --------------------------------------------------------------------- */
  717. /*
  718. * Open/initialize the board. This is called (in the current kernel)
  719. * sometime after booting when the 'ifconfig' program is run.
  720. *
  721. * This routine should set everything up anew at each open, even
  722. * registers that "should" only need to be set once at boot, so that
  723. * there is non-reboot way to recover if something goes wrong.
  724. */
  725. static int epp_open(struct net_device *dev)
  726. {
  727. struct baycom_state *bc = netdev_priv(dev);
  728. struct parport *pp = parport_find_base(dev->base_addr);
  729. unsigned int i, j;
  730. unsigned char tmp[128];
  731. unsigned char stat;
  732. unsigned long tstart;
  733. if (!pp) {
  734. printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
  735. return -ENXIO;
  736. }
  737. #if 0
  738. if (pp->irq < 0) {
  739. printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
  740. parport_put_port(pp);
  741. return -ENXIO;
  742. }
  743. #endif
  744. if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
  745. printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
  746. bc_drvname, pp->base);
  747. parport_put_port(pp);
  748. return -EIO;
  749. }
  750. memset(&bc->modem, 0, sizeof(bc->modem));
  751. bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup,
  752. NULL, PARPORT_DEV_EXCL, dev);
  753. parport_put_port(pp);
  754. if (!bc->pdev) {
  755. printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
  756. return -ENXIO;
  757. }
  758. if (parport_claim(bc->pdev)) {
  759. printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
  760. parport_unregister_device(bc->pdev);
  761. return -EBUSY;
  762. }
  763. dev->irq = /*pp->irq*/ 0;
  764. INIT_DELAYED_WORK(&bc->run_work, epp_bh);
  765. bc->work_running = 1;
  766. bc->modem = EPP_CONVENTIONAL;
  767. if (eppconfig(bc))
  768. printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
  769. else
  770. bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
  771. parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
  772. /* reset the modem */
  773. tmp[0] = 0;
  774. tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  775. if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
  776. goto epptimeout;
  777. /* autoprobe baud rate */
  778. tstart = jiffies;
  779. i = 0;
  780. while (time_before(jiffies, tstart + HZ/3)) {
  781. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  782. goto epptimeout;
  783. if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
  784. schedule();
  785. continue;
  786. }
  787. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  788. goto epptimeout;
  789. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  790. goto epptimeout;
  791. i += 256;
  792. }
  793. for (j = 0; j < 256; j++) {
  794. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  795. goto epptimeout;
  796. if (!(stat & EPP_NREF))
  797. break;
  798. if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
  799. goto epptimeout;
  800. i++;
  801. }
  802. tstart = jiffies - tstart;
  803. bc->bitrate = i * (8 * HZ) / tstart;
  804. j = 1;
  805. i = bc->bitrate >> 3;
  806. while (j < 7 && i > 150) {
  807. j++;
  808. i >>= 1;
  809. }
  810. printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n",
  811. bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
  812. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
  813. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  814. goto epptimeout;
  815. /*
  816. * initialise hdlc variables
  817. */
  818. bc->hdlcrx.state = 0;
  819. bc->hdlcrx.numbits = 0;
  820. bc->hdlctx.state = tx_idle;
  821. bc->hdlctx.bufcnt = 0;
  822. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  823. bc->hdlctx.calibrate = 0;
  824. /* start the bottom half stuff */
  825. schedule_delayed_work(&bc->run_work, 1);
  826. netif_start_queue(dev);
  827. return 0;
  828. epptimeout:
  829. printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
  830. parport_write_control(pp, 0); /* reset the adapter */
  831. parport_release(bc->pdev);
  832. parport_unregister_device(bc->pdev);
  833. return -EIO;
  834. }
  835. /* --------------------------------------------------------------------- */
  836. static int epp_close(struct net_device *dev)
  837. {
  838. struct baycom_state *bc = netdev_priv(dev);
  839. struct parport *pp = bc->pdev->port;
  840. unsigned char tmp[1];
  841. bc->work_running = 0;
  842. cancel_delayed_work_sync(&bc->run_work);
  843. bc->stat = EPP_DCDBIT;
  844. tmp[0] = 0;
  845. pp->ops->epp_write_addr(pp, tmp, 1, 0);
  846. parport_write_control(pp, 0); /* reset the adapter */
  847. parport_release(bc->pdev);
  848. parport_unregister_device(bc->pdev);
  849. if (bc->skb)
  850. dev_kfree_skb(bc->skb);
  851. bc->skb = NULL;
  852. printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
  853. bc_drvname, dev->base_addr, dev->irq);
  854. return 0;
  855. }
  856. /* --------------------------------------------------------------------- */
  857. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  858. {
  859. const char *cp;
  860. if (strstr(modestr,"intclk"))
  861. bc->cfg.intclk = 1;
  862. if (strstr(modestr,"extclk"))
  863. bc->cfg.intclk = 0;
  864. if (strstr(modestr,"intmodem"))
  865. bc->cfg.extmodem = 0;
  866. if (strstr(modestr,"extmodem"))
  867. bc->cfg.extmodem = 1;
  868. if (strstr(modestr,"noloopback"))
  869. bc->cfg.loopback = 0;
  870. if (strstr(modestr,"loopback"))
  871. bc->cfg.loopback = 1;
  872. if ((cp = strstr(modestr,"fclk="))) {
  873. bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
  874. if (bc->cfg.fclk < 1000000)
  875. bc->cfg.fclk = 1000000;
  876. if (bc->cfg.fclk > 25000000)
  877. bc->cfg.fclk = 25000000;
  878. }
  879. if ((cp = strstr(modestr,"bps="))) {
  880. bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
  881. if (bc->cfg.bps < 1000)
  882. bc->cfg.bps = 1000;
  883. if (bc->cfg.bps > 1500000)
  884. bc->cfg.bps = 1500000;
  885. }
  886. return 0;
  887. }
  888. /* --------------------------------------------------------------------- */
  889. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  890. {
  891. struct baycom_state *bc = netdev_priv(dev);
  892. struct hdlcdrv_ioctl hi;
  893. if (cmd != SIOCDEVPRIVATE)
  894. return -ENOIOCTLCMD;
  895. if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
  896. return -EFAULT;
  897. switch (hi.cmd) {
  898. default:
  899. return -ENOIOCTLCMD;
  900. case HDLCDRVCTL_GETCHANNELPAR:
  901. hi.data.cp.tx_delay = bc->ch_params.tx_delay;
  902. hi.data.cp.tx_tail = bc->ch_params.tx_tail;
  903. hi.data.cp.slottime = bc->ch_params.slottime;
  904. hi.data.cp.ppersist = bc->ch_params.ppersist;
  905. hi.data.cp.fulldup = bc->ch_params.fulldup;
  906. break;
  907. case HDLCDRVCTL_SETCHANNELPAR:
  908. if (!capable(CAP_NET_ADMIN))
  909. return -EACCES;
  910. bc->ch_params.tx_delay = hi.data.cp.tx_delay;
  911. bc->ch_params.tx_tail = hi.data.cp.tx_tail;
  912. bc->ch_params.slottime = hi.data.cp.slottime;
  913. bc->ch_params.ppersist = hi.data.cp.ppersist;
  914. bc->ch_params.fulldup = hi.data.cp.fulldup;
  915. bc->hdlctx.slotcnt = 1;
  916. return 0;
  917. case HDLCDRVCTL_GETMODEMPAR:
  918. hi.data.mp.iobase = dev->base_addr;
  919. hi.data.mp.irq = dev->irq;
  920. hi.data.mp.dma = dev->dma;
  921. hi.data.mp.dma2 = 0;
  922. hi.data.mp.seriobase = 0;
  923. hi.data.mp.pariobase = 0;
  924. hi.data.mp.midiiobase = 0;
  925. break;
  926. case HDLCDRVCTL_SETMODEMPAR:
  927. if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
  928. return -EACCES;
  929. dev->base_addr = hi.data.mp.iobase;
  930. dev->irq = /*hi.data.mp.irq*/0;
  931. dev->dma = /*hi.data.mp.dma*/0;
  932. return 0;
  933. case HDLCDRVCTL_GETSTAT:
  934. hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
  935. hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
  936. hi.data.cs.ptt_keyed = bc->ptt_keyed;
  937. hi.data.cs.tx_packets = dev->stats.tx_packets;
  938. hi.data.cs.tx_errors = dev->stats.tx_errors;
  939. hi.data.cs.rx_packets = dev->stats.rx_packets;
  940. hi.data.cs.rx_errors = dev->stats.rx_errors;
  941. break;
  942. case HDLCDRVCTL_OLDGETSTAT:
  943. hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
  944. hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
  945. hi.data.ocs.ptt_keyed = bc->ptt_keyed;
  946. break;
  947. case HDLCDRVCTL_CALIBRATE:
  948. if (!capable(CAP_SYS_RAWIO))
  949. return -EACCES;
  950. bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
  951. return 0;
  952. case HDLCDRVCTL_DRIVERNAME:
  953. strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
  954. break;
  955. case HDLCDRVCTL_GETMODE:
  956. sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
  957. bc->cfg.intclk ? "int" : "ext",
  958. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  959. bc->cfg.loopback ? ",loopback" : "");
  960. break;
  961. case HDLCDRVCTL_SETMODE:
  962. if (!capable(CAP_NET_ADMIN) || netif_running(dev))
  963. return -EACCES;
  964. hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
  965. return baycom_setmode(bc, hi.data.modename);
  966. case HDLCDRVCTL_MODELIST:
  967. strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
  968. sizeof(hi.data.modename));
  969. break;
  970. case HDLCDRVCTL_MODEMPARMASK:
  971. return HDLCDRV_PARMASK_IOBASE;
  972. }
  973. if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
  974. return -EFAULT;
  975. return 0;
  976. }
  977. /* --------------------------------------------------------------------- */
  978. static const struct net_device_ops baycom_netdev_ops = {
  979. .ndo_open = epp_open,
  980. .ndo_stop = epp_close,
  981. .ndo_do_ioctl = baycom_ioctl,
  982. .ndo_start_xmit = baycom_send_packet,
  983. .ndo_set_mac_address = baycom_set_mac_address,
  984. };
  985. /*
  986. * Check for a network adaptor of this type, and return '0' if one exists.
  987. * If dev->base_addr == 0, probe all likely locations.
  988. * If dev->base_addr == 1, always return failure.
  989. * If dev->base_addr == 2, allocate space for the device and return success
  990. * (detachable devices only).
  991. */
  992. static void baycom_probe(struct net_device *dev)
  993. {
  994. const struct hdlcdrv_channel_params dflt_ch_params = {
  995. 20, 2, 10, 40, 0
  996. };
  997. struct baycom_state *bc;
  998. /*
  999. * not a real probe! only initialize data structures
  1000. */
  1001. bc = netdev_priv(dev);
  1002. /*
  1003. * initialize the baycom_state struct
  1004. */
  1005. bc->ch_params = dflt_ch_params;
  1006. bc->ptt_keyed = 0;
  1007. /*
  1008. * initialize the device struct
  1009. */
  1010. /* Fill in the fields of the device structure */
  1011. bc->skb = NULL;
  1012. dev->netdev_ops = &baycom_netdev_ops;
  1013. dev->header_ops = &ax25_header_ops;
  1014. dev->type = ARPHRD_AX25; /* AF_AX25 device */
  1015. dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
  1016. dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */
  1017. dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */
  1018. memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
  1019. memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
  1020. dev->tx_queue_len = 16;
  1021. /* New style flags */
  1022. dev->flags = 0;
  1023. }
  1024. /* --------------------------------------------------------------------- */
  1025. /*
  1026. * command line settable parameters
  1027. */
  1028. static const char *mode[NR_PORTS] = { "", };
  1029. static int iobase[NR_PORTS] = { 0x378, };
  1030. module_param_array(mode, charp, NULL, 0);
  1031. MODULE_PARM_DESC(mode, "baycom operating mode");
  1032. module_param_array(iobase, int, NULL, 0);
  1033. MODULE_PARM_DESC(iobase, "baycom io base address");
  1034. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  1035. MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
  1036. MODULE_LICENSE("GPL");
  1037. /* --------------------------------------------------------------------- */
  1038. static void __init baycom_epp_dev_setup(struct net_device *dev)
  1039. {
  1040. struct baycom_state *bc = netdev_priv(dev);
  1041. /*
  1042. * initialize part of the baycom_state struct
  1043. */
  1044. bc->dev = dev;
  1045. bc->magic = BAYCOM_MAGIC;
  1046. bc->cfg.fclk = 19666600;
  1047. bc->cfg.bps = 9600;
  1048. /*
  1049. * initialize part of the device struct
  1050. */
  1051. baycom_probe(dev);
  1052. }
  1053. static int __init init_baycomepp(void)
  1054. {
  1055. int i, found = 0;
  1056. char set_hw = 1;
  1057. printk(bc_drvinfo);
  1058. /*
  1059. * register net devices
  1060. */
  1061. for (i = 0; i < NR_PORTS; i++) {
  1062. struct net_device *dev;
  1063. dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
  1064. baycom_epp_dev_setup);
  1065. if (!dev) {
  1066. printk(KERN_WARNING "bce%d : out of memory\n", i);
  1067. return found ? 0 : -ENOMEM;
  1068. }
  1069. sprintf(dev->name, "bce%d", i);
  1070. dev->base_addr = iobase[i];
  1071. if (!mode[i])
  1072. set_hw = 0;
  1073. if (!set_hw)
  1074. iobase[i] = 0;
  1075. if (register_netdev(dev)) {
  1076. printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
  1077. free_netdev(dev);
  1078. break;
  1079. }
  1080. if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
  1081. set_hw = 0;
  1082. baycom_device[i] = dev;
  1083. found++;
  1084. }
  1085. return found ? 0 : -ENXIO;
  1086. }
  1087. static void __exit cleanup_baycomepp(void)
  1088. {
  1089. int i;
  1090. for(i = 0; i < NR_PORTS; i++) {
  1091. struct net_device *dev = baycom_device[i];
  1092. if (dev) {
  1093. struct baycom_state *bc = netdev_priv(dev);
  1094. if (bc->magic == BAYCOM_MAGIC) {
  1095. unregister_netdev(dev);
  1096. free_netdev(dev);
  1097. } else
  1098. printk(paranoia_str, "cleanup_module");
  1099. }
  1100. }
  1101. }
  1102. module_init(init_baycomepp);
  1103. module_exit(cleanup_baycomepp);
  1104. /* --------------------------------------------------------------------- */
  1105. #ifndef MODULE
  1106. /*
  1107. * format: baycom_epp=io,mode
  1108. * mode: fpga config options
  1109. */
  1110. static int __init baycom_epp_setup(char *str)
  1111. {
  1112. static unsigned __initdata nr_dev = 0;
  1113. int ints[2];
  1114. if (nr_dev >= NR_PORTS)
  1115. return 0;
  1116. str = get_options(str, 2, ints);
  1117. if (ints[0] < 1)
  1118. return 0;
  1119. mode[nr_dev] = str;
  1120. iobase[nr_dev] = ints[1];
  1121. nr_dev++;
  1122. return 1;
  1123. }
  1124. __setup("baycom_epp=", baycom_epp_setup);
  1125. #endif /* MODULE */
  1126. /* --------------------------------------------------------------------- */