cphy.h 6.2 KB

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  1. /*****************************************************************************
  2. * *
  3. * File: cphy.h *
  4. * $Revision: 1.7 $ *
  5. * $Date: 2005/06/21 18:29:47 $ *
  6. * Description: *
  7. * part of the Chelsio 10Gb Ethernet Driver. *
  8. * *
  9. * This program is free software; you can redistribute it and/or modify *
  10. * it under the terms of the GNU General Public License, version 2, as *
  11. * published by the Free Software Foundation. *
  12. * *
  13. * You should have received a copy of the GNU General Public License along *
  14. * with this program; if not, write to the Free Software Foundation, Inc., *
  15. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  16. * *
  17. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
  18. * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
  19. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
  20. * *
  21. * http://www.chelsio.com *
  22. * *
  23. * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
  24. * All rights reserved. *
  25. * *
  26. * Maintainers: maintainers@chelsio.com *
  27. * *
  28. * Authors: Dimitrios Michailidis <dm@chelsio.com> *
  29. * Tina Yang <tainay@chelsio.com> *
  30. * Felix Marti <felix@chelsio.com> *
  31. * Scott Bardone <sbardone@chelsio.com> *
  32. * Kurt Ottaway <kottaway@chelsio.com> *
  33. * Frank DiMambro <frank@chelsio.com> *
  34. * *
  35. * History: *
  36. * *
  37. ****************************************************************************/
  38. #ifndef _CXGB_CPHY_H_
  39. #define _CXGB_CPHY_H_
  40. #include "common.h"
  41. struct mdio_ops {
  42. void (*init)(adapter_t *adapter, const struct board_info *bi);
  43. int (*read)(adapter_t *adapter, int phy_addr, int mmd_addr,
  44. int reg_addr, unsigned int *val);
  45. int (*write)(adapter_t *adapter, int phy_addr, int mmd_addr,
  46. int reg_addr, unsigned int val);
  47. };
  48. /* PHY interrupt types */
  49. enum {
  50. cphy_cause_link_change = 0x1,
  51. cphy_cause_error = 0x2,
  52. cphy_cause_fifo_error = 0x3
  53. };
  54. enum {
  55. PHY_LINK_UP = 0x1,
  56. PHY_AUTONEG_RDY = 0x2,
  57. PHY_AUTONEG_EN = 0x4
  58. };
  59. struct cphy;
  60. /* PHY operations */
  61. struct cphy_ops {
  62. void (*destroy)(struct cphy *);
  63. int (*reset)(struct cphy *, int wait);
  64. int (*interrupt_enable)(struct cphy *);
  65. int (*interrupt_disable)(struct cphy *);
  66. int (*interrupt_clear)(struct cphy *);
  67. int (*interrupt_handler)(struct cphy *);
  68. int (*autoneg_enable)(struct cphy *);
  69. int (*autoneg_disable)(struct cphy *);
  70. int (*autoneg_restart)(struct cphy *);
  71. int (*advertise)(struct cphy *phy, unsigned int advertise_map);
  72. int (*set_loopback)(struct cphy *, int on);
  73. int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
  74. int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
  75. int *duplex, int *fc);
  76. };
  77. /* A PHY instance */
  78. struct cphy {
  79. int addr; /* PHY address */
  80. int state; /* Link status state machine */
  81. adapter_t *adapter; /* associated adapter */
  82. struct delayed_work phy_update;
  83. u16 bmsr;
  84. int count;
  85. int act_count;
  86. int act_on;
  87. u32 elmer_gpo;
  88. const struct cphy_ops *ops; /* PHY operations */
  89. int (*mdio_read)(adapter_t *adapter, int phy_addr, int mmd_addr,
  90. int reg_addr, unsigned int *val);
  91. int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
  92. int reg_addr, unsigned int val);
  93. struct cphy_instance *instance;
  94. };
  95. /* Convenience MDIO read/write wrappers */
  96. static inline int mdio_read(struct cphy *cphy, int mmd, int reg,
  97. unsigned int *valp)
  98. {
  99. return cphy->mdio_read(cphy->adapter, cphy->addr, mmd, reg, valp);
  100. }
  101. static inline int mdio_write(struct cphy *cphy, int mmd, int reg,
  102. unsigned int val)
  103. {
  104. return cphy->mdio_write(cphy->adapter, cphy->addr, mmd, reg, val);
  105. }
  106. static inline int simple_mdio_read(struct cphy *cphy, int reg,
  107. unsigned int *valp)
  108. {
  109. return mdio_read(cphy, 0, reg, valp);
  110. }
  111. static inline int simple_mdio_write(struct cphy *cphy, int reg,
  112. unsigned int val)
  113. {
  114. return mdio_write(cphy, 0, reg, val);
  115. }
  116. /* Convenience initializer */
  117. static inline void cphy_init(struct cphy *phy, adapter_t *adapter,
  118. int phy_addr, struct cphy_ops *phy_ops,
  119. const struct mdio_ops *mdio_ops)
  120. {
  121. phy->adapter = adapter;
  122. phy->addr = phy_addr;
  123. phy->ops = phy_ops;
  124. if (mdio_ops) {
  125. phy->mdio_read = mdio_ops->read;
  126. phy->mdio_write = mdio_ops->write;
  127. }
  128. }
  129. /* Operations of the PHY-instance factory */
  130. struct gphy {
  131. /* Construct a PHY instance with the given PHY address */
  132. struct cphy *(*create)(adapter_t *adapter, int phy_addr,
  133. const struct mdio_ops *mdio_ops);
  134. /*
  135. * Reset the PHY chip. This resets the whole PHY chip, not individual
  136. * ports.
  137. */
  138. int (*reset)(adapter_t *adapter);
  139. };
  140. extern const struct gphy t1_my3126_ops;
  141. extern const struct gphy t1_mv88e1xxx_ops;
  142. extern const struct gphy t1_vsc8244_ops;
  143. extern const struct gphy t1_mv88x201x_ops;
  144. #endif /* _CXGB_CPHY_H_ */