be_main.c 50 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include <asm/div64.h>
  19. MODULE_VERSION(DRV_VER);
  20. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  21. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  22. MODULE_AUTHOR("ServerEngines Corporation");
  23. MODULE_LICENSE("GPL");
  24. static unsigned int rx_frag_size = 2048;
  25. module_param(rx_frag_size, uint, S_IRUGO);
  26. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  27. #define BE_VENDOR_ID 0x19a2
  28. #define BE2_DEVICE_ID_1 0x0211
  29. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  30. { PCI_DEVICE(BE_VENDOR_ID, BE2_DEVICE_ID_1) },
  31. { 0 }
  32. };
  33. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  34. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  35. {
  36. struct be_dma_mem *mem = &q->dma_mem;
  37. if (mem->va)
  38. pci_free_consistent(adapter->pdev, mem->size,
  39. mem->va, mem->dma);
  40. }
  41. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  42. u16 len, u16 entry_size)
  43. {
  44. struct be_dma_mem *mem = &q->dma_mem;
  45. memset(q, 0, sizeof(*q));
  46. q->len = len;
  47. q->entry_size = entry_size;
  48. mem->size = len * entry_size;
  49. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  50. if (!mem->va)
  51. return -1;
  52. memset(mem->va, 0, mem->size);
  53. return 0;
  54. }
  55. static inline void *queue_head_node(struct be_queue_info *q)
  56. {
  57. return q->dma_mem.va + q->head * q->entry_size;
  58. }
  59. static inline void *queue_tail_node(struct be_queue_info *q)
  60. {
  61. return q->dma_mem.va + q->tail * q->entry_size;
  62. }
  63. static inline void queue_head_inc(struct be_queue_info *q)
  64. {
  65. index_inc(&q->head, q->len);
  66. }
  67. static inline void queue_tail_inc(struct be_queue_info *q)
  68. {
  69. index_inc(&q->tail, q->len);
  70. }
  71. static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
  72. {
  73. u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  74. u32 reg = ioread32(addr);
  75. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  76. if (!enabled && enable) {
  77. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  78. } else if (enabled && !enable) {
  79. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  80. } else {
  81. printk(KERN_WARNING DRV_NAME
  82. ": bad value in membar_int_ctrl reg=0x%x\n", reg);
  83. return;
  84. }
  85. iowrite32(reg, addr);
  86. }
  87. static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  88. {
  89. u32 val = 0;
  90. val |= qid & DB_RQ_RING_ID_MASK;
  91. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  92. iowrite32(val, ctrl->db + DB_RQ_OFFSET);
  93. }
  94. static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  95. {
  96. u32 val = 0;
  97. val |= qid & DB_TXULP_RING_ID_MASK;
  98. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  99. iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
  100. }
  101. static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
  102. bool arm, bool clear_int, u16 num_popped)
  103. {
  104. u32 val = 0;
  105. val |= qid & DB_EQ_RING_ID_MASK;
  106. if (arm)
  107. val |= 1 << DB_EQ_REARM_SHIFT;
  108. if (clear_int)
  109. val |= 1 << DB_EQ_CLR_SHIFT;
  110. val |= 1 << DB_EQ_EVNT_SHIFT;
  111. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  112. iowrite32(val, ctrl->db + DB_EQ_OFFSET);
  113. }
  114. static void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
  115. bool arm, u16 num_popped)
  116. {
  117. u32 val = 0;
  118. val |= qid & DB_CQ_RING_ID_MASK;
  119. if (arm)
  120. val |= 1 << DB_CQ_REARM_SHIFT;
  121. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  122. iowrite32(val, ctrl->db + DB_CQ_OFFSET);
  123. }
  124. static int be_mac_addr_set(struct net_device *netdev, void *p)
  125. {
  126. struct be_adapter *adapter = netdev_priv(netdev);
  127. struct sockaddr *addr = p;
  128. int status = 0;
  129. if (netif_running(netdev)) {
  130. status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
  131. adapter->pmac_id);
  132. if (status)
  133. return status;
  134. status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
  135. adapter->if_handle, &adapter->pmac_id);
  136. }
  137. if (!status)
  138. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  139. return status;
  140. }
  141. static void netdev_stats_update(struct be_adapter *adapter)
  142. {
  143. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  144. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  145. struct be_port_rxf_stats *port_stats =
  146. &rxf_stats->port[adapter->port_num];
  147. struct net_device_stats *dev_stats = &adapter->stats.net_stats;
  148. dev_stats->rx_packets = port_stats->rx_total_frames;
  149. dev_stats->tx_packets = port_stats->tx_unicastframes +
  150. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  151. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  152. (u64) port_stats->rx_bytes_lsd;
  153. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  154. (u64) port_stats->tx_bytes_lsd;
  155. /* bad pkts received */
  156. dev_stats->rx_errors = port_stats->rx_crc_errors +
  157. port_stats->rx_alignment_symbol_errors +
  158. port_stats->rx_in_range_errors +
  159. port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
  160. /* packet transmit problems */
  161. dev_stats->tx_errors = 0;
  162. /* no space in linux buffers */
  163. dev_stats->rx_dropped = 0;
  164. /* no space available in linux */
  165. dev_stats->tx_dropped = 0;
  166. dev_stats->multicast = port_stats->tx_multicastframes;
  167. dev_stats->collisions = 0;
  168. /* detailed rx errors */
  169. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  170. port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
  171. /* receive ring buffer overflow */
  172. dev_stats->rx_over_errors = 0;
  173. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  174. /* frame alignment errors */
  175. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  176. /* receiver fifo overrun */
  177. /* drops_no_pbuf is no per i/f, it's per BE card */
  178. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  179. port_stats->rx_input_fifo_overflow +
  180. rxf_stats->rx_drops_no_pbuf;
  181. /* receiver missed packetd */
  182. dev_stats->rx_missed_errors = 0;
  183. /* detailed tx_errors */
  184. dev_stats->tx_aborted_errors = 0;
  185. dev_stats->tx_carrier_errors = 0;
  186. dev_stats->tx_fifo_errors = 0;
  187. dev_stats->tx_heartbeat_errors = 0;
  188. dev_stats->tx_window_errors = 0;
  189. }
  190. static void be_link_status_update(struct be_adapter *adapter)
  191. {
  192. struct be_link_info *prev = &adapter->link;
  193. struct be_link_info now = { 0 };
  194. struct net_device *netdev = adapter->netdev;
  195. be_cmd_link_status_query(&adapter->ctrl, &now);
  196. /* If link came up or went down */
  197. if (now.speed != prev->speed && (now.speed == PHY_LINK_SPEED_ZERO ||
  198. prev->speed == PHY_LINK_SPEED_ZERO)) {
  199. if (now.speed == PHY_LINK_SPEED_ZERO) {
  200. netif_stop_queue(netdev);
  201. netif_carrier_off(netdev);
  202. printk(KERN_INFO "%s: Link down\n", netdev->name);
  203. } else {
  204. netif_start_queue(netdev);
  205. netif_carrier_on(netdev);
  206. printk(KERN_INFO "%s: Link up\n", netdev->name);
  207. }
  208. }
  209. *prev = now;
  210. }
  211. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  212. static void be_rx_eqd_update(struct be_adapter *adapter)
  213. {
  214. struct be_ctrl_info *ctrl = &adapter->ctrl;
  215. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  216. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  217. ulong now = jiffies;
  218. u32 eqd;
  219. if (!rx_eq->enable_aic)
  220. return;
  221. /* Wrapped around */
  222. if (time_before(now, stats->rx_fps_jiffies)) {
  223. stats->rx_fps_jiffies = now;
  224. return;
  225. }
  226. /* Update once a second */
  227. if ((now - stats->rx_fps_jiffies) < HZ)
  228. return;
  229. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  230. ((now - stats->rx_fps_jiffies) / HZ);
  231. stats->rx_fps_jiffies = now;
  232. stats->be_prev_rx_frags = stats->be_rx_frags;
  233. eqd = stats->be_rx_fps / 110000;
  234. eqd = eqd << 3;
  235. if (eqd > rx_eq->max_eqd)
  236. eqd = rx_eq->max_eqd;
  237. if (eqd < rx_eq->min_eqd)
  238. eqd = rx_eq->min_eqd;
  239. if (eqd < 10)
  240. eqd = 0;
  241. if (eqd != rx_eq->cur_eqd)
  242. be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
  243. rx_eq->cur_eqd = eqd;
  244. }
  245. static struct net_device_stats *be_get_stats(struct net_device *dev)
  246. {
  247. struct be_adapter *adapter = netdev_priv(dev);
  248. return &adapter->stats.net_stats;
  249. }
  250. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  251. {
  252. u64 rate = bytes;
  253. do_div(rate, ticks / HZ);
  254. rate <<= 3; /* bytes/sec -> bits/sec */
  255. do_div(rate, 1000000ul); /* MB/Sec */
  256. return rate;
  257. }
  258. static void be_tx_rate_update(struct be_adapter *adapter)
  259. {
  260. struct be_drvr_stats *stats = drvr_stats(adapter);
  261. ulong now = jiffies;
  262. /* Wrapped around? */
  263. if (time_before(now, stats->be_tx_jiffies)) {
  264. stats->be_tx_jiffies = now;
  265. return;
  266. }
  267. /* Update tx rate once in two seconds */
  268. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  269. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  270. - stats->be_tx_bytes_prev,
  271. now - stats->be_tx_jiffies);
  272. stats->be_tx_jiffies = now;
  273. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  274. }
  275. }
  276. static void be_tx_stats_update(struct be_adapter *adapter,
  277. u32 wrb_cnt, u32 copied, bool stopped)
  278. {
  279. struct be_drvr_stats *stats = drvr_stats(adapter);
  280. stats->be_tx_reqs++;
  281. stats->be_tx_wrbs += wrb_cnt;
  282. stats->be_tx_bytes += copied;
  283. if (stopped)
  284. stats->be_tx_stops++;
  285. }
  286. /* Determine number of WRB entries needed to xmit data in an skb */
  287. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  288. {
  289. int cnt = 0;
  290. while (skb) {
  291. if (skb->len > skb->data_len)
  292. cnt++;
  293. cnt += skb_shinfo(skb)->nr_frags;
  294. skb = skb_shinfo(skb)->frag_list;
  295. }
  296. /* to account for hdr wrb */
  297. cnt++;
  298. if (cnt & 1) {
  299. /* add a dummy to make it an even num */
  300. cnt++;
  301. *dummy = true;
  302. } else
  303. *dummy = false;
  304. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  305. return cnt;
  306. }
  307. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  308. {
  309. wrb->frag_pa_hi = upper_32_bits(addr);
  310. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  311. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  312. }
  313. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  314. bool vlan, u32 wrb_cnt, u32 len)
  315. {
  316. memset(hdr, 0, sizeof(*hdr));
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  318. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  319. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  321. hdr, skb_shinfo(skb)->gso_size);
  322. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  323. if (is_tcp_pkt(skb))
  324. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  325. else if (is_udp_pkt(skb))
  326. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  327. }
  328. if (vlan && vlan_tx_tag_present(skb)) {
  329. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  330. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  331. hdr, vlan_tx_tag_get(skb));
  332. }
  333. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  334. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  335. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  336. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  337. }
  338. static int make_tx_wrbs(struct be_adapter *adapter,
  339. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  340. {
  341. u64 busaddr;
  342. u32 i, copied = 0;
  343. struct pci_dev *pdev = adapter->pdev;
  344. struct sk_buff *first_skb = skb;
  345. struct be_queue_info *txq = &adapter->tx_obj.q;
  346. struct be_eth_wrb *wrb;
  347. struct be_eth_hdr_wrb *hdr;
  348. atomic_add(wrb_cnt, &txq->used);
  349. hdr = queue_head_node(txq);
  350. queue_head_inc(txq);
  351. while (skb) {
  352. if (skb->len > skb->data_len) {
  353. int len = skb->len - skb->data_len;
  354. busaddr = pci_map_single(pdev, skb->data, len,
  355. PCI_DMA_TODEVICE);
  356. wrb = queue_head_node(txq);
  357. wrb_fill(wrb, busaddr, len);
  358. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  359. queue_head_inc(txq);
  360. copied += len;
  361. }
  362. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  363. struct skb_frag_struct *frag =
  364. &skb_shinfo(skb)->frags[i];
  365. busaddr = pci_map_page(pdev, frag->page,
  366. frag->page_offset,
  367. frag->size, PCI_DMA_TODEVICE);
  368. wrb = queue_head_node(txq);
  369. wrb_fill(wrb, busaddr, frag->size);
  370. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  371. queue_head_inc(txq);
  372. copied += frag->size;
  373. }
  374. skb = skb_shinfo(skb)->frag_list;
  375. }
  376. if (dummy_wrb) {
  377. wrb = queue_head_node(txq);
  378. wrb_fill(wrb, 0, 0);
  379. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  380. queue_head_inc(txq);
  381. }
  382. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  383. wrb_cnt, copied);
  384. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  385. return copied;
  386. }
  387. static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
  388. {
  389. struct be_adapter *adapter = netdev_priv(netdev);
  390. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  391. struct be_queue_info *txq = &tx_obj->q;
  392. u32 wrb_cnt = 0, copied = 0;
  393. u32 start = txq->head;
  394. bool dummy_wrb, stopped = false;
  395. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  396. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  397. /* record the sent skb in the sent_skb table */
  398. BUG_ON(tx_obj->sent_skb_list[start]);
  399. tx_obj->sent_skb_list[start] = skb;
  400. /* Ensure that txq has space for the next skb; Else stop the queue
  401. * *BEFORE* ringing the tx doorbell, so that we serialze the
  402. * tx compls of the current transmit which'll wake up the queue
  403. */
  404. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
  405. netif_stop_queue(netdev);
  406. stopped = true;
  407. }
  408. be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
  409. netdev->trans_start = jiffies;
  410. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  411. return NETDEV_TX_OK;
  412. }
  413. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  414. {
  415. struct be_adapter *adapter = netdev_priv(netdev);
  416. if (new_mtu < BE_MIN_MTU ||
  417. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  418. dev_info(&adapter->pdev->dev,
  419. "MTU must be between %d and %d bytes\n",
  420. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  421. return -EINVAL;
  422. }
  423. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  424. netdev->mtu, new_mtu);
  425. netdev->mtu = new_mtu;
  426. return 0;
  427. }
  428. /*
  429. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  430. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  431. * set the BE in promiscuous VLAN mode.
  432. */
  433. static void be_vid_config(struct net_device *netdev)
  434. {
  435. struct be_adapter *adapter = netdev_priv(netdev);
  436. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  437. u16 ntags = 0, i;
  438. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  439. /* Construct VLAN Table to give to HW */
  440. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  441. if (adapter->vlan_tag[i]) {
  442. vtag[ntags] = cpu_to_le16(i);
  443. ntags++;
  444. }
  445. }
  446. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  447. vtag, ntags, 1, 0);
  448. } else {
  449. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  450. NULL, 0, 1, 1);
  451. }
  452. }
  453. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  454. {
  455. struct be_adapter *adapter = netdev_priv(netdev);
  456. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  457. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  458. struct be_ctrl_info *ctrl = &adapter->ctrl;
  459. be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
  460. be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
  461. adapter->vlan_grp = grp;
  462. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  463. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  464. }
  465. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  466. {
  467. struct be_adapter *adapter = netdev_priv(netdev);
  468. adapter->num_vlans++;
  469. adapter->vlan_tag[vid] = 1;
  470. be_vid_config(netdev);
  471. }
  472. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  473. {
  474. struct be_adapter *adapter = netdev_priv(netdev);
  475. adapter->num_vlans--;
  476. adapter->vlan_tag[vid] = 0;
  477. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  478. be_vid_config(netdev);
  479. }
  480. static void be_set_multicast_filter(struct net_device *netdev)
  481. {
  482. struct be_adapter *adapter = netdev_priv(netdev);
  483. struct dev_mc_list *mc_ptr;
  484. u8 mac_addr[32][ETH_ALEN];
  485. int i = 0;
  486. if (netdev->flags & IFF_ALLMULTI) {
  487. /* set BE in Multicast promiscuous */
  488. be_cmd_mcast_mac_set(&adapter->ctrl,
  489. adapter->if_handle, NULL, 0, true);
  490. return;
  491. }
  492. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  493. memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
  494. if (++i >= 32) {
  495. be_cmd_mcast_mac_set(&adapter->ctrl,
  496. adapter->if_handle, &mac_addr[0][0], i, false);
  497. i = 0;
  498. }
  499. }
  500. if (i) {
  501. /* reset the promiscuous mode also. */
  502. be_cmd_mcast_mac_set(&adapter->ctrl,
  503. adapter->if_handle, &mac_addr[0][0], i, false);
  504. }
  505. }
  506. static void be_set_multicast_list(struct net_device *netdev)
  507. {
  508. struct be_adapter *adapter = netdev_priv(netdev);
  509. if (netdev->flags & IFF_PROMISC) {
  510. be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 1);
  511. } else {
  512. be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 0);
  513. be_set_multicast_filter(netdev);
  514. }
  515. }
  516. static void be_rx_rate_update(struct be_adapter *adapter)
  517. {
  518. struct be_drvr_stats *stats = drvr_stats(adapter);
  519. ulong now = jiffies;
  520. /* Wrapped around */
  521. if (time_before(now, stats->be_rx_jiffies)) {
  522. stats->be_rx_jiffies = now;
  523. return;
  524. }
  525. /* Update the rate once in two seconds */
  526. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  527. return;
  528. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  529. - stats->be_rx_bytes_prev,
  530. now - stats->be_rx_jiffies);
  531. stats->be_rx_jiffies = now;
  532. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  533. }
  534. static void be_rx_stats_update(struct be_adapter *adapter,
  535. u32 pktsize, u16 numfrags)
  536. {
  537. struct be_drvr_stats *stats = drvr_stats(adapter);
  538. stats->be_rx_compl++;
  539. stats->be_rx_frags += numfrags;
  540. stats->be_rx_bytes += pktsize;
  541. }
  542. static struct be_rx_page_info *
  543. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  544. {
  545. struct be_rx_page_info *rx_page_info;
  546. struct be_queue_info *rxq = &adapter->rx_obj.q;
  547. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  548. BUG_ON(!rx_page_info->page);
  549. if (rx_page_info->last_page_user)
  550. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  551. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  552. atomic_dec(&rxq->used);
  553. return rx_page_info;
  554. }
  555. /* Throwaway the data in the Rx completion */
  556. static void be_rx_compl_discard(struct be_adapter *adapter,
  557. struct be_eth_rx_compl *rxcp)
  558. {
  559. struct be_queue_info *rxq = &adapter->rx_obj.q;
  560. struct be_rx_page_info *page_info;
  561. u16 rxq_idx, i, num_rcvd;
  562. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  563. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  564. for (i = 0; i < num_rcvd; i++) {
  565. page_info = get_rx_page_info(adapter, rxq_idx);
  566. put_page(page_info->page);
  567. memset(page_info, 0, sizeof(*page_info));
  568. index_inc(&rxq_idx, rxq->len);
  569. }
  570. }
  571. /*
  572. * skb_fill_rx_data forms a complete skb for an ether frame
  573. * indicated by rxcp.
  574. */
  575. static void skb_fill_rx_data(struct be_adapter *adapter,
  576. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  577. {
  578. struct be_queue_info *rxq = &adapter->rx_obj.q;
  579. struct be_rx_page_info *page_info;
  580. u16 rxq_idx, i, num_rcvd;
  581. u32 pktsize, hdr_len, curr_frag_len;
  582. u8 *start;
  583. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  584. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  585. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  586. page_info = get_rx_page_info(adapter, rxq_idx);
  587. start = page_address(page_info->page) + page_info->page_offset;
  588. prefetch(start);
  589. /* Copy data in the first descriptor of this completion */
  590. curr_frag_len = min(pktsize, rx_frag_size);
  591. /* Copy the header portion into skb_data */
  592. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  593. memcpy(skb->data, start, hdr_len);
  594. skb->len = curr_frag_len;
  595. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  596. /* Complete packet has now been moved to data */
  597. put_page(page_info->page);
  598. skb->data_len = 0;
  599. skb->tail += curr_frag_len;
  600. } else {
  601. skb_shinfo(skb)->nr_frags = 1;
  602. skb_shinfo(skb)->frags[0].page = page_info->page;
  603. skb_shinfo(skb)->frags[0].page_offset =
  604. page_info->page_offset + hdr_len;
  605. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  606. skb->data_len = curr_frag_len - hdr_len;
  607. skb->tail += hdr_len;
  608. }
  609. memset(page_info, 0, sizeof(*page_info));
  610. if (pktsize <= rx_frag_size) {
  611. BUG_ON(num_rcvd != 1);
  612. return;
  613. }
  614. /* More frags present for this completion */
  615. pktsize -= curr_frag_len; /* account for above copied frag */
  616. for (i = 1; i < num_rcvd; i++) {
  617. index_inc(&rxq_idx, rxq->len);
  618. page_info = get_rx_page_info(adapter, rxq_idx);
  619. curr_frag_len = min(pktsize, rx_frag_size);
  620. skb_shinfo(skb)->frags[i].page = page_info->page;
  621. skb_shinfo(skb)->frags[i].page_offset = page_info->page_offset;
  622. skb_shinfo(skb)->frags[i].size = curr_frag_len;
  623. skb->len += curr_frag_len;
  624. skb->data_len += curr_frag_len;
  625. skb_shinfo(skb)->nr_frags++;
  626. pktsize -= curr_frag_len;
  627. memset(page_info, 0, sizeof(*page_info));
  628. }
  629. be_rx_stats_update(adapter, pktsize, num_rcvd);
  630. return;
  631. }
  632. /* Process the RX completion indicated by rxcp when LRO is disabled */
  633. static void be_rx_compl_process(struct be_adapter *adapter,
  634. struct be_eth_rx_compl *rxcp)
  635. {
  636. struct sk_buff *skb;
  637. u32 vtp, vid;
  638. int l4_cksm;
  639. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  640. vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  641. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  642. if (!skb) {
  643. if (net_ratelimit())
  644. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  645. be_rx_compl_discard(adapter, rxcp);
  646. return;
  647. }
  648. skb_reserve(skb, NET_IP_ALIGN);
  649. skb_fill_rx_data(adapter, skb, rxcp);
  650. if (l4_cksm && adapter->rx_csum)
  651. skb->ip_summed = CHECKSUM_UNNECESSARY;
  652. else
  653. skb->ip_summed = CHECKSUM_NONE;
  654. skb->truesize = skb->len + sizeof(struct sk_buff);
  655. skb->protocol = eth_type_trans(skb, adapter->netdev);
  656. skb->dev = adapter->netdev;
  657. if (vtp) {
  658. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  659. kfree_skb(skb);
  660. return;
  661. }
  662. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  663. vid = be16_to_cpu(vid);
  664. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  665. } else {
  666. netif_receive_skb(skb);
  667. }
  668. adapter->netdev->last_rx = jiffies;
  669. return;
  670. }
  671. /* Process the RX completion indicated by rxcp when LRO is enabled */
  672. static void be_rx_compl_process_lro(struct be_adapter *adapter,
  673. struct be_eth_rx_compl *rxcp)
  674. {
  675. struct be_rx_page_info *page_info;
  676. struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
  677. struct be_queue_info *rxq = &adapter->rx_obj.q;
  678. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  679. u16 i, rxq_idx = 0, vid;
  680. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  681. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  682. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  683. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  684. remaining = pkt_size;
  685. for (i = 0; i < num_rcvd; i++) {
  686. page_info = get_rx_page_info(adapter, rxq_idx);
  687. curr_frag_len = min(remaining, rx_frag_size);
  688. rx_frags[i].page = page_info->page;
  689. rx_frags[i].page_offset = page_info->page_offset;
  690. rx_frags[i].size = curr_frag_len;
  691. remaining -= curr_frag_len;
  692. index_inc(&rxq_idx, rxq->len);
  693. memset(page_info, 0, sizeof(*page_info));
  694. }
  695. if (likely(!vlanf)) {
  696. lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
  697. pkt_size, NULL, 0);
  698. } else {
  699. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  700. vid = be16_to_cpu(vid);
  701. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  702. return;
  703. lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
  704. rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
  705. vid, NULL, 0);
  706. }
  707. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  708. return;
  709. }
  710. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  711. {
  712. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  713. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  714. return NULL;
  715. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  716. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  717. queue_tail_inc(&adapter->rx_obj.cq);
  718. return rxcp;
  719. }
  720. static inline struct page *be_alloc_pages(u32 size)
  721. {
  722. gfp_t alloc_flags = GFP_ATOMIC;
  723. u32 order = get_order(size);
  724. if (order > 0)
  725. alloc_flags |= __GFP_COMP;
  726. return alloc_pages(alloc_flags, order);
  727. }
  728. /*
  729. * Allocate a page, split it to fragments of size rx_frag_size and post as
  730. * receive buffers to BE
  731. */
  732. static void be_post_rx_frags(struct be_adapter *adapter)
  733. {
  734. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  735. struct be_rx_page_info *page_info = NULL;
  736. struct be_queue_info *rxq = &adapter->rx_obj.q;
  737. struct page *pagep = NULL;
  738. struct be_eth_rx_d *rxd;
  739. u64 page_dmaaddr = 0, frag_dmaaddr;
  740. u32 posted, page_offset = 0;
  741. page_info = &page_info_tbl[rxq->head];
  742. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  743. if (!pagep) {
  744. pagep = be_alloc_pages(adapter->big_page_size);
  745. if (unlikely(!pagep)) {
  746. drvr_stats(adapter)->be_ethrx_post_fail++;
  747. break;
  748. }
  749. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  750. adapter->big_page_size,
  751. PCI_DMA_FROMDEVICE);
  752. page_info->page_offset = 0;
  753. } else {
  754. get_page(pagep);
  755. page_info->page_offset = page_offset + rx_frag_size;
  756. }
  757. page_offset = page_info->page_offset;
  758. page_info->page = pagep;
  759. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  760. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  761. rxd = queue_head_node(rxq);
  762. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  763. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  764. queue_head_inc(rxq);
  765. /* Any space left in the current big page for another frag? */
  766. if ((page_offset + rx_frag_size + rx_frag_size) >
  767. adapter->big_page_size) {
  768. pagep = NULL;
  769. page_info->last_page_user = true;
  770. }
  771. page_info = &page_info_tbl[rxq->head];
  772. }
  773. if (pagep)
  774. page_info->last_page_user = true;
  775. if (posted) {
  776. atomic_add(posted, &rxq->used);
  777. be_rxq_notify(&adapter->ctrl, rxq->id, posted);
  778. } else if (atomic_read(&rxq->used) == 0) {
  779. /* Let be_worker replenish when memory is available */
  780. adapter->rx_post_starved = true;
  781. }
  782. return;
  783. }
  784. static struct be_eth_tx_compl *
  785. be_tx_compl_get(struct be_adapter *adapter)
  786. {
  787. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  788. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  789. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  790. return NULL;
  791. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  792. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  793. queue_tail_inc(tx_cq);
  794. return txcp;
  795. }
  796. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  797. {
  798. struct be_queue_info *txq = &adapter->tx_obj.q;
  799. struct be_eth_wrb *wrb;
  800. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  801. struct sk_buff *sent_skb;
  802. u64 busaddr;
  803. u16 cur_index, num_wrbs = 0;
  804. cur_index = txq->tail;
  805. sent_skb = sent_skbs[cur_index];
  806. BUG_ON(!sent_skb);
  807. sent_skbs[cur_index] = NULL;
  808. do {
  809. cur_index = txq->tail;
  810. wrb = queue_tail_node(txq);
  811. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  812. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  813. if (busaddr != 0) {
  814. pci_unmap_single(adapter->pdev, busaddr,
  815. wrb->frag_len, PCI_DMA_TODEVICE);
  816. }
  817. num_wrbs++;
  818. queue_tail_inc(txq);
  819. } while (cur_index != last_index);
  820. atomic_sub(num_wrbs, &txq->used);
  821. kfree_skb(sent_skb);
  822. }
  823. static void be_rx_q_clean(struct be_adapter *adapter)
  824. {
  825. struct be_rx_page_info *page_info;
  826. struct be_queue_info *rxq = &adapter->rx_obj.q;
  827. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  828. struct be_eth_rx_compl *rxcp;
  829. u16 tail;
  830. /* First cleanup pending rx completions */
  831. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  832. be_rx_compl_discard(adapter, rxcp);
  833. be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
  834. }
  835. /* Then free posted rx buffer that were not used */
  836. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  837. for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
  838. page_info = get_rx_page_info(adapter, tail);
  839. put_page(page_info->page);
  840. memset(page_info, 0, sizeof(*page_info));
  841. }
  842. BUG_ON(atomic_read(&rxq->used));
  843. }
  844. static void be_tx_q_clean(struct be_adapter *adapter)
  845. {
  846. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  847. struct sk_buff *sent_skb;
  848. struct be_queue_info *txq = &adapter->tx_obj.q;
  849. u16 last_index;
  850. bool dummy_wrb;
  851. while (atomic_read(&txq->used)) {
  852. sent_skb = sent_skbs[txq->tail];
  853. last_index = txq->tail;
  854. index_adv(&last_index,
  855. wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
  856. be_tx_compl_process(adapter, last_index);
  857. }
  858. }
  859. static void be_tx_queues_destroy(struct be_adapter *adapter)
  860. {
  861. struct be_queue_info *q;
  862. q = &adapter->tx_obj.q;
  863. if (q->created)
  864. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
  865. be_queue_free(adapter, q);
  866. q = &adapter->tx_obj.cq;
  867. if (q->created)
  868. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  869. be_queue_free(adapter, q);
  870. /* No more tx completions can be rcvd now; clean up if there are
  871. * any pending completions or pending tx requests */
  872. be_tx_q_clean(adapter);
  873. q = &adapter->tx_eq.q;
  874. if (q->created)
  875. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  876. be_queue_free(adapter, q);
  877. }
  878. static int be_tx_queues_create(struct be_adapter *adapter)
  879. {
  880. struct be_queue_info *eq, *q, *cq;
  881. adapter->tx_eq.max_eqd = 0;
  882. adapter->tx_eq.min_eqd = 0;
  883. adapter->tx_eq.cur_eqd = 96;
  884. adapter->tx_eq.enable_aic = false;
  885. /* Alloc Tx Event queue */
  886. eq = &adapter->tx_eq.q;
  887. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  888. return -1;
  889. /* Ask BE to create Tx Event queue */
  890. if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
  891. goto tx_eq_free;
  892. /* Alloc TX eth compl queue */
  893. cq = &adapter->tx_obj.cq;
  894. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  895. sizeof(struct be_eth_tx_compl)))
  896. goto tx_eq_destroy;
  897. /* Ask BE to create Tx eth compl queue */
  898. if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
  899. goto tx_cq_free;
  900. /* Alloc TX eth queue */
  901. q = &adapter->tx_obj.q;
  902. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  903. goto tx_cq_destroy;
  904. /* Ask BE to create Tx eth queue */
  905. if (be_cmd_txq_create(&adapter->ctrl, q, cq))
  906. goto tx_q_free;
  907. return 0;
  908. tx_q_free:
  909. be_queue_free(adapter, q);
  910. tx_cq_destroy:
  911. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  912. tx_cq_free:
  913. be_queue_free(adapter, cq);
  914. tx_eq_destroy:
  915. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  916. tx_eq_free:
  917. be_queue_free(adapter, eq);
  918. return -1;
  919. }
  920. static void be_rx_queues_destroy(struct be_adapter *adapter)
  921. {
  922. struct be_queue_info *q;
  923. q = &adapter->rx_obj.q;
  924. if (q->created) {
  925. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
  926. be_rx_q_clean(adapter);
  927. }
  928. be_queue_free(adapter, q);
  929. q = &adapter->rx_obj.cq;
  930. if (q->created)
  931. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  932. be_queue_free(adapter, q);
  933. q = &adapter->rx_eq.q;
  934. if (q->created)
  935. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  936. be_queue_free(adapter, q);
  937. }
  938. static int be_rx_queues_create(struct be_adapter *adapter)
  939. {
  940. struct be_queue_info *eq, *q, *cq;
  941. int rc;
  942. adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
  943. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  944. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  945. adapter->rx_eq.min_eqd = 0;
  946. adapter->rx_eq.cur_eqd = 0;
  947. adapter->rx_eq.enable_aic = true;
  948. /* Alloc Rx Event queue */
  949. eq = &adapter->rx_eq.q;
  950. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  951. sizeof(struct be_eq_entry));
  952. if (rc)
  953. return rc;
  954. /* Ask BE to create Rx Event queue */
  955. rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
  956. if (rc)
  957. goto rx_eq_free;
  958. /* Alloc RX eth compl queue */
  959. cq = &adapter->rx_obj.cq;
  960. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  961. sizeof(struct be_eth_rx_compl));
  962. if (rc)
  963. goto rx_eq_destroy;
  964. /* Ask BE to create Rx eth compl queue */
  965. rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
  966. if (rc)
  967. goto rx_cq_free;
  968. /* Alloc RX eth queue */
  969. q = &adapter->rx_obj.q;
  970. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  971. if (rc)
  972. goto rx_cq_destroy;
  973. /* Ask BE to create Rx eth queue */
  974. rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
  975. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  976. if (rc)
  977. goto rx_q_free;
  978. return 0;
  979. rx_q_free:
  980. be_queue_free(adapter, q);
  981. rx_cq_destroy:
  982. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  983. rx_cq_free:
  984. be_queue_free(adapter, cq);
  985. rx_eq_destroy:
  986. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  987. rx_eq_free:
  988. be_queue_free(adapter, eq);
  989. return rc;
  990. }
  991. static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
  992. {
  993. struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
  994. u32 evt = entry->evt;
  995. if (!evt)
  996. return false;
  997. evt = le32_to_cpu(evt);
  998. *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
  999. entry->evt = 0;
  1000. queue_tail_inc(&eq_obj->q);
  1001. return true;
  1002. }
  1003. static int event_handle(struct be_ctrl_info *ctrl,
  1004. struct be_eq_obj *eq_obj)
  1005. {
  1006. u16 rid = 0, num = 0;
  1007. while (event_get(eq_obj, &rid))
  1008. num++;
  1009. /* We can see an interrupt and no event */
  1010. be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
  1011. if (num)
  1012. napi_schedule(&eq_obj->napi);
  1013. return num;
  1014. }
  1015. static irqreturn_t be_intx(int irq, void *dev)
  1016. {
  1017. struct be_adapter *adapter = dev;
  1018. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1019. int rx, tx;
  1020. tx = event_handle(ctrl, &adapter->tx_eq);
  1021. rx = event_handle(ctrl, &adapter->rx_eq);
  1022. if (rx || tx)
  1023. return IRQ_HANDLED;
  1024. else
  1025. return IRQ_NONE;
  1026. }
  1027. static irqreturn_t be_msix_rx(int irq, void *dev)
  1028. {
  1029. struct be_adapter *adapter = dev;
  1030. event_handle(&adapter->ctrl, &adapter->rx_eq);
  1031. return IRQ_HANDLED;
  1032. }
  1033. static irqreturn_t be_msix_tx(int irq, void *dev)
  1034. {
  1035. struct be_adapter *adapter = dev;
  1036. event_handle(&adapter->ctrl, &adapter->tx_eq);
  1037. return IRQ_HANDLED;
  1038. }
  1039. static inline bool do_lro(struct be_adapter *adapter,
  1040. struct be_eth_rx_compl *rxcp)
  1041. {
  1042. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1043. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1044. if (err)
  1045. drvr_stats(adapter)->be_rxcp_err++;
  1046. return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
  1047. false : true;
  1048. }
  1049. int be_poll_rx(struct napi_struct *napi, int budget)
  1050. {
  1051. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1052. struct be_adapter *adapter =
  1053. container_of(rx_eq, struct be_adapter, rx_eq);
  1054. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1055. struct be_eth_rx_compl *rxcp;
  1056. u32 work_done;
  1057. for (work_done = 0; work_done < budget; work_done++) {
  1058. rxcp = be_rx_compl_get(adapter);
  1059. if (!rxcp)
  1060. break;
  1061. if (do_lro(adapter, rxcp))
  1062. be_rx_compl_process_lro(adapter, rxcp);
  1063. else
  1064. be_rx_compl_process(adapter, rxcp);
  1065. }
  1066. lro_flush_all(&adapter->rx_obj.lro_mgr);
  1067. /* Refill the queue */
  1068. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1069. be_post_rx_frags(adapter);
  1070. /* All consumed */
  1071. if (work_done < budget) {
  1072. napi_complete(napi);
  1073. be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
  1074. } else {
  1075. /* More to be consumed; continue with interrupts disabled */
  1076. be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
  1077. }
  1078. return work_done;
  1079. }
  1080. /* For TX we don't honour budget; consume everything */
  1081. int be_poll_tx(struct napi_struct *napi, int budget)
  1082. {
  1083. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1084. struct be_adapter *adapter =
  1085. container_of(tx_eq, struct be_adapter, tx_eq);
  1086. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  1087. struct be_queue_info *tx_cq = &tx_obj->cq;
  1088. struct be_queue_info *txq = &tx_obj->q;
  1089. struct be_eth_tx_compl *txcp;
  1090. u32 num_cmpl = 0;
  1091. u16 end_idx;
  1092. while ((txcp = be_tx_compl_get(adapter))) {
  1093. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1094. wrb_index, txcp);
  1095. be_tx_compl_process(adapter, end_idx);
  1096. num_cmpl++;
  1097. }
  1098. /* As Tx wrbs have been freed up, wake up netdev queue if
  1099. * it was stopped due to lack of tx wrbs.
  1100. */
  1101. if (netif_queue_stopped(adapter->netdev) &&
  1102. atomic_read(&txq->used) < txq->len / 2) {
  1103. netif_wake_queue(adapter->netdev);
  1104. }
  1105. napi_complete(napi);
  1106. be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
  1107. drvr_stats(adapter)->be_tx_events++;
  1108. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1109. return 1;
  1110. }
  1111. static void be_worker(struct work_struct *work)
  1112. {
  1113. struct be_adapter *adapter =
  1114. container_of(work, struct be_adapter, work.work);
  1115. int status;
  1116. /* Check link */
  1117. be_link_status_update(adapter);
  1118. /* Get Stats */
  1119. status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
  1120. if (!status)
  1121. netdev_stats_update(adapter);
  1122. /* Set EQ delay */
  1123. be_rx_eqd_update(adapter);
  1124. be_tx_rate_update(adapter);
  1125. be_rx_rate_update(adapter);
  1126. if (adapter->rx_post_starved) {
  1127. adapter->rx_post_starved = false;
  1128. be_post_rx_frags(adapter);
  1129. }
  1130. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1131. }
  1132. static void be_msix_enable(struct be_adapter *adapter)
  1133. {
  1134. int i, status;
  1135. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1136. adapter->msix_entries[i].entry = i;
  1137. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1138. BE_NUM_MSIX_VECTORS);
  1139. if (status == 0)
  1140. adapter->msix_enabled = true;
  1141. return;
  1142. }
  1143. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1144. {
  1145. return adapter->msix_entries[eq_id -
  1146. 8 * adapter->ctrl.pci_func].vector;
  1147. }
  1148. static int be_msix_register(struct be_adapter *adapter)
  1149. {
  1150. struct net_device *netdev = adapter->netdev;
  1151. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1152. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1153. int status, vec;
  1154. sprintf(tx_eq->desc, "%s-tx", netdev->name);
  1155. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1156. status = request_irq(vec, be_msix_tx, 0, tx_eq->desc, adapter);
  1157. if (status)
  1158. goto err;
  1159. sprintf(rx_eq->desc, "%s-rx", netdev->name);
  1160. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1161. status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
  1162. if (status) { /* Free TX IRQ */
  1163. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1164. free_irq(vec, adapter);
  1165. goto err;
  1166. }
  1167. return 0;
  1168. err:
  1169. dev_warn(&adapter->pdev->dev,
  1170. "MSIX Request IRQ failed - err %d\n", status);
  1171. pci_disable_msix(adapter->pdev);
  1172. adapter->msix_enabled = false;
  1173. return status;
  1174. }
  1175. static int be_irq_register(struct be_adapter *adapter)
  1176. {
  1177. struct net_device *netdev = adapter->netdev;
  1178. int status;
  1179. if (adapter->msix_enabled) {
  1180. status = be_msix_register(adapter);
  1181. if (status == 0)
  1182. goto done;
  1183. }
  1184. /* INTx */
  1185. netdev->irq = adapter->pdev->irq;
  1186. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1187. adapter);
  1188. if (status) {
  1189. dev_err(&adapter->pdev->dev,
  1190. "INTx request IRQ failed - err %d\n", status);
  1191. return status;
  1192. }
  1193. done:
  1194. adapter->isr_registered = true;
  1195. return 0;
  1196. }
  1197. static void be_irq_unregister(struct be_adapter *adapter)
  1198. {
  1199. struct net_device *netdev = adapter->netdev;
  1200. int vec;
  1201. if (!adapter->isr_registered)
  1202. return;
  1203. /* INTx */
  1204. if (!adapter->msix_enabled) {
  1205. free_irq(netdev->irq, adapter);
  1206. goto done;
  1207. }
  1208. /* MSIx */
  1209. vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
  1210. free_irq(vec, adapter);
  1211. vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
  1212. free_irq(vec, adapter);
  1213. done:
  1214. adapter->isr_registered = false;
  1215. return;
  1216. }
  1217. static int be_open(struct net_device *netdev)
  1218. {
  1219. struct be_adapter *adapter = netdev_priv(netdev);
  1220. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1221. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1222. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1223. u32 if_flags;
  1224. int status;
  1225. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1226. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1227. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1228. status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
  1229. false/* pmac_invalid */, &adapter->if_handle,
  1230. &adapter->pmac_id);
  1231. if (status != 0)
  1232. goto do_none;
  1233. be_vid_config(netdev);
  1234. status = be_cmd_set_flow_control(ctrl, true, true);
  1235. if (status != 0)
  1236. goto if_destroy;
  1237. status = be_tx_queues_create(adapter);
  1238. if (status != 0)
  1239. goto if_destroy;
  1240. status = be_rx_queues_create(adapter);
  1241. if (status != 0)
  1242. goto tx_qs_destroy;
  1243. /* First time posting */
  1244. be_post_rx_frags(adapter);
  1245. napi_enable(&rx_eq->napi);
  1246. napi_enable(&tx_eq->napi);
  1247. be_irq_register(adapter);
  1248. be_intr_set(ctrl, true);
  1249. /* The evt queues are created in the unarmed state; arm them */
  1250. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  1251. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  1252. /* The compl queues are created in the unarmed state; arm them */
  1253. be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
  1254. be_cq_notify(ctrl, adapter->tx_obj.cq.id, true, 0);
  1255. be_link_status_update(adapter);
  1256. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1257. return 0;
  1258. tx_qs_destroy:
  1259. be_tx_queues_destroy(adapter);
  1260. if_destroy:
  1261. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1262. do_none:
  1263. return status;
  1264. }
  1265. static int be_close(struct net_device *netdev)
  1266. {
  1267. struct be_adapter *adapter = netdev_priv(netdev);
  1268. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1269. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1270. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1271. int vec;
  1272. cancel_delayed_work(&adapter->work);
  1273. netif_stop_queue(netdev);
  1274. netif_carrier_off(netdev);
  1275. adapter->link.speed = PHY_LINK_SPEED_ZERO;
  1276. be_intr_set(ctrl, false);
  1277. if (adapter->msix_enabled) {
  1278. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1279. synchronize_irq(vec);
  1280. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1281. synchronize_irq(vec);
  1282. } else {
  1283. synchronize_irq(netdev->irq);
  1284. }
  1285. be_irq_unregister(adapter);
  1286. napi_disable(&rx_eq->napi);
  1287. napi_disable(&tx_eq->napi);
  1288. be_rx_queues_destroy(adapter);
  1289. be_tx_queues_destroy(adapter);
  1290. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1291. return 0;
  1292. }
  1293. static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
  1294. void **ip_hdr, void **tcpudp_hdr,
  1295. u64 *hdr_flags, void *priv)
  1296. {
  1297. struct ethhdr *eh;
  1298. struct vlan_ethhdr *veh;
  1299. struct iphdr *iph;
  1300. u8 *va = page_address(frag->page) + frag->page_offset;
  1301. unsigned long ll_hlen;
  1302. prefetch(va);
  1303. eh = (struct ethhdr *)va;
  1304. *mac_hdr = eh;
  1305. ll_hlen = ETH_HLEN;
  1306. if (eh->h_proto != htons(ETH_P_IP)) {
  1307. if (eh->h_proto == htons(ETH_P_8021Q)) {
  1308. veh = (struct vlan_ethhdr *)va;
  1309. if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
  1310. return -1;
  1311. ll_hlen += VLAN_HLEN;
  1312. } else {
  1313. return -1;
  1314. }
  1315. }
  1316. *hdr_flags = LRO_IPV4;
  1317. iph = (struct iphdr *)(va + ll_hlen);
  1318. *ip_hdr = iph;
  1319. if (iph->protocol != IPPROTO_TCP)
  1320. return -1;
  1321. *hdr_flags |= LRO_TCP;
  1322. *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
  1323. return 0;
  1324. }
  1325. static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
  1326. {
  1327. struct net_lro_mgr *lro_mgr;
  1328. lro_mgr = &adapter->rx_obj.lro_mgr;
  1329. lro_mgr->dev = netdev;
  1330. lro_mgr->features = LRO_F_NAPI;
  1331. lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
  1332. lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1333. lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
  1334. lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
  1335. lro_mgr->get_frag_header = be_get_frag_header;
  1336. lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
  1337. }
  1338. static struct net_device_ops be_netdev_ops = {
  1339. .ndo_open = be_open,
  1340. .ndo_stop = be_close,
  1341. .ndo_start_xmit = be_xmit,
  1342. .ndo_get_stats = be_get_stats,
  1343. .ndo_set_rx_mode = be_set_multicast_list,
  1344. .ndo_set_mac_address = be_mac_addr_set,
  1345. .ndo_change_mtu = be_change_mtu,
  1346. .ndo_validate_addr = eth_validate_addr,
  1347. .ndo_vlan_rx_register = be_vlan_register,
  1348. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1349. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1350. };
  1351. static void be_netdev_init(struct net_device *netdev)
  1352. {
  1353. struct be_adapter *adapter = netdev_priv(netdev);
  1354. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1355. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
  1356. NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
  1357. netdev->flags |= IFF_MULTICAST;
  1358. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1359. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1360. be_lro_init(adapter, netdev);
  1361. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1362. BE_NAPI_WEIGHT);
  1363. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx,
  1364. BE_NAPI_WEIGHT);
  1365. netif_carrier_off(netdev);
  1366. netif_stop_queue(netdev);
  1367. }
  1368. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1369. {
  1370. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1371. if (ctrl->csr)
  1372. iounmap(ctrl->csr);
  1373. if (ctrl->db)
  1374. iounmap(ctrl->db);
  1375. if (ctrl->pcicfg)
  1376. iounmap(ctrl->pcicfg);
  1377. }
  1378. static int be_map_pci_bars(struct be_adapter *adapter)
  1379. {
  1380. u8 __iomem *addr;
  1381. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1382. pci_resource_len(adapter->pdev, 2));
  1383. if (addr == NULL)
  1384. return -ENOMEM;
  1385. adapter->ctrl.csr = addr;
  1386. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1387. 128 * 1024);
  1388. if (addr == NULL)
  1389. goto pci_map_err;
  1390. adapter->ctrl.db = addr;
  1391. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1392. pci_resource_len(adapter->pdev, 1));
  1393. if (addr == NULL)
  1394. goto pci_map_err;
  1395. adapter->ctrl.pcicfg = addr;
  1396. return 0;
  1397. pci_map_err:
  1398. be_unmap_pci_bars(adapter);
  1399. return -ENOMEM;
  1400. }
  1401. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1402. {
  1403. struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
  1404. be_unmap_pci_bars(adapter);
  1405. if (mem->va)
  1406. pci_free_consistent(adapter->pdev, mem->size,
  1407. mem->va, mem->dma);
  1408. }
  1409. /* Initialize the mbox required to send cmds to BE */
  1410. static int be_ctrl_init(struct be_adapter *adapter)
  1411. {
  1412. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1413. struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
  1414. struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
  1415. int status;
  1416. u32 val;
  1417. status = be_map_pci_bars(adapter);
  1418. if (status)
  1419. return status;
  1420. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1421. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1422. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1423. if (!mbox_mem_alloc->va) {
  1424. be_unmap_pci_bars(adapter);
  1425. return -1;
  1426. }
  1427. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1428. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1429. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1430. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1431. spin_lock_init(&ctrl->cmd_lock);
  1432. val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
  1433. ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
  1434. MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
  1435. return 0;
  1436. }
  1437. static void be_stats_cleanup(struct be_adapter *adapter)
  1438. {
  1439. struct be_stats_obj *stats = &adapter->stats;
  1440. struct be_dma_mem *cmd = &stats->cmd;
  1441. if (cmd->va)
  1442. pci_free_consistent(adapter->pdev, cmd->size,
  1443. cmd->va, cmd->dma);
  1444. }
  1445. static int be_stats_init(struct be_adapter *adapter)
  1446. {
  1447. struct be_stats_obj *stats = &adapter->stats;
  1448. struct be_dma_mem *cmd = &stats->cmd;
  1449. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1450. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1451. if (cmd->va == NULL)
  1452. return -1;
  1453. return 0;
  1454. }
  1455. static void __devexit be_remove(struct pci_dev *pdev)
  1456. {
  1457. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1458. if (!adapter)
  1459. return;
  1460. unregister_netdev(adapter->netdev);
  1461. be_stats_cleanup(adapter);
  1462. be_ctrl_cleanup(adapter);
  1463. if (adapter->msix_enabled) {
  1464. pci_disable_msix(adapter->pdev);
  1465. adapter->msix_enabled = false;
  1466. }
  1467. pci_set_drvdata(pdev, NULL);
  1468. pci_release_regions(pdev);
  1469. pci_disable_device(pdev);
  1470. free_netdev(adapter->netdev);
  1471. }
  1472. static int be_hw_up(struct be_adapter *adapter)
  1473. {
  1474. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1475. int status;
  1476. status = be_cmd_POST(ctrl);
  1477. if (status)
  1478. return status;
  1479. status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
  1480. if (status)
  1481. return status;
  1482. status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
  1483. return status;
  1484. }
  1485. static int __devinit be_probe(struct pci_dev *pdev,
  1486. const struct pci_device_id *pdev_id)
  1487. {
  1488. int status = 0;
  1489. struct be_adapter *adapter;
  1490. struct net_device *netdev;
  1491. struct be_ctrl_info *ctrl;
  1492. u8 mac[ETH_ALEN];
  1493. status = pci_enable_device(pdev);
  1494. if (status)
  1495. goto do_none;
  1496. status = pci_request_regions(pdev, DRV_NAME);
  1497. if (status)
  1498. goto disable_dev;
  1499. pci_set_master(pdev);
  1500. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1501. if (netdev == NULL) {
  1502. status = -ENOMEM;
  1503. goto rel_reg;
  1504. }
  1505. adapter = netdev_priv(netdev);
  1506. adapter->pdev = pdev;
  1507. pci_set_drvdata(pdev, adapter);
  1508. adapter->netdev = netdev;
  1509. be_msix_enable(adapter);
  1510. status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1511. if (!status) {
  1512. netdev->features |= NETIF_F_HIGHDMA;
  1513. } else {
  1514. status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1515. if (status) {
  1516. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1517. goto free_netdev;
  1518. }
  1519. }
  1520. ctrl = &adapter->ctrl;
  1521. status = be_ctrl_init(adapter);
  1522. if (status)
  1523. goto free_netdev;
  1524. status = be_stats_init(adapter);
  1525. if (status)
  1526. goto ctrl_clean;
  1527. status = be_hw_up(adapter);
  1528. if (status)
  1529. goto stats_clean;
  1530. status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
  1531. true /* permanent */, 0);
  1532. if (status)
  1533. goto stats_clean;
  1534. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1535. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1536. be_netdev_init(netdev);
  1537. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1538. status = register_netdev(netdev);
  1539. if (status != 0)
  1540. goto stats_clean;
  1541. dev_info(&pdev->dev, BE_NAME " port %d\n", adapter->port_num);
  1542. return 0;
  1543. stats_clean:
  1544. be_stats_cleanup(adapter);
  1545. ctrl_clean:
  1546. be_ctrl_cleanup(adapter);
  1547. free_netdev:
  1548. free_netdev(adapter->netdev);
  1549. rel_reg:
  1550. pci_release_regions(pdev);
  1551. disable_dev:
  1552. pci_disable_device(pdev);
  1553. do_none:
  1554. dev_warn(&pdev->dev, BE_NAME " initialization failed\n");
  1555. return status;
  1556. }
  1557. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1558. {
  1559. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1560. struct net_device *netdev = adapter->netdev;
  1561. netif_device_detach(netdev);
  1562. if (netif_running(netdev)) {
  1563. rtnl_lock();
  1564. be_close(netdev);
  1565. rtnl_unlock();
  1566. }
  1567. pci_save_state(pdev);
  1568. pci_disable_device(pdev);
  1569. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1570. return 0;
  1571. }
  1572. static int be_resume(struct pci_dev *pdev)
  1573. {
  1574. int status = 0;
  1575. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1576. struct net_device *netdev = adapter->netdev;
  1577. netif_device_detach(netdev);
  1578. status = pci_enable_device(pdev);
  1579. if (status)
  1580. return status;
  1581. pci_set_power_state(pdev, 0);
  1582. pci_restore_state(pdev);
  1583. if (netif_running(netdev)) {
  1584. rtnl_lock();
  1585. be_open(netdev);
  1586. rtnl_unlock();
  1587. }
  1588. netif_device_attach(netdev);
  1589. return 0;
  1590. }
  1591. static struct pci_driver be_driver = {
  1592. .name = DRV_NAME,
  1593. .id_table = be_dev_ids,
  1594. .probe = be_probe,
  1595. .remove = be_remove,
  1596. .suspend = be_suspend,
  1597. .resume = be_resume
  1598. };
  1599. static int __init be_init_module(void)
  1600. {
  1601. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1602. && rx_frag_size != 2048) {
  1603. printk(KERN_WARNING DRV_NAME
  1604. " : Module param rx_frag_size must be 2048/4096/8192."
  1605. " Using 2048\n");
  1606. rx_frag_size = 2048;
  1607. }
  1608. /* Ensure rx_frag_size is aligned to chache line */
  1609. if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
  1610. printk(KERN_WARNING DRV_NAME
  1611. " : Bad module param rx_frag_size. Using 2048\n");
  1612. rx_frag_size = 2048;
  1613. }
  1614. return pci_register_driver(&be_driver);
  1615. }
  1616. module_init(be_init_module);
  1617. static void __exit be_exit_module(void)
  1618. {
  1619. pci_unregister_driver(&be_driver);
  1620. }
  1621. module_exit(be_exit_module);