be.h 8.4 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #ifndef BE_H
  18. #define BE_H
  19. #include <linux/pci.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/version.h>
  22. #include <linux/delay.h>
  23. #include <net/tcp.h>
  24. #include <net/ip.h>
  25. #include <net/ipv6.h>
  26. #include <linux/if_vlan.h>
  27. #include <linux/workqueue.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/inet_lro.h>
  30. #include "be_hw.h"
  31. #define DRV_VER "2.0.348"
  32. #define DRV_NAME "be2net"
  33. #define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
  34. #define DRV_DESC BE_NAME "Driver"
  35. /* Number of bytes of an RX frame that are copied to skb->data */
  36. #define BE_HDR_LEN 64
  37. #define BE_MAX_JUMBO_FRAME_SIZE 9018
  38. #define BE_MIN_MTU 256
  39. #define BE_NUM_VLANS_SUPPORTED 64
  40. #define BE_MAX_EQD 96
  41. #define BE_MAX_TX_FRAG_COUNT 30
  42. #define EVNT_Q_LEN 1024
  43. #define TX_Q_LEN 2048
  44. #define TX_CQ_LEN 1024
  45. #define RX_Q_LEN 1024 /* Does not support any other value */
  46. #define RX_CQ_LEN 1024
  47. #define MCC_Q_LEN 64 /* total size not to exceed 8 pages */
  48. #define MCC_CQ_LEN 256
  49. #define BE_NAPI_WEIGHT 64
  50. #define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
  51. #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
  52. #define BE_MAX_LRO_DESCRIPTORS 16
  53. #define BE_MAX_FRAGS_PER_FRAME 16
  54. struct be_dma_mem {
  55. void *va;
  56. dma_addr_t dma;
  57. u32 size;
  58. };
  59. struct be_queue_info {
  60. struct be_dma_mem dma_mem;
  61. u16 len;
  62. u16 entry_size; /* Size of an element in the queue */
  63. u16 id;
  64. u16 tail, head;
  65. bool created;
  66. atomic_t used; /* Number of valid elements in the queue */
  67. };
  68. struct be_ctrl_info {
  69. u8 __iomem *csr;
  70. u8 __iomem *db; /* Door Bell */
  71. u8 __iomem *pcicfg; /* PCI config space */
  72. int pci_func;
  73. /* Mbox used for cmd request/response */
  74. spinlock_t cmd_lock; /* For serializing cmds to BE card */
  75. struct be_dma_mem mbox_mem;
  76. /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
  77. * is stored for freeing purpose */
  78. struct be_dma_mem mbox_mem_alloced;
  79. };
  80. #include "be_cmds.h"
  81. struct be_drvr_stats {
  82. u32 be_tx_reqs; /* number of TX requests initiated */
  83. u32 be_tx_stops; /* number of times TX Q was stopped */
  84. u32 be_fwd_reqs; /* number of send reqs through forwarding i/f */
  85. u32 be_tx_wrbs; /* number of tx WRBs used */
  86. u32 be_tx_events; /* number of tx completion events */
  87. u32 be_tx_compl; /* number of tx completion entries processed */
  88. ulong be_tx_jiffies;
  89. u64 be_tx_bytes;
  90. u64 be_tx_bytes_prev;
  91. u32 be_tx_rate;
  92. u32 cache_barrier[16];
  93. u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
  94. u32 be_polls; /* number of times NAPI called poll function */
  95. u32 be_rx_events; /* number of ucast rx completion events */
  96. u32 be_rx_compl; /* number of rx completion entries processed */
  97. u32 be_lro_hgram_data[8]; /* histogram of LRO data packets */
  98. u32 be_lro_hgram_ack[8]; /* histogram of LRO ACKs */
  99. ulong be_rx_jiffies;
  100. u64 be_rx_bytes;
  101. u64 be_rx_bytes_prev;
  102. u32 be_rx_rate;
  103. /* number of non ether type II frames dropped where
  104. * frame len > length field of Mac Hdr */
  105. u32 be_802_3_dropped_frames;
  106. /* number of non ether type II frames malformed where
  107. * in frame len < length field of Mac Hdr */
  108. u32 be_802_3_malformed_frames;
  109. u32 be_rxcp_err; /* Num rx completion entries w/ err set. */
  110. ulong rx_fps_jiffies; /* jiffies at last FPS calc */
  111. u32 be_rx_frags;
  112. u32 be_prev_rx_frags;
  113. u32 be_rx_fps; /* Rx frags per second */
  114. };
  115. struct be_stats_obj {
  116. struct be_drvr_stats drvr_stats;
  117. struct net_device_stats net_stats;
  118. struct be_dma_mem cmd;
  119. };
  120. struct be_eq_obj {
  121. struct be_queue_info q;
  122. char desc[32];
  123. /* Adaptive interrupt coalescing (AIC) info */
  124. bool enable_aic;
  125. u16 min_eqd; /* in usecs */
  126. u16 max_eqd; /* in usecs */
  127. u16 cur_eqd; /* in usecs */
  128. struct napi_struct napi;
  129. };
  130. struct be_tx_obj {
  131. struct be_queue_info q;
  132. struct be_queue_info cq;
  133. /* Remember the skbs that were transmitted */
  134. struct sk_buff *sent_skb_list[TX_Q_LEN];
  135. };
  136. /* Struct to remember the pages posted for rx frags */
  137. struct be_rx_page_info {
  138. struct page *page;
  139. dma_addr_t bus;
  140. u16 page_offset;
  141. bool last_page_user;
  142. };
  143. struct be_rx_obj {
  144. struct be_queue_info q;
  145. struct be_queue_info cq;
  146. struct be_rx_page_info page_info_tbl[RX_Q_LEN];
  147. struct net_lro_mgr lro_mgr;
  148. struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
  149. };
  150. #define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
  151. struct be_adapter {
  152. struct pci_dev *pdev;
  153. struct net_device *netdev;
  154. /* Mbox, pci config, csr address information */
  155. struct be_ctrl_info ctrl;
  156. struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
  157. bool msix_enabled;
  158. bool isr_registered;
  159. /* TX Rings */
  160. struct be_eq_obj tx_eq;
  161. struct be_tx_obj tx_obj;
  162. u32 cache_line_break[8];
  163. /* Rx rings */
  164. struct be_eq_obj rx_eq;
  165. struct be_rx_obj rx_obj;
  166. u32 big_page_size; /* Compounded page size shared by rx wrbs */
  167. bool rx_post_starved; /* Zero rx frags have been posted to BE */
  168. struct vlan_group *vlan_grp;
  169. u16 num_vlans;
  170. u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
  171. struct be_stats_obj stats;
  172. /* Work queue used to perform periodic tasks like getting statistics */
  173. struct delayed_work work;
  174. /* Ethtool knobs and info */
  175. bool rx_csum; /* BE card must perform rx-checksumming */
  176. u32 max_rx_coal;
  177. char fw_ver[FW_VER_LEN];
  178. u32 if_handle; /* Used to configure filtering */
  179. u32 pmac_id; /* MAC addr handle used by BE card */
  180. struct be_link_info link;
  181. u32 port_num;
  182. };
  183. extern struct ethtool_ops be_ethtool_ops;
  184. #define drvr_stats(adapter) (&adapter->stats.drvr_stats)
  185. #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
  186. static inline u32 MODULO(u16 val, u16 limit)
  187. {
  188. BUG_ON(limit & (limit - 1));
  189. return val & (limit - 1);
  190. }
  191. static inline void index_adv(u16 *index, u16 val, u16 limit)
  192. {
  193. *index = MODULO((*index + val), limit);
  194. }
  195. static inline void index_inc(u16 *index, u16 limit)
  196. {
  197. *index = MODULO((*index + 1), limit);
  198. }
  199. #define PAGE_SHIFT_4K 12
  200. #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
  201. /* Returns number of pages spanned by the data starting at the given addr */
  202. #define PAGES_4K_SPANNED(_address, size) \
  203. ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
  204. (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
  205. /* Byte offset into the page corresponding to given address */
  206. #define OFFSET_IN_PAGE(addr) \
  207. ((size_t)(addr) & (PAGE_SIZE_4K-1))
  208. /* Returns bit offset within a DWORD of a bitfield */
  209. #define AMAP_BIT_OFFSET(_struct, field) \
  210. (((size_t)&(((_struct *)0)->field))%32)
  211. /* Returns the bit mask of the field that is NOT shifted into location. */
  212. static inline u32 amap_mask(u32 bitsize)
  213. {
  214. return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
  215. }
  216. static inline void
  217. amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
  218. {
  219. u32 *dw = (u32 *) ptr + dw_offset;
  220. *dw &= ~(mask << offset);
  221. *dw |= (mask & value) << offset;
  222. }
  223. #define AMAP_SET_BITS(_struct, field, ptr, val) \
  224. amap_set(ptr, \
  225. offsetof(_struct, field)/32, \
  226. amap_mask(sizeof(((_struct *)0)->field)), \
  227. AMAP_BIT_OFFSET(_struct, field), \
  228. val)
  229. static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
  230. {
  231. u32 *dw = (u32 *) ptr;
  232. return mask & (*(dw + dw_offset) >> offset);
  233. }
  234. #define AMAP_GET_BITS(_struct, field, ptr) \
  235. amap_get(ptr, \
  236. offsetof(_struct, field)/32, \
  237. amap_mask(sizeof(((_struct *)0)->field)), \
  238. AMAP_BIT_OFFSET(_struct, field))
  239. #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
  240. #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
  241. static inline void swap_dws(void *wrb, int len)
  242. {
  243. #ifdef __BIG_ENDIAN
  244. u32 *dw = wrb;
  245. BUG_ON(len % 4);
  246. do {
  247. *dw = cpu_to_le32(*dw);
  248. dw++;
  249. len -= 4;
  250. } while (len);
  251. #endif /* __BIG_ENDIAN */
  252. }
  253. static inline u8 is_tcp_pkt(struct sk_buff *skb)
  254. {
  255. u8 val = 0;
  256. if (ip_hdr(skb)->version == 4)
  257. val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
  258. else if (ip_hdr(skb)->version == 6)
  259. val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
  260. return val;
  261. }
  262. static inline u8 is_udp_pkt(struct sk_buff *skb)
  263. {
  264. u8 val = 0;
  265. if (ip_hdr(skb)->version == 4)
  266. val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
  267. else if (ip_hdr(skb)->version == 6)
  268. val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
  269. return val;
  270. }
  271. #endif /* BE_H */