grufault.c 18 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * FAULT HANDLER FOR GRU DETECTED TLB MISSES
  5. *
  6. * This file contains code that handles TLB misses within the GRU.
  7. * These misses are reported either via interrupts or user polling of
  8. * the user CB.
  9. *
  10. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mm.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/device.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/security.h>
  35. #include <asm/pgtable.h>
  36. #include "gru.h"
  37. #include "grutables.h"
  38. #include "grulib.h"
  39. #include "gru_instructions.h"
  40. #include <asm/uv/uv_hub.h>
  41. /*
  42. * Test if a physical address is a valid GRU GSEG address
  43. */
  44. static inline int is_gru_paddr(unsigned long paddr)
  45. {
  46. return paddr >= gru_start_paddr && paddr < gru_end_paddr;
  47. }
  48. /*
  49. * Find the vma of a GRU segment. Caller must hold mmap_sem.
  50. */
  51. struct vm_area_struct *gru_find_vma(unsigned long vaddr)
  52. {
  53. struct vm_area_struct *vma;
  54. vma = find_vma(current->mm, vaddr);
  55. if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
  56. return vma;
  57. return NULL;
  58. }
  59. /*
  60. * Find and lock the gts that contains the specified user vaddr.
  61. *
  62. * Returns:
  63. * - *gts with the mmap_sem locked for read and the GTS locked.
  64. * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
  65. */
  66. static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
  67. {
  68. struct mm_struct *mm = current->mm;
  69. struct vm_area_struct *vma;
  70. struct gru_thread_state *gts = NULL;
  71. down_read(&mm->mmap_sem);
  72. vma = gru_find_vma(vaddr);
  73. if (vma)
  74. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  75. if (gts)
  76. mutex_lock(&gts->ts_ctxlock);
  77. else
  78. up_read(&mm->mmap_sem);
  79. return gts;
  80. }
  81. static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
  82. {
  83. struct mm_struct *mm = current->mm;
  84. struct vm_area_struct *vma;
  85. struct gru_thread_state *gts = NULL;
  86. down_write(&mm->mmap_sem);
  87. vma = gru_find_vma(vaddr);
  88. if (vma)
  89. gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
  90. if (gts) {
  91. mutex_lock(&gts->ts_ctxlock);
  92. downgrade_write(&mm->mmap_sem);
  93. } else {
  94. up_write(&mm->mmap_sem);
  95. }
  96. return gts;
  97. }
  98. /*
  99. * Unlock a GTS that was previously locked with gru_find_lock_gts().
  100. */
  101. static void gru_unlock_gts(struct gru_thread_state *gts)
  102. {
  103. mutex_unlock(&gts->ts_ctxlock);
  104. up_read(&current->mm->mmap_sem);
  105. }
  106. /*
  107. * Set a CB.istatus to active using a user virtual address. This must be done
  108. * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
  109. * If the line is evicted, the status may be lost. The in-cache update
  110. * is necessary to prevent the user from seeing a stale cb.istatus that will
  111. * change as soon as the TFH restart is complete. Races may cause an
  112. * occasional failure to clear the cb.istatus, but that is ok.
  113. *
  114. * If the cb address is not valid (should not happen, but...), nothing
  115. * bad will happen.. The get_user()/put_user() will fail but there
  116. * are no bad side-effects.
  117. */
  118. static void gru_cb_set_istatus_active(unsigned long __user *cb)
  119. {
  120. union {
  121. struct gru_instruction_bits bits;
  122. unsigned long dw;
  123. } u;
  124. if (cb) {
  125. get_user(u.dw, cb);
  126. u.bits.istatus = CBS_ACTIVE;
  127. put_user(u.dw, cb);
  128. }
  129. }
  130. /*
  131. * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
  132. * interrupt. Interrupts are always sent to a cpu on the blade that contains the
  133. * GRU (except for headless blades which are not currently supported). A blade
  134. * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
  135. * number uniquely identifies the GRU chiplet on the local blade that caused the
  136. * interrupt. Always called in interrupt context.
  137. */
  138. static inline struct gru_state *irq_to_gru(int irq)
  139. {
  140. return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
  141. }
  142. /*
  143. * Read & clear a TFM
  144. *
  145. * The GRU has an array of fault maps. A map is private to a cpu
  146. * Only one cpu will be accessing a cpu's fault map.
  147. *
  148. * This function scans the cpu-private fault map & clears all bits that
  149. * are set. The function returns a bitmap that indicates the bits that
  150. * were cleared. Note that sense the maps may be updated asynchronously by
  151. * the GRU, atomic operations must be used to clear bits.
  152. */
  153. static void get_clear_fault_map(struct gru_state *gru,
  154. struct gru_tlb_fault_map *map)
  155. {
  156. unsigned long i, k;
  157. struct gru_tlb_fault_map *tfm;
  158. tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
  159. prefetchw(tfm); /* Helps on hardware, required for emulator */
  160. for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
  161. k = tfm->fault_bits[i];
  162. if (k)
  163. k = xchg(&tfm->fault_bits[i], 0UL);
  164. map->fault_bits[i] = k;
  165. }
  166. /*
  167. * Not functionally required but helps performance. (Required
  168. * on emulator)
  169. */
  170. gru_flush_cache(tfm);
  171. }
  172. /*
  173. * Atomic (interrupt context) & non-atomic (user context) functions to
  174. * convert a vaddr into a physical address. The size of the page
  175. * is returned in pageshift.
  176. * returns:
  177. * 0 - successful
  178. * < 0 - error code
  179. * 1 - (atomic only) try again in non-atomic context
  180. */
  181. static int non_atomic_pte_lookup(struct vm_area_struct *vma,
  182. unsigned long vaddr, int write,
  183. unsigned long *paddr, int *pageshift)
  184. {
  185. struct page *page;
  186. /* ZZZ Need to handle HUGE pages */
  187. if (is_vm_hugetlb_page(vma))
  188. return -EFAULT;
  189. *pageshift = PAGE_SHIFT;
  190. if (get_user_pages
  191. (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
  192. return -EFAULT;
  193. *paddr = page_to_phys(page);
  194. put_page(page);
  195. return 0;
  196. }
  197. /*
  198. * atomic_pte_lookup
  199. *
  200. * Convert a user virtual address to a physical address
  201. * Only supports Intel large pages (2MB only) on x86_64.
  202. * ZZZ - hugepage support is incomplete
  203. *
  204. * NOTE: mmap_sem is already held on entry to this function. This
  205. * guarantees existence of the page tables.
  206. */
  207. static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
  208. int write, unsigned long *paddr, int *pageshift)
  209. {
  210. pgd_t *pgdp;
  211. pmd_t *pmdp;
  212. pud_t *pudp;
  213. pte_t pte;
  214. pgdp = pgd_offset(vma->vm_mm, vaddr);
  215. if (unlikely(pgd_none(*pgdp)))
  216. goto err;
  217. pudp = pud_offset(pgdp, vaddr);
  218. if (unlikely(pud_none(*pudp)))
  219. goto err;
  220. pmdp = pmd_offset(pudp, vaddr);
  221. if (unlikely(pmd_none(*pmdp)))
  222. goto err;
  223. #ifdef CONFIG_X86_64
  224. if (unlikely(pmd_large(*pmdp)))
  225. pte = *(pte_t *) pmdp;
  226. else
  227. #endif
  228. pte = *pte_offset_kernel(pmdp, vaddr);
  229. if (unlikely(!pte_present(pte) ||
  230. (write && (!pte_write(pte) || !pte_dirty(pte)))))
  231. return 1;
  232. *paddr = pte_pfn(pte) << PAGE_SHIFT;
  233. #ifdef CONFIG_HUGETLB_PAGE
  234. *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
  235. #else
  236. *pageshift = PAGE_SHIFT;
  237. #endif
  238. return 0;
  239. err:
  240. local_irq_enable();
  241. return 1;
  242. }
  243. static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
  244. int write, int atomic, unsigned long *gpa, int *pageshift)
  245. {
  246. struct mm_struct *mm = gts->ts_mm;
  247. struct vm_area_struct *vma;
  248. unsigned long paddr;
  249. int ret, ps;
  250. vma = find_vma(mm, vaddr);
  251. if (!vma)
  252. goto inval;
  253. /*
  254. * Atomic lookup is faster & usually works even if called in non-atomic
  255. * context.
  256. */
  257. rmb(); /* Must/check ms_range_active before loading PTEs */
  258. ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps);
  259. if (ret) {
  260. if (atomic)
  261. goto upm;
  262. if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps))
  263. goto inval;
  264. }
  265. if (is_gru_paddr(paddr))
  266. goto inval;
  267. paddr = paddr & ~((1UL << ps) - 1);
  268. *gpa = uv_soc_phys_ram_to_gpa(paddr);
  269. *pageshift = ps;
  270. return 0;
  271. inval:
  272. return -1;
  273. upm:
  274. return -2;
  275. }
  276. /*
  277. * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
  278. * Input:
  279. * cb Address of user CBR. Null if not running in user context
  280. * Return:
  281. * 0 = dropin, exception, or switch to UPM successful
  282. * 1 = range invalidate active
  283. * < 0 = error code
  284. *
  285. */
  286. static int gru_try_dropin(struct gru_thread_state *gts,
  287. struct gru_tlb_fault_handle *tfh,
  288. unsigned long __user *cb)
  289. {
  290. int pageshift = 0, asid, write, ret, atomic = !cb;
  291. unsigned long gpa = 0, vaddr = 0;
  292. /*
  293. * NOTE: The GRU contains magic hardware that eliminates races between
  294. * TLB invalidates and TLB dropins. If an invalidate occurs
  295. * in the window between reading the TFH and the subsequent TLB dropin,
  296. * the dropin is ignored. This eliminates the need for additional locks.
  297. */
  298. /*
  299. * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
  300. * Might be a hardware race OR a stupid user. Ignore FMM because FMM
  301. * is a transient state.
  302. */
  303. if (tfh->state == TFHSTATE_IDLE)
  304. goto failidle;
  305. if (tfh->state == TFHSTATE_MISS_FMM && cb)
  306. goto failfmm;
  307. write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
  308. vaddr = tfh->missvaddr;
  309. asid = tfh->missasid;
  310. if (asid == 0)
  311. goto failnoasid;
  312. rmb(); /* TFH must be cache resident before reading ms_range_active */
  313. /*
  314. * TFH is cache resident - at least briefly. Fail the dropin
  315. * if a range invalidate is active.
  316. */
  317. if (atomic_read(&gts->ts_gms->ms_range_active))
  318. goto failactive;
  319. ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
  320. if (ret == -1)
  321. goto failinval;
  322. if (ret == -2)
  323. goto failupm;
  324. if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
  325. gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
  326. if (atomic || !gru_update_cch(gts, 0)) {
  327. gts->ts_force_cch_reload = 1;
  328. goto failupm;
  329. }
  330. }
  331. gru_cb_set_istatus_active(cb);
  332. tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
  333. GRU_PAGESIZE(pageshift));
  334. STAT(tlb_dropin);
  335. gru_dbg(grudev,
  336. "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
  337. ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
  338. pageshift, gpa);
  339. return 0;
  340. failnoasid:
  341. /* No asid (delayed unload). */
  342. STAT(tlb_dropin_fail_no_asid);
  343. gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  344. if (!cb)
  345. tfh_user_polling_mode(tfh);
  346. else
  347. gru_flush_cache(tfh);
  348. return -EAGAIN;
  349. failupm:
  350. /* Atomic failure switch CBR to UPM */
  351. tfh_user_polling_mode(tfh);
  352. STAT(tlb_dropin_fail_upm);
  353. gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  354. return 1;
  355. failfmm:
  356. /* FMM state on UPM call */
  357. gru_flush_cache(tfh);
  358. STAT(tlb_dropin_fail_fmm);
  359. gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
  360. return 0;
  361. failidle:
  362. /* TFH was idle - no miss pending */
  363. gru_flush_cache(tfh);
  364. if (cb)
  365. gru_flush_cache(cb);
  366. STAT(tlb_dropin_fail_idle);
  367. gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
  368. return 0;
  369. failinval:
  370. /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
  371. tfh_exception(tfh);
  372. STAT(tlb_dropin_fail_invalid);
  373. gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  374. return -EFAULT;
  375. failactive:
  376. /* Range invalidate active. Switch to UPM iff atomic */
  377. if (!cb)
  378. tfh_user_polling_mode(tfh);
  379. else
  380. gru_flush_cache(tfh);
  381. STAT(tlb_dropin_fail_range_active);
  382. gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
  383. tfh, vaddr);
  384. return 1;
  385. }
  386. /*
  387. * Process an external interrupt from the GRU. This interrupt is
  388. * caused by a TLB miss.
  389. * Note that this is the interrupt handler that is registered with linux
  390. * interrupt handlers.
  391. */
  392. irqreturn_t gru_intr(int irq, void *dev_id)
  393. {
  394. struct gru_state *gru;
  395. struct gru_tlb_fault_map map;
  396. struct gru_thread_state *gts;
  397. struct gru_tlb_fault_handle *tfh = NULL;
  398. int cbrnum, ctxnum;
  399. STAT(intr);
  400. gru = irq_to_gru(irq);
  401. if (!gru) {
  402. dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
  403. raw_smp_processor_id(), irq);
  404. return IRQ_NONE;
  405. }
  406. get_clear_fault_map(gru, &map);
  407. gru_dbg(grudev, "irq %d, gru %x, map 0x%lx\n", irq, gru->gs_gid,
  408. map.fault_bits[0]);
  409. for_each_cbr_in_tfm(cbrnum, map.fault_bits) {
  410. tfh = get_tfh_by_index(gru, cbrnum);
  411. prefetchw(tfh); /* Helps on hdw, required for emulator */
  412. /*
  413. * When hardware sets a bit in the faultmap, it implicitly
  414. * locks the GRU context so that it cannot be unloaded.
  415. * The gts cannot change until a TFH start/writestart command
  416. * is issued.
  417. */
  418. ctxnum = tfh->ctxnum;
  419. gts = gru->gs_gts[ctxnum];
  420. /*
  421. * This is running in interrupt context. Trylock the mmap_sem.
  422. * If it fails, retry the fault in user context.
  423. */
  424. if (down_read_trylock(&gts->ts_mm->mmap_sem)) {
  425. gru_try_dropin(gts, tfh, NULL);
  426. up_read(&gts->ts_mm->mmap_sem);
  427. } else {
  428. tfh_user_polling_mode(tfh);
  429. STAT(intr_mm_lock_failed);
  430. }
  431. }
  432. return IRQ_HANDLED;
  433. }
  434. static int gru_user_dropin(struct gru_thread_state *gts,
  435. struct gru_tlb_fault_handle *tfh,
  436. unsigned long __user *cb)
  437. {
  438. struct gru_mm_struct *gms = gts->ts_gms;
  439. int ret;
  440. while (1) {
  441. wait_event(gms->ms_wait_queue,
  442. atomic_read(&gms->ms_range_active) == 0);
  443. prefetchw(tfh); /* Helps on hdw, required for emulator */
  444. ret = gru_try_dropin(gts, tfh, cb);
  445. if (ret <= 0)
  446. return ret;
  447. STAT(call_os_wait_queue);
  448. }
  449. }
  450. /*
  451. * This interface is called as a result of a user detecting a "call OS" bit
  452. * in a user CB. Normally means that a TLB fault has occurred.
  453. * cb - user virtual address of the CB
  454. */
  455. int gru_handle_user_call_os(unsigned long cb)
  456. {
  457. struct gru_tlb_fault_handle *tfh;
  458. struct gru_thread_state *gts;
  459. unsigned long __user *cbp;
  460. int ucbnum, cbrnum, ret = -EINVAL;
  461. STAT(call_os);
  462. gru_dbg(grudev, "address 0x%lx\n", cb);
  463. /* sanity check the cb pointer */
  464. ucbnum = get_cb_number((void *)cb);
  465. if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
  466. return -EINVAL;
  467. cbp = (unsigned long *)cb;
  468. gts = gru_find_lock_gts(cb);
  469. if (!gts)
  470. return -EINVAL;
  471. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
  472. goto exit;
  473. /*
  474. * If force_unload is set, the UPM TLB fault is phony. The task
  475. * has migrated to another node and the GSEG must be moved. Just
  476. * unload the context. The task will page fault and assign a new
  477. * context.
  478. */
  479. if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
  480. gts->ts_blade != uv_numa_blade_id()) {
  481. STAT(call_os_offnode_reference);
  482. gts->ts_force_unload = 1;
  483. }
  484. /*
  485. * CCH may contain stale data if ts_force_cch_reload is set.
  486. */
  487. if (gts->ts_gru && gts->ts_force_cch_reload) {
  488. gru_update_cch(gts, 0);
  489. gts->ts_force_cch_reload = 0;
  490. }
  491. ret = -EAGAIN;
  492. cbrnum = thread_cbr_number(gts, ucbnum);
  493. if (gts->ts_force_unload) {
  494. gru_unload_context(gts, 1);
  495. } else if (gts->ts_gru) {
  496. tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
  497. ret = gru_user_dropin(gts, tfh, cbp);
  498. }
  499. exit:
  500. gru_unlock_gts(gts);
  501. return ret;
  502. }
  503. /*
  504. * Fetch the exception detail information for a CB that terminated with
  505. * an exception.
  506. */
  507. int gru_get_exception_detail(unsigned long arg)
  508. {
  509. struct control_block_extended_exc_detail excdet;
  510. struct gru_control_block_extended *cbe;
  511. struct gru_thread_state *gts;
  512. int ucbnum, cbrnum, ret;
  513. STAT(user_exception);
  514. if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
  515. return -EFAULT;
  516. gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
  517. gts = gru_find_lock_gts(excdet.cb);
  518. if (!gts)
  519. return -EINVAL;
  520. ucbnum = get_cb_number((void *)excdet.cb);
  521. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
  522. ret = -EINVAL;
  523. } else if (gts->ts_gru) {
  524. cbrnum = thread_cbr_number(gts, ucbnum);
  525. cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
  526. prefetchw(cbe);/* Harmless on hardware, required for emulator */
  527. excdet.opc = cbe->opccpy;
  528. excdet.exopc = cbe->exopccpy;
  529. excdet.ecause = cbe->ecause;
  530. excdet.exceptdet0 = cbe->idef1upd;
  531. excdet.exceptdet1 = cbe->idef3upd;
  532. ret = 0;
  533. } else {
  534. ret = -EAGAIN;
  535. }
  536. gru_unlock_gts(gts);
  537. gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
  538. excdet.ecause);
  539. if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
  540. ret = -EFAULT;
  541. return ret;
  542. }
  543. /*
  544. * User request to unload a context. Content is saved for possible reload.
  545. */
  546. static int gru_unload_all_contexts(void)
  547. {
  548. struct gru_thread_state *gts;
  549. struct gru_state *gru;
  550. int gid, ctxnum;
  551. if (!capable(CAP_SYS_ADMIN))
  552. return -EPERM;
  553. foreach_gid(gid) {
  554. gru = GID_TO_GRU(gid);
  555. spin_lock(&gru->gs_lock);
  556. for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
  557. gts = gru->gs_gts[ctxnum];
  558. if (gts && mutex_trylock(&gts->ts_ctxlock)) {
  559. spin_unlock(&gru->gs_lock);
  560. gru_unload_context(gts, 1);
  561. gru_unlock_gts(gts);
  562. spin_lock(&gru->gs_lock);
  563. }
  564. }
  565. spin_unlock(&gru->gs_lock);
  566. }
  567. return 0;
  568. }
  569. int gru_user_unload_context(unsigned long arg)
  570. {
  571. struct gru_thread_state *gts;
  572. struct gru_unload_context_req req;
  573. STAT(user_unload_context);
  574. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  575. return -EFAULT;
  576. gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
  577. if (!req.gseg)
  578. return gru_unload_all_contexts();
  579. gts = gru_find_lock_gts(req.gseg);
  580. if (!gts)
  581. return -EINVAL;
  582. if (gts->ts_gru)
  583. gru_unload_context(gts, 1);
  584. gru_unlock_gts(gts);
  585. return 0;
  586. }
  587. /*
  588. * User request to flush a range of virtual addresses from the GRU TLB
  589. * (Mainly for testing).
  590. */
  591. int gru_user_flush_tlb(unsigned long arg)
  592. {
  593. struct gru_thread_state *gts;
  594. struct gru_flush_tlb_req req;
  595. STAT(user_flush_tlb);
  596. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  597. return -EFAULT;
  598. gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
  599. req.vaddr, req.len);
  600. gts = gru_find_lock_gts(req.gseg);
  601. if (!gts)
  602. return -EINVAL;
  603. gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.len);
  604. gru_unlock_gts(gts);
  605. return 0;
  606. }
  607. /*
  608. * Register the current task as the user of the GSEG slice.
  609. * Needed for TLB fault interrupt targeting.
  610. */
  611. int gru_set_task_slice(long address)
  612. {
  613. struct gru_thread_state *gts;
  614. STAT(set_task_slice);
  615. gru_dbg(grudev, "address 0x%lx\n", address);
  616. gts = gru_alloc_locked_gts(address);
  617. if (!gts)
  618. return -EINVAL;
  619. gts->ts_tgid_owner = current->tgid;
  620. gru_unlock_gts(gts);
  621. return 0;
  622. }