core.c 21 KB

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  1. /*
  2. * Silicon Labs C2 port core Linux support
  3. *
  4. * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/err.h>
  16. #include <linux/kernel.h>
  17. #include <linux/ctype.h>
  18. #include <linux/delay.h>
  19. #include <linux/idr.h>
  20. #include <linux/sched.h>
  21. #include <linux/c2port.h>
  22. #define DRIVER_NAME "c2port"
  23. #define DRIVER_VERSION "0.51.0"
  24. static DEFINE_SPINLOCK(c2port_idr_lock);
  25. static DEFINE_IDR(c2port_idr);
  26. /*
  27. * Local variables
  28. */
  29. static struct class *c2port_class;
  30. /*
  31. * C2 registers & commands defines
  32. */
  33. /* C2 registers */
  34. #define C2PORT_DEVICEID 0x00
  35. #define C2PORT_REVID 0x01
  36. #define C2PORT_FPCTL 0x02
  37. #define C2PORT_FPDAT 0xB4
  38. /* C2 interface commands */
  39. #define C2PORT_GET_VERSION 0x01
  40. #define C2PORT_DEVICE_ERASE 0x03
  41. #define C2PORT_BLOCK_READ 0x06
  42. #define C2PORT_BLOCK_WRITE 0x07
  43. #define C2PORT_PAGE_ERASE 0x08
  44. /* C2 status return codes */
  45. #define C2PORT_INVALID_COMMAND 0x00
  46. #define C2PORT_COMMAND_FAILED 0x02
  47. #define C2PORT_COMMAND_OK 0x0d
  48. /*
  49. * C2 port low level signal managements
  50. */
  51. static void c2port_reset(struct c2port_device *dev)
  52. {
  53. struct c2port_ops *ops = dev->ops;
  54. /* To reset the device we have to keep clock line low for at least
  55. * 20us.
  56. */
  57. local_irq_disable();
  58. ops->c2ck_set(dev, 0);
  59. udelay(25);
  60. ops->c2ck_set(dev, 1);
  61. local_irq_enable();
  62. udelay(1);
  63. }
  64. static void c2port_strobe_ck(struct c2port_device *dev)
  65. {
  66. struct c2port_ops *ops = dev->ops;
  67. /* During hi-low-hi transition we disable local IRQs to avoid
  68. * interructions since C2 port specification says that it must be
  69. * shorter than 5us, otherwise the microcontroller may consider
  70. * it as a reset signal!
  71. */
  72. local_irq_disable();
  73. ops->c2ck_set(dev, 0);
  74. udelay(1);
  75. ops->c2ck_set(dev, 1);
  76. local_irq_enable();
  77. udelay(1);
  78. }
  79. /*
  80. * C2 port basic functions
  81. */
  82. static void c2port_write_ar(struct c2port_device *dev, u8 addr)
  83. {
  84. struct c2port_ops *ops = dev->ops;
  85. int i;
  86. /* START field */
  87. c2port_strobe_ck(dev);
  88. /* INS field (11b, LSB first) */
  89. ops->c2d_dir(dev, 0);
  90. ops->c2d_set(dev, 1);
  91. c2port_strobe_ck(dev);
  92. ops->c2d_set(dev, 1);
  93. c2port_strobe_ck(dev);
  94. /* ADDRESS field */
  95. for (i = 0; i < 8; i++) {
  96. ops->c2d_set(dev, addr & 0x01);
  97. c2port_strobe_ck(dev);
  98. addr >>= 1;
  99. }
  100. /* STOP field */
  101. ops->c2d_dir(dev, 1);
  102. c2port_strobe_ck(dev);
  103. }
  104. static int c2port_read_ar(struct c2port_device *dev, u8 *addr)
  105. {
  106. struct c2port_ops *ops = dev->ops;
  107. int i;
  108. /* START field */
  109. c2port_strobe_ck(dev);
  110. /* INS field (10b, LSB first) */
  111. ops->c2d_dir(dev, 0);
  112. ops->c2d_set(dev, 0);
  113. c2port_strobe_ck(dev);
  114. ops->c2d_set(dev, 1);
  115. c2port_strobe_ck(dev);
  116. /* ADDRESS field */
  117. ops->c2d_dir(dev, 1);
  118. *addr = 0;
  119. for (i = 0; i < 8; i++) {
  120. *addr >>= 1; /* shift in 8-bit ADDRESS field LSB first */
  121. c2port_strobe_ck(dev);
  122. if (ops->c2d_get(dev))
  123. *addr |= 0x80;
  124. }
  125. /* STOP field */
  126. c2port_strobe_ck(dev);
  127. return 0;
  128. }
  129. static int c2port_write_dr(struct c2port_device *dev, u8 data)
  130. {
  131. struct c2port_ops *ops = dev->ops;
  132. int timeout, i;
  133. /* START field */
  134. c2port_strobe_ck(dev);
  135. /* INS field (01b, LSB first) */
  136. ops->c2d_dir(dev, 0);
  137. ops->c2d_set(dev, 1);
  138. c2port_strobe_ck(dev);
  139. ops->c2d_set(dev, 0);
  140. c2port_strobe_ck(dev);
  141. /* LENGTH field (00b, LSB first -> 1 byte) */
  142. ops->c2d_set(dev, 0);
  143. c2port_strobe_ck(dev);
  144. ops->c2d_set(dev, 0);
  145. c2port_strobe_ck(dev);
  146. /* DATA field */
  147. for (i = 0; i < 8; i++) {
  148. ops->c2d_set(dev, data & 0x01);
  149. c2port_strobe_ck(dev);
  150. data >>= 1;
  151. }
  152. /* WAIT field */
  153. ops->c2d_dir(dev, 1);
  154. timeout = 20;
  155. do {
  156. c2port_strobe_ck(dev);
  157. if (ops->c2d_get(dev))
  158. break;
  159. udelay(1);
  160. } while (--timeout > 0);
  161. if (timeout == 0)
  162. return -EIO;
  163. /* STOP field */
  164. c2port_strobe_ck(dev);
  165. return 0;
  166. }
  167. static int c2port_read_dr(struct c2port_device *dev, u8 *data)
  168. {
  169. struct c2port_ops *ops = dev->ops;
  170. int timeout, i;
  171. /* START field */
  172. c2port_strobe_ck(dev);
  173. /* INS field (00b, LSB first) */
  174. ops->c2d_dir(dev, 0);
  175. ops->c2d_set(dev, 0);
  176. c2port_strobe_ck(dev);
  177. ops->c2d_set(dev, 0);
  178. c2port_strobe_ck(dev);
  179. /* LENGTH field (00b, LSB first -> 1 byte) */
  180. ops->c2d_set(dev, 0);
  181. c2port_strobe_ck(dev);
  182. ops->c2d_set(dev, 0);
  183. c2port_strobe_ck(dev);
  184. /* WAIT field */
  185. ops->c2d_dir(dev, 1);
  186. timeout = 20;
  187. do {
  188. c2port_strobe_ck(dev);
  189. if (ops->c2d_get(dev))
  190. break;
  191. udelay(1);
  192. } while (--timeout > 0);
  193. if (timeout == 0)
  194. return -EIO;
  195. /* DATA field */
  196. *data = 0;
  197. for (i = 0; i < 8; i++) {
  198. *data >>= 1; /* shift in 8-bit DATA field LSB first */
  199. c2port_strobe_ck(dev);
  200. if (ops->c2d_get(dev))
  201. *data |= 0x80;
  202. }
  203. /* STOP field */
  204. c2port_strobe_ck(dev);
  205. return 0;
  206. }
  207. static int c2port_poll_in_busy(struct c2port_device *dev)
  208. {
  209. u8 addr;
  210. int ret, timeout = 20;
  211. do {
  212. ret = (c2port_read_ar(dev, &addr));
  213. if (ret < 0)
  214. return -EIO;
  215. if (!(addr & 0x02))
  216. break;
  217. udelay(1);
  218. } while (--timeout > 0);
  219. if (timeout == 0)
  220. return -EIO;
  221. return 0;
  222. }
  223. static int c2port_poll_out_ready(struct c2port_device *dev)
  224. {
  225. u8 addr;
  226. int ret, timeout = 10000; /* erase flash needs long time... */
  227. do {
  228. ret = (c2port_read_ar(dev, &addr));
  229. if (ret < 0)
  230. return -EIO;
  231. if (addr & 0x01)
  232. break;
  233. udelay(1);
  234. } while (--timeout > 0);
  235. if (timeout == 0)
  236. return -EIO;
  237. return 0;
  238. }
  239. /*
  240. * sysfs methods
  241. */
  242. static ssize_t c2port_show_name(struct device *dev,
  243. struct device_attribute *attr, char *buf)
  244. {
  245. struct c2port_device *c2dev = dev_get_drvdata(dev);
  246. return sprintf(buf, "%s\n", c2dev->name);
  247. }
  248. static ssize_t c2port_show_flash_blocks_num(struct device *dev,
  249. struct device_attribute *attr, char *buf)
  250. {
  251. struct c2port_device *c2dev = dev_get_drvdata(dev);
  252. struct c2port_ops *ops = c2dev->ops;
  253. return sprintf(buf, "%d\n", ops->blocks_num);
  254. }
  255. static ssize_t c2port_show_flash_block_size(struct device *dev,
  256. struct device_attribute *attr, char *buf)
  257. {
  258. struct c2port_device *c2dev = dev_get_drvdata(dev);
  259. struct c2port_ops *ops = c2dev->ops;
  260. return sprintf(buf, "%d\n", ops->block_size);
  261. }
  262. static ssize_t c2port_show_flash_size(struct device *dev,
  263. struct device_attribute *attr, char *buf)
  264. {
  265. struct c2port_device *c2dev = dev_get_drvdata(dev);
  266. struct c2port_ops *ops = c2dev->ops;
  267. return sprintf(buf, "%d\n", ops->blocks_num * ops->block_size);
  268. }
  269. static ssize_t c2port_show_access(struct device *dev,
  270. struct device_attribute *attr, char *buf)
  271. {
  272. struct c2port_device *c2dev = dev_get_drvdata(dev);
  273. return sprintf(buf, "%d\n", c2dev->access);
  274. }
  275. static ssize_t c2port_store_access(struct device *dev,
  276. struct device_attribute *attr,
  277. const char *buf, size_t count)
  278. {
  279. struct c2port_device *c2dev = dev_get_drvdata(dev);
  280. struct c2port_ops *ops = c2dev->ops;
  281. int status, ret;
  282. ret = sscanf(buf, "%d", &status);
  283. if (ret != 1)
  284. return -EINVAL;
  285. mutex_lock(&c2dev->mutex);
  286. c2dev->access = !!status;
  287. /* If access is "on" clock should be HIGH _before_ setting the line
  288. * as output and data line should be set as INPUT anyway */
  289. if (c2dev->access)
  290. ops->c2ck_set(c2dev, 1);
  291. ops->access(c2dev, c2dev->access);
  292. if (c2dev->access)
  293. ops->c2d_dir(c2dev, 1);
  294. mutex_unlock(&c2dev->mutex);
  295. return count;
  296. }
  297. static ssize_t c2port_store_reset(struct device *dev,
  298. struct device_attribute *attr,
  299. const char *buf, size_t count)
  300. {
  301. struct c2port_device *c2dev = dev_get_drvdata(dev);
  302. /* Check the device access status */
  303. if (!c2dev->access)
  304. return -EBUSY;
  305. mutex_lock(&c2dev->mutex);
  306. c2port_reset(c2dev);
  307. c2dev->flash_access = 0;
  308. mutex_unlock(&c2dev->mutex);
  309. return count;
  310. }
  311. static ssize_t __c2port_show_dev_id(struct c2port_device *dev, char *buf)
  312. {
  313. u8 data;
  314. int ret;
  315. /* Select DEVICEID register for C2 data register accesses */
  316. c2port_write_ar(dev, C2PORT_DEVICEID);
  317. /* Read and return the device ID register */
  318. ret = c2port_read_dr(dev, &data);
  319. if (ret < 0)
  320. return ret;
  321. return sprintf(buf, "%d\n", data);
  322. }
  323. static ssize_t c2port_show_dev_id(struct device *dev,
  324. struct device_attribute *attr, char *buf)
  325. {
  326. struct c2port_device *c2dev = dev_get_drvdata(dev);
  327. ssize_t ret;
  328. /* Check the device access status */
  329. if (!c2dev->access)
  330. return -EBUSY;
  331. mutex_lock(&c2dev->mutex);
  332. ret = __c2port_show_dev_id(c2dev, buf);
  333. mutex_unlock(&c2dev->mutex);
  334. if (ret < 0)
  335. dev_err(dev, "cannot read from %s\n", c2dev->name);
  336. return ret;
  337. }
  338. static ssize_t __c2port_show_rev_id(struct c2port_device *dev, char *buf)
  339. {
  340. u8 data;
  341. int ret;
  342. /* Select REVID register for C2 data register accesses */
  343. c2port_write_ar(dev, C2PORT_REVID);
  344. /* Read and return the revision ID register */
  345. ret = c2port_read_dr(dev, &data);
  346. if (ret < 0)
  347. return ret;
  348. return sprintf(buf, "%d\n", data);
  349. }
  350. static ssize_t c2port_show_rev_id(struct device *dev,
  351. struct device_attribute *attr, char *buf)
  352. {
  353. struct c2port_device *c2dev = dev_get_drvdata(dev);
  354. ssize_t ret;
  355. /* Check the device access status */
  356. if (!c2dev->access)
  357. return -EBUSY;
  358. mutex_lock(&c2dev->mutex);
  359. ret = __c2port_show_rev_id(c2dev, buf);
  360. mutex_unlock(&c2dev->mutex);
  361. if (ret < 0)
  362. dev_err(c2dev->dev, "cannot read from %s\n", c2dev->name);
  363. return ret;
  364. }
  365. static ssize_t c2port_show_flash_access(struct device *dev,
  366. struct device_attribute *attr, char *buf)
  367. {
  368. struct c2port_device *c2dev = dev_get_drvdata(dev);
  369. return sprintf(buf, "%d\n", c2dev->flash_access);
  370. }
  371. static ssize_t __c2port_store_flash_access(struct c2port_device *dev,
  372. int status)
  373. {
  374. int ret;
  375. /* Check the device access status */
  376. if (!dev->access)
  377. return -EBUSY;
  378. dev->flash_access = !!status;
  379. /* If flash_access is off we have nothing to do... */
  380. if (dev->flash_access == 0)
  381. return 0;
  382. /* Target the C2 flash programming control register for C2 data
  383. * register access */
  384. c2port_write_ar(dev, C2PORT_FPCTL);
  385. /* Write the first keycode to enable C2 Flash programming */
  386. ret = c2port_write_dr(dev, 0x02);
  387. if (ret < 0)
  388. return ret;
  389. /* Write the second keycode to enable C2 Flash programming */
  390. ret = c2port_write_dr(dev, 0x01);
  391. if (ret < 0)
  392. return ret;
  393. /* Delay for at least 20ms to ensure the target is ready for
  394. * C2 flash programming */
  395. mdelay(25);
  396. return 0;
  397. }
  398. static ssize_t c2port_store_flash_access(struct device *dev,
  399. struct device_attribute *attr,
  400. const char *buf, size_t count)
  401. {
  402. struct c2port_device *c2dev = dev_get_drvdata(dev);
  403. int status;
  404. ssize_t ret;
  405. ret = sscanf(buf, "%d", &status);
  406. if (ret != 1)
  407. return -EINVAL;
  408. mutex_lock(&c2dev->mutex);
  409. ret = __c2port_store_flash_access(c2dev, status);
  410. mutex_unlock(&c2dev->mutex);
  411. if (ret < 0) {
  412. dev_err(c2dev->dev, "cannot enable %s flash programming\n",
  413. c2dev->name);
  414. return ret;
  415. }
  416. return count;
  417. }
  418. static ssize_t __c2port_write_flash_erase(struct c2port_device *dev)
  419. {
  420. u8 status;
  421. int ret;
  422. /* Target the C2 flash programming data register for C2 data register
  423. * access.
  424. */
  425. c2port_write_ar(dev, C2PORT_FPDAT);
  426. /* Send device erase command */
  427. c2port_write_dr(dev, C2PORT_DEVICE_ERASE);
  428. /* Wait for input acknowledge */
  429. ret = c2port_poll_in_busy(dev);
  430. if (ret < 0)
  431. return ret;
  432. /* Should check status before starting FLASH access sequence */
  433. /* Wait for status information */
  434. ret = c2port_poll_out_ready(dev);
  435. if (ret < 0)
  436. return ret;
  437. /* Read flash programming interface status */
  438. ret = c2port_read_dr(dev, &status);
  439. if (ret < 0)
  440. return ret;
  441. if (status != C2PORT_COMMAND_OK)
  442. return -EBUSY;
  443. /* Send a three-byte arming sequence to enable the device erase.
  444. * If the sequence is not received correctly, the command will be
  445. * ignored.
  446. * Sequence is: 0xde, 0xad, 0xa5.
  447. */
  448. c2port_write_dr(dev, 0xde);
  449. ret = c2port_poll_in_busy(dev);
  450. if (ret < 0)
  451. return ret;
  452. c2port_write_dr(dev, 0xad);
  453. ret = c2port_poll_in_busy(dev);
  454. if (ret < 0)
  455. return ret;
  456. c2port_write_dr(dev, 0xa5);
  457. ret = c2port_poll_in_busy(dev);
  458. if (ret < 0)
  459. return ret;
  460. ret = c2port_poll_out_ready(dev);
  461. if (ret < 0)
  462. return ret;
  463. return 0;
  464. }
  465. static ssize_t c2port_store_flash_erase(struct device *dev,
  466. struct device_attribute *attr,
  467. const char *buf, size_t count)
  468. {
  469. struct c2port_device *c2dev = dev_get_drvdata(dev);
  470. int ret;
  471. /* Check the device and flash access status */
  472. if (!c2dev->access || !c2dev->flash_access)
  473. return -EBUSY;
  474. mutex_lock(&c2dev->mutex);
  475. ret = __c2port_write_flash_erase(c2dev);
  476. mutex_unlock(&c2dev->mutex);
  477. if (ret < 0) {
  478. dev_err(c2dev->dev, "cannot erase %s flash\n", c2dev->name);
  479. return ret;
  480. }
  481. return count;
  482. }
  483. static ssize_t __c2port_read_flash_data(struct c2port_device *dev,
  484. char *buffer, loff_t offset, size_t count)
  485. {
  486. struct c2port_ops *ops = dev->ops;
  487. u8 status, nread = 128;
  488. int i, ret;
  489. /* Check for flash end */
  490. if (offset >= ops->block_size * ops->blocks_num)
  491. return 0;
  492. if (ops->block_size * ops->blocks_num - offset < nread)
  493. nread = ops->block_size * ops->blocks_num - offset;
  494. if (count < nread)
  495. nread = count;
  496. if (nread == 0)
  497. return nread;
  498. /* Target the C2 flash programming data register for C2 data register
  499. * access */
  500. c2port_write_ar(dev, C2PORT_FPDAT);
  501. /* Send flash block read command */
  502. c2port_write_dr(dev, C2PORT_BLOCK_READ);
  503. /* Wait for input acknowledge */
  504. ret = c2port_poll_in_busy(dev);
  505. if (ret < 0)
  506. return ret;
  507. /* Should check status before starting FLASH access sequence */
  508. /* Wait for status information */
  509. ret = c2port_poll_out_ready(dev);
  510. if (ret < 0)
  511. return ret;
  512. /* Read flash programming interface status */
  513. ret = c2port_read_dr(dev, &status);
  514. if (ret < 0)
  515. return ret;
  516. if (status != C2PORT_COMMAND_OK)
  517. return -EBUSY;
  518. /* Send address high byte */
  519. c2port_write_dr(dev, offset >> 8);
  520. ret = c2port_poll_in_busy(dev);
  521. if (ret < 0)
  522. return ret;
  523. /* Send address low byte */
  524. c2port_write_dr(dev, offset & 0x00ff);
  525. ret = c2port_poll_in_busy(dev);
  526. if (ret < 0)
  527. return ret;
  528. /* Send address block size */
  529. c2port_write_dr(dev, nread);
  530. ret = c2port_poll_in_busy(dev);
  531. if (ret < 0)
  532. return ret;
  533. /* Should check status before reading FLASH block */
  534. /* Wait for status information */
  535. ret = c2port_poll_out_ready(dev);
  536. if (ret < 0)
  537. return ret;
  538. /* Read flash programming interface status */
  539. ret = c2port_read_dr(dev, &status);
  540. if (ret < 0)
  541. return ret;
  542. if (status != C2PORT_COMMAND_OK)
  543. return -EBUSY;
  544. /* Read flash block */
  545. for (i = 0; i < nread; i++) {
  546. ret = c2port_poll_out_ready(dev);
  547. if (ret < 0)
  548. return ret;
  549. ret = c2port_read_dr(dev, buffer+i);
  550. if (ret < 0)
  551. return ret;
  552. }
  553. return nread;
  554. }
  555. static ssize_t c2port_read_flash_data(struct kobject *kobj,
  556. struct bin_attribute *attr,
  557. char *buffer, loff_t offset, size_t count)
  558. {
  559. struct c2port_device *c2dev =
  560. dev_get_drvdata(container_of(kobj,
  561. struct device, kobj));
  562. ssize_t ret;
  563. /* Check the device and flash access status */
  564. if (!c2dev->access || !c2dev->flash_access)
  565. return -EBUSY;
  566. mutex_lock(&c2dev->mutex);
  567. ret = __c2port_read_flash_data(c2dev, buffer, offset, count);
  568. mutex_unlock(&c2dev->mutex);
  569. if (ret < 0)
  570. dev_err(c2dev->dev, "cannot read %s flash\n", c2dev->name);
  571. return ret;
  572. }
  573. static ssize_t __c2port_write_flash_data(struct c2port_device *dev,
  574. char *buffer, loff_t offset, size_t count)
  575. {
  576. struct c2port_ops *ops = dev->ops;
  577. u8 status, nwrite = 128;
  578. int i, ret;
  579. if (nwrite > count)
  580. nwrite = count;
  581. if (ops->block_size * ops->blocks_num - offset < nwrite)
  582. nwrite = ops->block_size * ops->blocks_num - offset;
  583. /* Check for flash end */
  584. if (offset >= ops->block_size * ops->blocks_num)
  585. return -EINVAL;
  586. /* Target the C2 flash programming data register for C2 data register
  587. * access */
  588. c2port_write_ar(dev, C2PORT_FPDAT);
  589. /* Send flash block write command */
  590. c2port_write_dr(dev, C2PORT_BLOCK_WRITE);
  591. /* Wait for input acknowledge */
  592. ret = c2port_poll_in_busy(dev);
  593. if (ret < 0)
  594. return ret;
  595. /* Should check status before starting FLASH access sequence */
  596. /* Wait for status information */
  597. ret = c2port_poll_out_ready(dev);
  598. if (ret < 0)
  599. return ret;
  600. /* Read flash programming interface status */
  601. ret = c2port_read_dr(dev, &status);
  602. if (ret < 0)
  603. return ret;
  604. if (status != C2PORT_COMMAND_OK)
  605. return -EBUSY;
  606. /* Send address high byte */
  607. c2port_write_dr(dev, offset >> 8);
  608. ret = c2port_poll_in_busy(dev);
  609. if (ret < 0)
  610. return ret;
  611. /* Send address low byte */
  612. c2port_write_dr(dev, offset & 0x00ff);
  613. ret = c2port_poll_in_busy(dev);
  614. if (ret < 0)
  615. return ret;
  616. /* Send address block size */
  617. c2port_write_dr(dev, nwrite);
  618. ret = c2port_poll_in_busy(dev);
  619. if (ret < 0)
  620. return ret;
  621. /* Should check status before writing FLASH block */
  622. /* Wait for status information */
  623. ret = c2port_poll_out_ready(dev);
  624. if (ret < 0)
  625. return ret;
  626. /* Read flash programming interface status */
  627. ret = c2port_read_dr(dev, &status);
  628. if (ret < 0)
  629. return ret;
  630. if (status != C2PORT_COMMAND_OK)
  631. return -EBUSY;
  632. /* Write flash block */
  633. for (i = 0; i < nwrite; i++) {
  634. ret = c2port_write_dr(dev, *(buffer+i));
  635. if (ret < 0)
  636. return ret;
  637. ret = c2port_poll_in_busy(dev);
  638. if (ret < 0)
  639. return ret;
  640. }
  641. /* Wait for last flash write to complete */
  642. ret = c2port_poll_out_ready(dev);
  643. if (ret < 0)
  644. return ret;
  645. return nwrite;
  646. }
  647. static ssize_t c2port_write_flash_data(struct kobject *kobj,
  648. struct bin_attribute *attr,
  649. char *buffer, loff_t offset, size_t count)
  650. {
  651. struct c2port_device *c2dev =
  652. dev_get_drvdata(container_of(kobj,
  653. struct device, kobj));
  654. int ret;
  655. /* Check the device access status */
  656. if (!c2dev->access || !c2dev->flash_access)
  657. return -EBUSY;
  658. mutex_lock(&c2dev->mutex);
  659. ret = __c2port_write_flash_data(c2dev, buffer, offset, count);
  660. mutex_unlock(&c2dev->mutex);
  661. if (ret < 0)
  662. dev_err(c2dev->dev, "cannot write %s flash\n", c2dev->name);
  663. return ret;
  664. }
  665. /*
  666. * Class attributes
  667. */
  668. static struct device_attribute c2port_attrs[] = {
  669. __ATTR(name, 0444, c2port_show_name, NULL),
  670. __ATTR(flash_blocks_num, 0444, c2port_show_flash_blocks_num, NULL),
  671. __ATTR(flash_block_size, 0444, c2port_show_flash_block_size, NULL),
  672. __ATTR(flash_size, 0444, c2port_show_flash_size, NULL),
  673. __ATTR(access, 0644, c2port_show_access, c2port_store_access),
  674. __ATTR(reset, 0200, NULL, c2port_store_reset),
  675. __ATTR(dev_id, 0444, c2port_show_dev_id, NULL),
  676. __ATTR(rev_id, 0444, c2port_show_rev_id, NULL),
  677. __ATTR(flash_access, 0644, c2port_show_flash_access,
  678. c2port_store_flash_access),
  679. __ATTR(flash_erase, 0200, NULL, c2port_store_flash_erase),
  680. __ATTR_NULL,
  681. };
  682. static struct bin_attribute c2port_bin_attrs = {
  683. .attr = {
  684. .name = "flash_data",
  685. .mode = 0644
  686. },
  687. .read = c2port_read_flash_data,
  688. .write = c2port_write_flash_data,
  689. /* .size is computed at run-time */
  690. };
  691. /*
  692. * Exported functions
  693. */
  694. struct c2port_device *c2port_device_register(char *name,
  695. struct c2port_ops *ops, void *devdata)
  696. {
  697. struct c2port_device *c2dev;
  698. int id, ret;
  699. if (unlikely(!ops) || unlikely(!ops->access) || \
  700. unlikely(!ops->c2d_dir) || unlikely(!ops->c2ck_set) || \
  701. unlikely(!ops->c2d_get) || unlikely(!ops->c2d_set))
  702. return ERR_PTR(-EINVAL);
  703. c2dev = kmalloc(sizeof(struct c2port_device), GFP_KERNEL);
  704. if (unlikely(!c2dev))
  705. return ERR_PTR(-ENOMEM);
  706. ret = idr_pre_get(&c2port_idr, GFP_KERNEL);
  707. if (!ret) {
  708. ret = -ENOMEM;
  709. goto error_idr_get_new;
  710. }
  711. spin_lock_irq(&c2port_idr_lock);
  712. ret = idr_get_new(&c2port_idr, c2dev, &id);
  713. spin_unlock_irq(&c2port_idr_lock);
  714. if (ret < 0)
  715. goto error_idr_get_new;
  716. c2dev->id = id;
  717. c2dev->dev = device_create(c2port_class, NULL, 0, c2dev,
  718. "c2port%d", id);
  719. if (unlikely(!c2dev->dev)) {
  720. ret = -ENOMEM;
  721. goto error_device_create;
  722. }
  723. dev_set_drvdata(c2dev->dev, c2dev);
  724. strncpy(c2dev->name, name, C2PORT_NAME_LEN);
  725. c2dev->ops = ops;
  726. mutex_init(&c2dev->mutex);
  727. /* Create binary file */
  728. c2port_bin_attrs.size = ops->blocks_num * ops->block_size;
  729. ret = device_create_bin_file(c2dev->dev, &c2port_bin_attrs);
  730. if (unlikely(ret))
  731. goto error_device_create_bin_file;
  732. /* By default C2 port access is off */
  733. c2dev->access = c2dev->flash_access = 0;
  734. ops->access(c2dev, 0);
  735. dev_info(c2dev->dev, "C2 port %s added\n", name);
  736. dev_info(c2dev->dev, "%s flash has %d blocks x %d bytes "
  737. "(%d bytes total)\n",
  738. name, ops->blocks_num, ops->block_size,
  739. ops->blocks_num * ops->block_size);
  740. return c2dev;
  741. error_device_create_bin_file:
  742. device_destroy(c2port_class, 0);
  743. error_device_create:
  744. spin_lock_irq(&c2port_idr_lock);
  745. idr_remove(&c2port_idr, id);
  746. spin_unlock_irq(&c2port_idr_lock);
  747. error_idr_get_new:
  748. kfree(c2dev);
  749. return ERR_PTR(ret);
  750. }
  751. EXPORT_SYMBOL(c2port_device_register);
  752. void c2port_device_unregister(struct c2port_device *c2dev)
  753. {
  754. if (!c2dev)
  755. return;
  756. dev_info(c2dev->dev, "C2 port %s removed\n", c2dev->name);
  757. device_remove_bin_file(c2dev->dev, &c2port_bin_attrs);
  758. spin_lock_irq(&c2port_idr_lock);
  759. idr_remove(&c2port_idr, c2dev->id);
  760. spin_unlock_irq(&c2port_idr_lock);
  761. device_destroy(c2port_class, c2dev->id);
  762. kfree(c2dev);
  763. }
  764. EXPORT_SYMBOL(c2port_device_unregister);
  765. /*
  766. * Module stuff
  767. */
  768. static int __init c2port_init(void)
  769. {
  770. printk(KERN_INFO "Silicon Labs C2 port support v. " DRIVER_VERSION
  771. " - (C) 2007 Rodolfo Giometti\n");
  772. c2port_class = class_create(THIS_MODULE, "c2port");
  773. if (!c2port_class) {
  774. printk(KERN_ERR "c2port: failed to allocate class\n");
  775. return -ENOMEM;
  776. }
  777. c2port_class->dev_attrs = c2port_attrs;
  778. return 0;
  779. }
  780. static void __exit c2port_exit(void)
  781. {
  782. class_destroy(c2port_class);
  783. }
  784. module_init(c2port_init);
  785. module_exit(c2port_exit);
  786. MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
  787. MODULE_DESCRIPTION("Silicon Labs C2 port support v. " DRIVER_VERSION);
  788. MODULE_LICENSE("GPL");