mx3_camera.c 33 KB

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  1. /*
  2. * V4L2 Driver for i.MX3x camera host
  3. *
  4. * Copyright (C) 2008
  5. * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/version.h>
  14. #include <linux/videodev2.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/clk.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/interrupt.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-dev.h>
  21. #include <media/videobuf-dma-contig.h>
  22. #include <media/soc_camera.h>
  23. #include <mach/ipu.h>
  24. #include <mach/mx3_camera.h>
  25. #define MX3_CAM_DRV_NAME "mx3-camera"
  26. /* CMOS Sensor Interface Registers */
  27. #define CSI_REG_START 0x60
  28. #define CSI_SENS_CONF (0x60 - CSI_REG_START)
  29. #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
  30. #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
  31. #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
  32. #define CSI_TST_CTRL (0x70 - CSI_REG_START)
  33. #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
  34. #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
  35. #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
  36. #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
  37. #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
  38. #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
  39. #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
  40. #define CSI_SENS_CONF_DATA_POL_SHIFT 2
  41. #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
  42. #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
  43. #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
  44. #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
  45. #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
  46. #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
  47. #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
  48. #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  49. #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  50. #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  51. #define MAX_VIDEO_MEM 16
  52. struct mx3_camera_buffer {
  53. /* common v4l buffer stuff -- must be first */
  54. struct videobuf_buffer vb;
  55. const struct soc_camera_data_format *fmt;
  56. /* One descriptot per scatterlist (per frame) */
  57. struct dma_async_tx_descriptor *txd;
  58. /* We have to "build" a scatterlist ourselves - one element per frame */
  59. struct scatterlist sg;
  60. };
  61. /**
  62. * struct mx3_camera_dev - i.MX3x camera (CSI) object
  63. * @dev: camera device, to which the coherent buffer is attached
  64. * @icd: currently attached camera sensor
  65. * @clk: pointer to clock
  66. * @base: remapped register base address
  67. * @pdata: platform data
  68. * @platform_flags: platform flags
  69. * @mclk: master clock frequency in Hz
  70. * @capture: list of capture videobuffers
  71. * @lock: protects video buffer lists
  72. * @active: active video buffer
  73. * @idmac_channel: array of pointers to IPU DMAC DMA channels
  74. * @soc_host: embedded soc_host object
  75. */
  76. struct mx3_camera_dev {
  77. struct device *dev;
  78. /*
  79. * i.MX3x is only supposed to handle one camera on its Camera Sensor
  80. * Interface. If anyone ever builds hardware to enable more than one
  81. * camera _simultaneously_, they will have to modify this driver too
  82. */
  83. struct soc_camera_device *icd;
  84. struct clk *clk;
  85. void __iomem *base;
  86. struct mx3_camera_pdata *pdata;
  87. unsigned long platform_flags;
  88. unsigned long mclk;
  89. struct list_head capture;
  90. spinlock_t lock; /* Protects video buffer lists */
  91. struct mx3_camera_buffer *active;
  92. /* IDMAC / dmaengine interface */
  93. struct idmac_channel *idmac_channel[1]; /* We need one channel */
  94. struct soc_camera_host soc_host;
  95. };
  96. struct dma_chan_request {
  97. struct mx3_camera_dev *mx3_cam;
  98. enum ipu_channel id;
  99. };
  100. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
  101. static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
  102. {
  103. return __raw_readl(mx3->base + reg);
  104. }
  105. static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
  106. {
  107. __raw_writel(value, mx3->base + reg);
  108. }
  109. /* Called from the IPU IDMAC ISR */
  110. static void mx3_cam_dma_done(void *arg)
  111. {
  112. struct idmac_tx_desc *desc = to_tx_desc(arg);
  113. struct dma_chan *chan = desc->txd.chan;
  114. struct idmac_channel *ichannel = to_idmac_chan(chan);
  115. struct mx3_camera_dev *mx3_cam = ichannel->client;
  116. struct videobuf_buffer *vb;
  117. dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
  118. desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
  119. spin_lock(&mx3_cam->lock);
  120. if (mx3_cam->active) {
  121. vb = &mx3_cam->active->vb;
  122. list_del_init(&vb->queue);
  123. vb->state = VIDEOBUF_DONE;
  124. do_gettimeofday(&vb->ts);
  125. vb->field_count++;
  126. wake_up(&vb->done);
  127. }
  128. if (list_empty(&mx3_cam->capture)) {
  129. mx3_cam->active = NULL;
  130. spin_unlock(&mx3_cam->lock);
  131. /*
  132. * stop capture - without further buffers IPU_CHA_BUF0_RDY will
  133. * not get updated
  134. */
  135. return;
  136. }
  137. mx3_cam->active = list_entry(mx3_cam->capture.next,
  138. struct mx3_camera_buffer, vb.queue);
  139. mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
  140. spin_unlock(&mx3_cam->lock);
  141. }
  142. static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
  143. {
  144. struct soc_camera_device *icd = vq->priv_data;
  145. struct videobuf_buffer *vb = &buf->vb;
  146. struct dma_async_tx_descriptor *txd = buf->txd;
  147. struct idmac_channel *ichan;
  148. BUG_ON(in_interrupt());
  149. dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  150. vb, vb->baddr, vb->bsize);
  151. /*
  152. * This waits until this buffer is out of danger, i.e., until it is no
  153. * longer in STATE_QUEUED or STATE_ACTIVE
  154. */
  155. videobuf_waiton(vb, 0, 0);
  156. if (txd) {
  157. ichan = to_idmac_chan(txd->chan);
  158. async_tx_ack(txd);
  159. }
  160. videobuf_dma_contig_free(vq, vb);
  161. buf->txd = NULL;
  162. vb->state = VIDEOBUF_NEEDS_INIT;
  163. }
  164. /*
  165. * Videobuf operations
  166. */
  167. /*
  168. * Calculate the __buffer__ (not data) size and number of buffers.
  169. * Called with .vb_lock held
  170. */
  171. static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  172. unsigned int *size)
  173. {
  174. struct soc_camera_device *icd = vq->priv_data;
  175. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  176. struct mx3_camera_dev *mx3_cam = ici->priv;
  177. /*
  178. * bits-per-pixel (depth) as specified in camera's pixel format does
  179. * not necessarily match what the camera interface writes to RAM, but
  180. * it should be good enough for now.
  181. */
  182. unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
  183. if (!mx3_cam->idmac_channel[0])
  184. return -EINVAL;
  185. *size = icd->width * icd->height * bpp;
  186. if (!*count)
  187. *count = 32;
  188. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  189. *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
  190. return 0;
  191. }
  192. /* Called with .vb_lock held */
  193. static int mx3_videobuf_prepare(struct videobuf_queue *vq,
  194. struct videobuf_buffer *vb, enum v4l2_field field)
  195. {
  196. struct soc_camera_device *icd = vq->priv_data;
  197. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  198. struct mx3_camera_dev *mx3_cam = ici->priv;
  199. struct mx3_camera_buffer *buf =
  200. container_of(vb, struct mx3_camera_buffer, vb);
  201. /* current_fmt _must_ always be set */
  202. size_t new_size = icd->width * icd->height *
  203. ((icd->current_fmt->depth + 7) >> 3);
  204. int ret;
  205. /*
  206. * I think, in buf_prepare you only have to protect global data,
  207. * the actual buffer is yours
  208. */
  209. if (buf->fmt != icd->current_fmt ||
  210. vb->width != icd->width ||
  211. vb->height != icd->height ||
  212. vb->field != field) {
  213. buf->fmt = icd->current_fmt;
  214. vb->width = icd->width;
  215. vb->height = icd->height;
  216. vb->field = field;
  217. if (vb->state != VIDEOBUF_NEEDS_INIT)
  218. free_buffer(vq, buf);
  219. }
  220. if (vb->baddr && vb->bsize < new_size) {
  221. /* User provided buffer, but it is too small */
  222. ret = -ENOMEM;
  223. goto out;
  224. }
  225. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  226. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  227. struct scatterlist *sg = &buf->sg;
  228. /*
  229. * The total size of video-buffers that will be allocated / mapped.
  230. * *size that we calculated in videobuf_setup gets assigned to
  231. * vb->bsize, and now we use the same calculation to get vb->size.
  232. */
  233. vb->size = new_size;
  234. /* This actually (allocates and) maps buffers */
  235. ret = videobuf_iolock(vq, vb, NULL);
  236. if (ret)
  237. goto fail;
  238. /*
  239. * We will have to configure the IDMAC channel. It has two slots
  240. * for DMA buffers, we shall enter the first two buffers there,
  241. * and then submit new buffers in DMA-ready interrupts
  242. */
  243. sg_init_table(sg, 1);
  244. sg_dma_address(sg) = videobuf_to_dma_contig(vb);
  245. sg_dma_len(sg) = vb->size;
  246. buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
  247. &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
  248. DMA_PREP_INTERRUPT);
  249. if (!buf->txd) {
  250. ret = -EIO;
  251. goto fail;
  252. }
  253. buf->txd->callback_param = buf->txd;
  254. buf->txd->callback = mx3_cam_dma_done;
  255. vb->state = VIDEOBUF_PREPARED;
  256. }
  257. return 0;
  258. fail:
  259. free_buffer(vq, buf);
  260. out:
  261. return ret;
  262. }
  263. static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
  264. {
  265. /* Add more formats as need arises and test possibilities appear... */
  266. switch (fourcc) {
  267. case V4L2_PIX_FMT_RGB565:
  268. return IPU_PIX_FMT_RGB565;
  269. case V4L2_PIX_FMT_RGB24:
  270. return IPU_PIX_FMT_RGB24;
  271. case V4L2_PIX_FMT_RGB332:
  272. return IPU_PIX_FMT_RGB332;
  273. case V4L2_PIX_FMT_YUV422P:
  274. return IPU_PIX_FMT_YVU422P;
  275. default:
  276. return IPU_PIX_FMT_GENERIC;
  277. }
  278. }
  279. /* Called with .vb_lock held */
  280. static void mx3_videobuf_queue(struct videobuf_queue *vq,
  281. struct videobuf_buffer *vb)
  282. {
  283. struct soc_camera_device *icd = vq->priv_data;
  284. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  285. struct mx3_camera_dev *mx3_cam = ici->priv;
  286. struct mx3_camera_buffer *buf =
  287. container_of(vb, struct mx3_camera_buffer, vb);
  288. struct dma_async_tx_descriptor *txd = buf->txd;
  289. struct idmac_channel *ichan = to_idmac_chan(txd->chan);
  290. struct idmac_video_param *video = &ichan->params.video;
  291. const struct soc_camera_data_format *data_fmt = icd->current_fmt;
  292. dma_cookie_t cookie;
  293. unsigned long flags;
  294. /* This is the configuration of one sg-element */
  295. video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
  296. video->out_width = icd->width;
  297. video->out_height = icd->height;
  298. video->out_stride = icd->width;
  299. #ifdef DEBUG
  300. /* helps to see what DMA actually has written */
  301. memset((void *)vb->baddr, 0xaa, vb->bsize);
  302. #endif
  303. spin_lock_irqsave(&mx3_cam->lock, flags);
  304. list_add_tail(&vb->queue, &mx3_cam->capture);
  305. if (!mx3_cam->active) {
  306. mx3_cam->active = buf;
  307. vb->state = VIDEOBUF_ACTIVE;
  308. } else {
  309. vb->state = VIDEOBUF_QUEUED;
  310. }
  311. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  312. cookie = txd->tx_submit(txd);
  313. dev_dbg(&icd->dev, "Submitted cookie %d DMA 0x%08x\n", cookie, sg_dma_address(&buf->sg));
  314. if (cookie >= 0)
  315. return;
  316. /* Submit error */
  317. vb->state = VIDEOBUF_PREPARED;
  318. spin_lock_irqsave(&mx3_cam->lock, flags);
  319. list_del_init(&vb->queue);
  320. if (mx3_cam->active == buf)
  321. mx3_cam->active = NULL;
  322. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  323. }
  324. /* Called with .vb_lock held */
  325. static void mx3_videobuf_release(struct videobuf_queue *vq,
  326. struct videobuf_buffer *vb)
  327. {
  328. struct soc_camera_device *icd = vq->priv_data;
  329. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  330. struct mx3_camera_dev *mx3_cam = ici->priv;
  331. struct mx3_camera_buffer *buf =
  332. container_of(vb, struct mx3_camera_buffer, vb);
  333. unsigned long flags;
  334. dev_dbg(&icd->dev, "Release%s DMA 0x%08x (state %d), queue %sempty\n",
  335. mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
  336. vb->state, list_empty(&vb->queue) ? "" : "not ");
  337. spin_lock_irqsave(&mx3_cam->lock, flags);
  338. if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
  339. !list_empty(&vb->queue)) {
  340. vb->state = VIDEOBUF_ERROR;
  341. list_del_init(&vb->queue);
  342. if (mx3_cam->active == buf)
  343. mx3_cam->active = NULL;
  344. }
  345. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  346. free_buffer(vq, buf);
  347. }
  348. static struct videobuf_queue_ops mx3_videobuf_ops = {
  349. .buf_setup = mx3_videobuf_setup,
  350. .buf_prepare = mx3_videobuf_prepare,
  351. .buf_queue = mx3_videobuf_queue,
  352. .buf_release = mx3_videobuf_release,
  353. };
  354. static void mx3_camera_init_videobuf(struct videobuf_queue *q,
  355. struct soc_camera_device *icd)
  356. {
  357. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  358. struct mx3_camera_dev *mx3_cam = ici->priv;
  359. videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, mx3_cam->dev,
  360. &mx3_cam->lock,
  361. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  362. V4L2_FIELD_NONE,
  363. sizeof(struct mx3_camera_buffer), icd);
  364. }
  365. /* First part of ipu_csi_init_interface() */
  366. static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
  367. struct soc_camera_device *icd)
  368. {
  369. u32 conf;
  370. long rate;
  371. /* Set default size: ipu_csi_set_window_size() */
  372. csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
  373. /* ...and position to 0:0: ipu_csi_set_window_pos() */
  374. conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  375. csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
  376. /* We use only gated clock synchronisation mode so far */
  377. conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
  378. /* Set generic data, platform-biggest bus-width */
  379. conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  380. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  381. conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  382. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  383. conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  384. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  385. conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  386. else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
  387. conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  388. if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
  389. conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
  390. if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
  391. conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
  392. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  393. conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  394. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  395. conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  396. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  397. conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  398. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  399. conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  400. /* ipu_csi_init_interface() */
  401. csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
  402. clk_enable(mx3_cam->clk);
  403. rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
  404. dev_dbg(&icd->dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
  405. if (rate)
  406. clk_set_rate(mx3_cam->clk, rate);
  407. }
  408. /* Called with .video_lock held */
  409. static int mx3_camera_add_device(struct soc_camera_device *icd)
  410. {
  411. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  412. struct mx3_camera_dev *mx3_cam = ici->priv;
  413. int ret;
  414. if (mx3_cam->icd) {
  415. ret = -EBUSY;
  416. goto ebusy;
  417. }
  418. mx3_camera_activate(mx3_cam, icd);
  419. ret = icd->ops->init(icd);
  420. if (ret < 0) {
  421. clk_disable(mx3_cam->clk);
  422. goto einit;
  423. }
  424. mx3_cam->icd = icd;
  425. einit:
  426. ebusy:
  427. if (!ret)
  428. dev_info(&icd->dev, "MX3 Camera driver attached to camera %d\n",
  429. icd->devnum);
  430. return ret;
  431. }
  432. /* Called with .video_lock held */
  433. static void mx3_camera_remove_device(struct soc_camera_device *icd)
  434. {
  435. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  436. struct mx3_camera_dev *mx3_cam = ici->priv;
  437. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  438. BUG_ON(icd != mx3_cam->icd);
  439. if (*ichan) {
  440. dma_release_channel(&(*ichan)->dma_chan);
  441. *ichan = NULL;
  442. }
  443. icd->ops->release(icd);
  444. clk_disable(mx3_cam->clk);
  445. mx3_cam->icd = NULL;
  446. dev_info(&icd->dev, "MX3 Camera driver detached from camera %d\n",
  447. icd->devnum);
  448. }
  449. static bool channel_change_requested(struct soc_camera_device *icd,
  450. struct v4l2_rect *rect)
  451. {
  452. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  453. struct mx3_camera_dev *mx3_cam = ici->priv;
  454. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  455. /* Do buffers have to be re-allocated or channel re-configured? */
  456. return ichan && rect->width * rect->height > icd->width * icd->height;
  457. }
  458. static int test_platform_param(struct mx3_camera_dev *mx3_cam,
  459. unsigned char buswidth, unsigned long *flags)
  460. {
  461. /*
  462. * Platform specified synchronization and pixel clock polarities are
  463. * only a recommendation and are only used during probing. MX3x
  464. * camera interface only works in master mode, i.e., uses HSYNC and
  465. * VSYNC signals from the sensor
  466. */
  467. *flags = SOCAM_MASTER |
  468. SOCAM_HSYNC_ACTIVE_HIGH |
  469. SOCAM_HSYNC_ACTIVE_LOW |
  470. SOCAM_VSYNC_ACTIVE_HIGH |
  471. SOCAM_VSYNC_ACTIVE_LOW |
  472. SOCAM_PCLK_SAMPLE_RISING |
  473. SOCAM_PCLK_SAMPLE_FALLING |
  474. SOCAM_DATA_ACTIVE_HIGH |
  475. SOCAM_DATA_ACTIVE_LOW;
  476. /* If requested data width is supported by the platform, use it or any
  477. * possible lower value - i.MX31 is smart enough to schift bits */
  478. switch (buswidth) {
  479. case 15:
  480. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
  481. return -EINVAL;
  482. *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
  483. SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  484. break;
  485. case 10:
  486. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
  487. return -EINVAL;
  488. *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
  489. SOCAM_DATAWIDTH_4;
  490. break;
  491. case 8:
  492. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
  493. return -EINVAL;
  494. *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  495. break;
  496. case 4:
  497. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
  498. return -EINVAL;
  499. *flags |= SOCAM_DATAWIDTH_4;
  500. break;
  501. default:
  502. dev_info(mx3_cam->dev, "Unsupported bus width %d\n", buswidth);
  503. return -EINVAL;
  504. }
  505. return 0;
  506. }
  507. static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
  508. const unsigned int depth)
  509. {
  510. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  511. struct mx3_camera_dev *mx3_cam = ici->priv;
  512. unsigned long bus_flags, camera_flags;
  513. int ret = test_platform_param(mx3_cam, depth, &bus_flags);
  514. dev_dbg(&ici->dev, "requested bus width %d bit: %d\n", depth, ret);
  515. if (ret < 0)
  516. return ret;
  517. camera_flags = icd->ops->query_bus_param(icd);
  518. ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  519. if (ret < 0)
  520. dev_warn(&icd->dev, "Flags incompatible: camera %lx, host %lx\n",
  521. camera_flags, bus_flags);
  522. return ret;
  523. }
  524. static bool chan_filter(struct dma_chan *chan, void *arg)
  525. {
  526. struct dma_chan_request *rq = arg;
  527. struct mx3_camera_pdata *pdata;
  528. if (!rq)
  529. return false;
  530. pdata = rq->mx3_cam->dev->platform_data;
  531. return rq->id == chan->chan_id &&
  532. pdata->dma_dev == chan->device->dev;
  533. }
  534. static const struct soc_camera_data_format mx3_camera_formats[] = {
  535. {
  536. .name = "Bayer (sRGB) 8 bit",
  537. .depth = 8,
  538. .fourcc = V4L2_PIX_FMT_SBGGR8,
  539. .colorspace = V4L2_COLORSPACE_SRGB,
  540. }, {
  541. .name = "Monochrome 8 bit",
  542. .depth = 8,
  543. .fourcc = V4L2_PIX_FMT_GREY,
  544. .colorspace = V4L2_COLORSPACE_JPEG,
  545. },
  546. };
  547. static bool buswidth_supported(struct soc_camera_host *ici, int depth)
  548. {
  549. struct mx3_camera_dev *mx3_cam = ici->priv;
  550. switch (depth) {
  551. case 4:
  552. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
  553. case 8:
  554. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
  555. case 10:
  556. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
  557. case 15:
  558. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
  559. }
  560. return false;
  561. }
  562. static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
  563. struct soc_camera_format_xlate *xlate)
  564. {
  565. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  566. int formats = 0, buswidth, ret;
  567. buswidth = icd->formats[idx].depth;
  568. if (!buswidth_supported(ici, buswidth))
  569. return 0;
  570. ret = mx3_camera_try_bus_param(icd, buswidth);
  571. if (ret < 0)
  572. return 0;
  573. switch (icd->formats[idx].fourcc) {
  574. case V4L2_PIX_FMT_SGRBG10:
  575. formats++;
  576. if (xlate) {
  577. xlate->host_fmt = &mx3_camera_formats[0];
  578. xlate->cam_fmt = icd->formats + idx;
  579. xlate->buswidth = buswidth;
  580. xlate++;
  581. dev_dbg(&ici->dev, "Providing format %s using %s\n",
  582. mx3_camera_formats[0].name,
  583. icd->formats[idx].name);
  584. }
  585. goto passthrough;
  586. case V4L2_PIX_FMT_Y16:
  587. formats++;
  588. if (xlate) {
  589. xlate->host_fmt = &mx3_camera_formats[1];
  590. xlate->cam_fmt = icd->formats + idx;
  591. xlate->buswidth = buswidth;
  592. xlate++;
  593. dev_dbg(&ici->dev, "Providing format %s using %s\n",
  594. mx3_camera_formats[0].name,
  595. icd->formats[idx].name);
  596. }
  597. default:
  598. passthrough:
  599. /* Generic pass-through */
  600. formats++;
  601. if (xlate) {
  602. xlate->host_fmt = icd->formats + idx;
  603. xlate->cam_fmt = icd->formats + idx;
  604. xlate->buswidth = buswidth;
  605. xlate++;
  606. dev_dbg(&ici->dev,
  607. "Providing format %s in pass-through mode\n",
  608. icd->formats[idx].name);
  609. }
  610. }
  611. return formats;
  612. }
  613. static void configure_geometry(struct mx3_camera_dev *mx3_cam,
  614. struct v4l2_rect *rect)
  615. {
  616. u32 ctrl, width_field, height_field;
  617. /* Setup frame size - this cannot be changed on-the-fly... */
  618. width_field = rect->width - 1;
  619. height_field = rect->height - 1;
  620. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
  621. csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
  622. csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
  623. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
  624. /* ...and position */
  625. ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  626. /* Sensor does the cropping */
  627. csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
  628. /*
  629. * No need to free resources here if we fail, we'll see if we need to
  630. * do this next time we are called
  631. */
  632. }
  633. static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
  634. {
  635. dma_cap_mask_t mask;
  636. struct dma_chan *chan;
  637. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  638. /* We have to use IDMAC_IC_7 for Bayer / generic data */
  639. struct dma_chan_request rq = {.mx3_cam = mx3_cam,
  640. .id = IDMAC_IC_7};
  641. if (*ichan) {
  642. struct videobuf_buffer *vb, *_vb;
  643. dma_release_channel(&(*ichan)->dma_chan);
  644. *ichan = NULL;
  645. mx3_cam->active = NULL;
  646. list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
  647. list_del_init(&vb->queue);
  648. vb->state = VIDEOBUF_ERROR;
  649. wake_up(&vb->done);
  650. }
  651. }
  652. dma_cap_zero(mask);
  653. dma_cap_set(DMA_SLAVE, mask);
  654. dma_cap_set(DMA_PRIVATE, mask);
  655. chan = dma_request_channel(mask, chan_filter, &rq);
  656. if (!chan)
  657. return -EBUSY;
  658. *ichan = to_idmac_chan(chan);
  659. (*ichan)->client = mx3_cam;
  660. return 0;
  661. }
  662. static int mx3_camera_set_crop(struct soc_camera_device *icd,
  663. struct v4l2_rect *rect)
  664. {
  665. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  666. struct mx3_camera_dev *mx3_cam = ici->priv;
  667. /*
  668. * We now know pixel formats and can decide upon DMA-channel(s)
  669. * So far only direct camera-to-memory is supported
  670. */
  671. if (channel_change_requested(icd, rect)) {
  672. int ret = acquire_dma_channel(mx3_cam);
  673. if (ret < 0)
  674. return ret;
  675. }
  676. configure_geometry(mx3_cam, rect);
  677. return icd->ops->set_crop(icd, rect);
  678. }
  679. static int mx3_camera_set_fmt(struct soc_camera_device *icd,
  680. struct v4l2_format *f)
  681. {
  682. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  683. struct mx3_camera_dev *mx3_cam = ici->priv;
  684. const struct soc_camera_format_xlate *xlate;
  685. struct v4l2_pix_format *pix = &f->fmt.pix;
  686. struct v4l2_rect rect = {
  687. .left = icd->x_current,
  688. .top = icd->y_current,
  689. .width = pix->width,
  690. .height = pix->height,
  691. };
  692. int ret;
  693. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  694. if (!xlate) {
  695. dev_warn(&ici->dev, "Format %x not found\n", pix->pixelformat);
  696. return -EINVAL;
  697. }
  698. ret = acquire_dma_channel(mx3_cam);
  699. if (ret < 0)
  700. return ret;
  701. /*
  702. * Might have to perform a complete interface initialisation like in
  703. * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
  704. * mxc_v4l2_s_fmt()
  705. */
  706. configure_geometry(mx3_cam, &rect);
  707. ret = icd->ops->set_fmt(icd, f);
  708. if (!ret) {
  709. icd->buswidth = xlate->buswidth;
  710. icd->current_fmt = xlate->host_fmt;
  711. }
  712. return ret;
  713. }
  714. static int mx3_camera_try_fmt(struct soc_camera_device *icd,
  715. struct v4l2_format *f)
  716. {
  717. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  718. const struct soc_camera_format_xlate *xlate;
  719. struct v4l2_pix_format *pix = &f->fmt.pix;
  720. __u32 pixfmt = pix->pixelformat;
  721. enum v4l2_field field;
  722. int ret;
  723. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  724. if (pixfmt && !xlate) {
  725. dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
  726. return -EINVAL;
  727. }
  728. /* limit to MX3 hardware capabilities */
  729. if (pix->height > 4096)
  730. pix->height = 4096;
  731. if (pix->width > 4096)
  732. pix->width = 4096;
  733. pix->bytesperline = pix->width *
  734. DIV_ROUND_UP(xlate->host_fmt->depth, 8);
  735. pix->sizeimage = pix->height * pix->bytesperline;
  736. /* camera has to see its format, but the user the original one */
  737. pix->pixelformat = xlate->cam_fmt->fourcc;
  738. /* limit to sensor capabilities */
  739. ret = icd->ops->try_fmt(icd, f);
  740. pix->pixelformat = xlate->host_fmt->fourcc;
  741. field = pix->field;
  742. if (field == V4L2_FIELD_ANY) {
  743. pix->field = V4L2_FIELD_NONE;
  744. } else if (field != V4L2_FIELD_NONE) {
  745. dev_err(&icd->dev, "Field type %d unsupported.\n", field);
  746. return -EINVAL;
  747. }
  748. return ret;
  749. }
  750. static int mx3_camera_reqbufs(struct soc_camera_file *icf,
  751. struct v4l2_requestbuffers *p)
  752. {
  753. return 0;
  754. }
  755. static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
  756. {
  757. struct soc_camera_file *icf = file->private_data;
  758. return videobuf_poll_stream(file, &icf->vb_vidq, pt);
  759. }
  760. static int mx3_camera_querycap(struct soc_camera_host *ici,
  761. struct v4l2_capability *cap)
  762. {
  763. /* cap->name is set by the firendly caller:-> */
  764. strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
  765. cap->version = KERNEL_VERSION(0, 2, 2);
  766. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  767. return 0;
  768. }
  769. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  770. {
  771. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  772. struct mx3_camera_dev *mx3_cam = ici->priv;
  773. unsigned long bus_flags, camera_flags, common_flags;
  774. u32 dw, sens_conf;
  775. int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
  776. const struct soc_camera_format_xlate *xlate;
  777. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  778. if (!xlate) {
  779. dev_warn(&ici->dev, "Format %x not found\n", pixfmt);
  780. return -EINVAL;
  781. }
  782. dev_dbg(&ici->dev, "requested bus width %d bit: %d\n",
  783. icd->buswidth, ret);
  784. if (ret < 0)
  785. return ret;
  786. camera_flags = icd->ops->query_bus_param(icd);
  787. common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  788. if (!common_flags) {
  789. dev_dbg(&ici->dev, "no common flags: camera %lx, host %lx\n",
  790. camera_flags, bus_flags);
  791. return -EINVAL;
  792. }
  793. /* Make choices, based on platform preferences */
  794. if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
  795. (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
  796. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  797. common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
  798. else
  799. common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
  800. }
  801. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  802. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  803. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  804. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  805. else
  806. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  807. }
  808. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  809. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  810. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  811. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  812. else
  813. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  814. }
  815. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  816. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  817. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  818. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  819. else
  820. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  821. }
  822. /* Make the camera work in widest common mode, we'll take care of
  823. * the rest */
  824. if (common_flags & SOCAM_DATAWIDTH_15)
  825. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  826. SOCAM_DATAWIDTH_15;
  827. else if (common_flags & SOCAM_DATAWIDTH_10)
  828. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  829. SOCAM_DATAWIDTH_10;
  830. else if (common_flags & SOCAM_DATAWIDTH_8)
  831. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  832. SOCAM_DATAWIDTH_8;
  833. else
  834. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  835. SOCAM_DATAWIDTH_4;
  836. ret = icd->ops->set_bus_param(icd, common_flags);
  837. if (ret < 0)
  838. return ret;
  839. /*
  840. * So far only gated clock mode is supported. Add a line
  841. * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
  842. * below and select the required mode when supporting other
  843. * synchronisation protocols.
  844. */
  845. sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
  846. ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
  847. (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
  848. (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
  849. (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
  850. (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
  851. (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
  852. /* TODO: Support RGB and YUV formats */
  853. /* This has been set in mx3_camera_activate(), but we clear it above */
  854. sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  855. if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
  856. sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  857. if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
  858. sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  859. if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
  860. sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  861. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  862. sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  863. /* Just do what we're asked to do */
  864. switch (xlate->host_fmt->depth) {
  865. case 4:
  866. dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  867. break;
  868. case 8:
  869. dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  870. break;
  871. case 10:
  872. dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  873. break;
  874. default:
  875. /*
  876. * Actually it can only be 15 now, default is just to silence
  877. * compiler warnings
  878. */
  879. case 15:
  880. dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  881. }
  882. csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
  883. dev_dbg(&ici->dev, "Set SENS_CONF to %x\n", sens_conf | dw);
  884. return 0;
  885. }
  886. static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
  887. .owner = THIS_MODULE,
  888. .add = mx3_camera_add_device,
  889. .remove = mx3_camera_remove_device,
  890. #ifdef CONFIG_PM
  891. .suspend = mx3_camera_suspend,
  892. .resume = mx3_camera_resume,
  893. #endif
  894. .set_crop = mx3_camera_set_crop,
  895. .set_fmt = mx3_camera_set_fmt,
  896. .try_fmt = mx3_camera_try_fmt,
  897. .get_formats = mx3_camera_get_formats,
  898. .init_videobuf = mx3_camera_init_videobuf,
  899. .reqbufs = mx3_camera_reqbufs,
  900. .poll = mx3_camera_poll,
  901. .querycap = mx3_camera_querycap,
  902. .set_bus_param = mx3_camera_set_bus_param,
  903. };
  904. static int mx3_camera_probe(struct platform_device *pdev)
  905. {
  906. struct mx3_camera_dev *mx3_cam;
  907. struct resource *res;
  908. void __iomem *base;
  909. int err = 0;
  910. struct soc_camera_host *soc_host;
  911. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  912. if (!res) {
  913. err = -ENODEV;
  914. goto egetres;
  915. }
  916. mx3_cam = vmalloc(sizeof(*mx3_cam));
  917. if (!mx3_cam) {
  918. dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
  919. err = -ENOMEM;
  920. goto ealloc;
  921. }
  922. memset(mx3_cam, 0, sizeof(*mx3_cam));
  923. mx3_cam->clk = clk_get(&pdev->dev, NULL);
  924. if (IS_ERR(mx3_cam->clk)) {
  925. err = PTR_ERR(mx3_cam->clk);
  926. goto eclkget;
  927. }
  928. dev_set_drvdata(&pdev->dev, mx3_cam);
  929. mx3_cam->pdata = pdev->dev.platform_data;
  930. mx3_cam->platform_flags = mx3_cam->pdata->flags;
  931. if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
  932. MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
  933. MX3_CAMERA_DATAWIDTH_15))) {
  934. /* Platform hasn't set available data widths. This is bad.
  935. * Warn and use a default. */
  936. dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
  937. "data widths, using default 8 bit\n");
  938. mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
  939. }
  940. mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
  941. if (!mx3_cam->mclk) {
  942. dev_warn(&pdev->dev,
  943. "mclk_10khz == 0! Please, fix your platform data. "
  944. "Using default 20MHz\n");
  945. mx3_cam->mclk = 20000000;
  946. }
  947. /* list of video-buffers */
  948. INIT_LIST_HEAD(&mx3_cam->capture);
  949. spin_lock_init(&mx3_cam->lock);
  950. base = ioremap(res->start, res->end - res->start + 1);
  951. if (!base) {
  952. err = -ENOMEM;
  953. goto eioremap;
  954. }
  955. mx3_cam->base = base;
  956. mx3_cam->dev = &pdev->dev;
  957. soc_host = &mx3_cam->soc_host;
  958. soc_host->drv_name = MX3_CAM_DRV_NAME;
  959. soc_host->ops = &mx3_soc_camera_host_ops;
  960. soc_host->priv = mx3_cam;
  961. soc_host->dev.parent = &pdev->dev;
  962. soc_host->nr = pdev->id;
  963. err = soc_camera_host_register(soc_host);
  964. if (err)
  965. goto ecamhostreg;
  966. /* IDMAC interface */
  967. dmaengine_get();
  968. return 0;
  969. ecamhostreg:
  970. iounmap(base);
  971. eioremap:
  972. clk_put(mx3_cam->clk);
  973. eclkget:
  974. vfree(mx3_cam);
  975. ealloc:
  976. egetres:
  977. return err;
  978. }
  979. static int __devexit mx3_camera_remove(struct platform_device *pdev)
  980. {
  981. struct mx3_camera_dev *mx3_cam = platform_get_drvdata(pdev);
  982. clk_put(mx3_cam->clk);
  983. soc_camera_host_unregister(&mx3_cam->soc_host);
  984. iounmap(mx3_cam->base);
  985. /*
  986. * The channel has either not been allocated,
  987. * or should have been released
  988. */
  989. if (WARN_ON(mx3_cam->idmac_channel[0]))
  990. dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
  991. vfree(mx3_cam);
  992. dmaengine_put();
  993. dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
  994. return 0;
  995. }
  996. static struct platform_driver mx3_camera_driver = {
  997. .driver = {
  998. .name = MX3_CAM_DRV_NAME,
  999. },
  1000. .probe = mx3_camera_probe,
  1001. .remove = __exit_p(mx3_camera_remove),
  1002. };
  1003. static int __devinit mx3_camera_init(void)
  1004. {
  1005. return platform_driver_register(&mx3_camera_driver);
  1006. }
  1007. static void __exit mx3_camera_exit(void)
  1008. {
  1009. platform_driver_unregister(&mx3_camera_driver);
  1010. }
  1011. module_init(mx3_camera_init);
  1012. module_exit(mx3_camera_exit);
  1013. MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
  1014. MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
  1015. MODULE_LICENSE("GPL v2");