w83793.c 48 KB

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  1. /*
  2. w83793.c - Linux kernel driver for hardware monitoring
  3. Copyright (C) 2006 Winbond Electronics Corp.
  4. Yuan Mu
  5. Rudolf Marek <r.marek@assembler.cz>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation - version 2.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  16. 02110-1301 USA.
  17. */
  18. /*
  19. Supports following chips:
  20. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  21. w83793 10 12 8 6 0x7b 0x5ca3 yes no
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/slab.h>
  26. #include <linux/i2c.h>
  27. #include <linux/hwmon.h>
  28. #include <linux/hwmon-vid.h>
  29. #include <linux/hwmon-sysfs.h>
  30. #include <linux/err.h>
  31. #include <linux/mutex.h>
  32. /* Addresses to scan */
  33. static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
  34. I2C_CLIENT_END };
  35. /* Insmod parameters */
  36. I2C_CLIENT_INSMOD_1(w83793);
  37. static unsigned short force_subclients[4];
  38. module_param_array(force_subclients, short, NULL, 0);
  39. MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
  40. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  41. static int reset;
  42. module_param(reset, bool, 0);
  43. MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
  44. /*
  45. Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
  46. as ID, Bank Select registers
  47. */
  48. #define W83793_REG_BANKSEL 0x00
  49. #define W83793_REG_VENDORID 0x0d
  50. #define W83793_REG_CHIPID 0x0e
  51. #define W83793_REG_DEVICEID 0x0f
  52. #define W83793_REG_CONFIG 0x40
  53. #define W83793_REG_MFC 0x58
  54. #define W83793_REG_FANIN_CTRL 0x5c
  55. #define W83793_REG_FANIN_SEL 0x5d
  56. #define W83793_REG_I2C_ADDR 0x0b
  57. #define W83793_REG_I2C_SUBADDR 0x0c
  58. #define W83793_REG_VID_INA 0x05
  59. #define W83793_REG_VID_INB 0x06
  60. #define W83793_REG_VID_LATCHA 0x07
  61. #define W83793_REG_VID_LATCHB 0x08
  62. #define W83793_REG_VID_CTRL 0x59
  63. static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
  64. #define TEMP_READ 0
  65. #define TEMP_CRIT 1
  66. #define TEMP_CRIT_HYST 2
  67. #define TEMP_WARN 3
  68. #define TEMP_WARN_HYST 4
  69. /* only crit and crit_hyst affect real-time alarm status
  70. current crit crit_hyst warn warn_hyst */
  71. static u16 W83793_REG_TEMP[][5] = {
  72. {0x1c, 0x78, 0x79, 0x7a, 0x7b},
  73. {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
  74. {0x1e, 0x80, 0x81, 0x82, 0x83},
  75. {0x1f, 0x84, 0x85, 0x86, 0x87},
  76. {0x20, 0x88, 0x89, 0x8a, 0x8b},
  77. {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
  78. };
  79. #define W83793_REG_TEMP_LOW_BITS 0x22
  80. #define W83793_REG_BEEP(index) (0x53 + (index))
  81. #define W83793_REG_ALARM(index) (0x4b + (index))
  82. #define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
  83. #define W83793_REG_IRQ_CTRL 0x50
  84. #define W83793_REG_OVT_CTRL 0x51
  85. #define W83793_REG_OVT_BEEP 0x52
  86. #define IN_READ 0
  87. #define IN_MAX 1
  88. #define IN_LOW 2
  89. static const u16 W83793_REG_IN[][3] = {
  90. /* Current, High, Low */
  91. {0x10, 0x60, 0x61}, /* Vcore A */
  92. {0x11, 0x62, 0x63}, /* Vcore B */
  93. {0x12, 0x64, 0x65}, /* Vtt */
  94. {0x14, 0x6a, 0x6b}, /* VSEN1 */
  95. {0x15, 0x6c, 0x6d}, /* VSEN2 */
  96. {0x16, 0x6e, 0x6f}, /* +3VSEN */
  97. {0x17, 0x70, 0x71}, /* +12VSEN */
  98. {0x18, 0x72, 0x73}, /* 5VDD */
  99. {0x19, 0x74, 0x75}, /* 5VSB */
  100. {0x1a, 0x76, 0x77}, /* VBAT */
  101. };
  102. /* Low Bits of Vcore A/B Vtt Read/High/Low */
  103. static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
  104. static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
  105. static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
  106. #define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
  107. #define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
  108. #define W83793_REG_PWM_DEFAULT 0xb2
  109. #define W83793_REG_PWM_ENABLE 0x207
  110. #define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
  111. #define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
  112. #define W83793_REG_TEMP_CRITICAL 0xc5
  113. #define PWM_DUTY 0
  114. #define PWM_START 1
  115. #define PWM_NONSTOP 2
  116. #define PWM_STOP_TIME 3
  117. #define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
  118. (nr) == 1 ? 0x220 : 0x218) + (index))
  119. /* bit field, fan1 is bit0, fan2 is bit1 ... */
  120. #define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
  121. #define W83793_REG_TEMP_TOL(index) (0x208 + (index))
  122. #define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
  123. #define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
  124. #define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
  125. #define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
  126. static inline unsigned long FAN_FROM_REG(u16 val)
  127. {
  128. if ((val >= 0xfff) || (val == 0))
  129. return 0;
  130. return (1350000UL / val);
  131. }
  132. static inline u16 FAN_TO_REG(long rpm)
  133. {
  134. if (rpm <= 0)
  135. return 0x0fff;
  136. return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
  137. }
  138. static inline unsigned long TIME_FROM_REG(u8 reg)
  139. {
  140. return (reg * 100);
  141. }
  142. static inline u8 TIME_TO_REG(unsigned long val)
  143. {
  144. return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
  145. }
  146. static inline long TEMP_FROM_REG(s8 reg)
  147. {
  148. return (reg * 1000);
  149. }
  150. static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
  151. {
  152. return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
  153. }
  154. struct w83793_data {
  155. struct i2c_client *lm75[2];
  156. struct device *hwmon_dev;
  157. struct mutex update_lock;
  158. char valid; /* !=0 if following fields are valid */
  159. unsigned long last_updated; /* In jiffies */
  160. unsigned long last_nonvolatile; /* In jiffies, last time we update the
  161. nonvolatile registers */
  162. u8 bank;
  163. u8 vrm;
  164. u8 vid[2];
  165. u8 in[10][3]; /* Register value, read/high/low */
  166. u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
  167. u16 has_fan; /* Only fan1- fan5 has own pins */
  168. u16 fan[12]; /* Register value combine */
  169. u16 fan_min[12]; /* Register value combine */
  170. s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
  171. u8 temp_low_bits; /* Additional resolution TD1-TD4 */
  172. u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
  173. byte 1: Temp R1,R2 mode, each has 1 bit */
  174. u8 temp_critical; /* If reached all fan will be at full speed */
  175. u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
  176. u8 has_pwm;
  177. u8 has_temp;
  178. u8 has_vid;
  179. u8 pwm_enable; /* Register value, each Temp has 1 bit */
  180. u8 pwm_uptime; /* Register value */
  181. u8 pwm_downtime; /* Register value */
  182. u8 pwm_default; /* All fan default pwm, next poweron valid */
  183. u8 pwm[8][3]; /* Register value */
  184. u8 pwm_stop_time[8];
  185. u8 temp_cruise[6];
  186. u8 alarms[5]; /* realtime status registers */
  187. u8 beeps[5];
  188. u8 beep_enable;
  189. u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
  190. u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
  191. u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
  192. };
  193. static u8 w83793_read_value(struct i2c_client *client, u16 reg);
  194. static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
  195. static int w83793_probe(struct i2c_client *client,
  196. const struct i2c_device_id *id);
  197. static int w83793_detect(struct i2c_client *client, int kind,
  198. struct i2c_board_info *info);
  199. static int w83793_remove(struct i2c_client *client);
  200. static void w83793_init_client(struct i2c_client *client);
  201. static void w83793_update_nonvolatile(struct device *dev);
  202. static struct w83793_data *w83793_update_device(struct device *dev);
  203. static const struct i2c_device_id w83793_id[] = {
  204. { "w83793", w83793 },
  205. { }
  206. };
  207. MODULE_DEVICE_TABLE(i2c, w83793_id);
  208. static struct i2c_driver w83793_driver = {
  209. .class = I2C_CLASS_HWMON,
  210. .driver = {
  211. .name = "w83793",
  212. },
  213. .probe = w83793_probe,
  214. .remove = w83793_remove,
  215. .id_table = w83793_id,
  216. .detect = w83793_detect,
  217. .address_data = &addr_data,
  218. };
  219. static ssize_t
  220. show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
  221. {
  222. struct w83793_data *data = dev_get_drvdata(dev);
  223. return sprintf(buf, "%d\n", data->vrm);
  224. }
  225. static ssize_t
  226. show_vid(struct device *dev, struct device_attribute *attr, char *buf)
  227. {
  228. struct w83793_data *data = w83793_update_device(dev);
  229. struct sensor_device_attribute_2 *sensor_attr =
  230. to_sensor_dev_attr_2(attr);
  231. int index = sensor_attr->index;
  232. return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
  233. }
  234. static ssize_t
  235. store_vrm(struct device *dev, struct device_attribute *attr,
  236. const char *buf, size_t count)
  237. {
  238. struct w83793_data *data = dev_get_drvdata(dev);
  239. data->vrm = simple_strtoul(buf, NULL, 10);
  240. return count;
  241. }
  242. #define ALARM_STATUS 0
  243. #define BEEP_ENABLE 1
  244. static ssize_t
  245. show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
  246. {
  247. struct w83793_data *data = w83793_update_device(dev);
  248. struct sensor_device_attribute_2 *sensor_attr =
  249. to_sensor_dev_attr_2(attr);
  250. int nr = sensor_attr->nr;
  251. int index = sensor_attr->index >> 3;
  252. int bit = sensor_attr->index & 0x07;
  253. u8 val;
  254. if (ALARM_STATUS == nr) {
  255. val = (data->alarms[index] >> (bit)) & 1;
  256. } else { /* BEEP_ENABLE */
  257. val = (data->beeps[index] >> (bit)) & 1;
  258. }
  259. return sprintf(buf, "%u\n", val);
  260. }
  261. static ssize_t
  262. store_beep(struct device *dev, struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. struct i2c_client *client = to_i2c_client(dev);
  266. struct w83793_data *data = i2c_get_clientdata(client);
  267. struct sensor_device_attribute_2 *sensor_attr =
  268. to_sensor_dev_attr_2(attr);
  269. int index = sensor_attr->index >> 3;
  270. int shift = sensor_attr->index & 0x07;
  271. u8 beep_bit = 1 << shift;
  272. u8 val;
  273. val = simple_strtoul(buf, NULL, 10);
  274. if (val != 0 && val != 1)
  275. return -EINVAL;
  276. mutex_lock(&data->update_lock);
  277. data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
  278. data->beeps[index] &= ~beep_bit;
  279. data->beeps[index] |= val << shift;
  280. w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
  281. mutex_unlock(&data->update_lock);
  282. return count;
  283. }
  284. static ssize_t
  285. show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
  286. {
  287. struct w83793_data *data = w83793_update_device(dev);
  288. return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
  289. }
  290. static ssize_t
  291. store_beep_enable(struct device *dev, struct device_attribute *attr,
  292. const char *buf, size_t count)
  293. {
  294. struct i2c_client *client = to_i2c_client(dev);
  295. struct w83793_data *data = i2c_get_clientdata(client);
  296. u8 val = simple_strtoul(buf, NULL, 10);
  297. if (val != 0 && val != 1)
  298. return -EINVAL;
  299. mutex_lock(&data->update_lock);
  300. data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
  301. & 0xfd;
  302. data->beep_enable |= val << 1;
  303. w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
  304. mutex_unlock(&data->update_lock);
  305. return count;
  306. }
  307. /* Write any value to clear chassis alarm */
  308. static ssize_t
  309. store_chassis_clear(struct device *dev,
  310. struct device_attribute *attr, const char *buf,
  311. size_t count)
  312. {
  313. struct i2c_client *client = to_i2c_client(dev);
  314. struct w83793_data *data = i2c_get_clientdata(client);
  315. u8 val;
  316. mutex_lock(&data->update_lock);
  317. val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
  318. val |= 0x80;
  319. w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
  320. mutex_unlock(&data->update_lock);
  321. return count;
  322. }
  323. #define FAN_INPUT 0
  324. #define FAN_MIN 1
  325. static ssize_t
  326. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  327. {
  328. struct sensor_device_attribute_2 *sensor_attr =
  329. to_sensor_dev_attr_2(attr);
  330. int nr = sensor_attr->nr;
  331. int index = sensor_attr->index;
  332. struct w83793_data *data = w83793_update_device(dev);
  333. u16 val;
  334. if (FAN_INPUT == nr) {
  335. val = data->fan[index] & 0x0fff;
  336. } else {
  337. val = data->fan_min[index] & 0x0fff;
  338. }
  339. return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
  340. }
  341. static ssize_t
  342. store_fan_min(struct device *dev, struct device_attribute *attr,
  343. const char *buf, size_t count)
  344. {
  345. struct sensor_device_attribute_2 *sensor_attr =
  346. to_sensor_dev_attr_2(attr);
  347. int index = sensor_attr->index;
  348. struct i2c_client *client = to_i2c_client(dev);
  349. struct w83793_data *data = i2c_get_clientdata(client);
  350. u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10));
  351. mutex_lock(&data->update_lock);
  352. data->fan_min[index] = val;
  353. w83793_write_value(client, W83793_REG_FAN_MIN(index),
  354. (val >> 8) & 0xff);
  355. w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
  356. mutex_unlock(&data->update_lock);
  357. return count;
  358. }
  359. static ssize_t
  360. show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  361. {
  362. struct sensor_device_attribute_2 *sensor_attr =
  363. to_sensor_dev_attr_2(attr);
  364. struct w83793_data *data = w83793_update_device(dev);
  365. u16 val;
  366. int nr = sensor_attr->nr;
  367. int index = sensor_attr->index;
  368. if (PWM_STOP_TIME == nr)
  369. val = TIME_FROM_REG(data->pwm_stop_time[index]);
  370. else
  371. val = (data->pwm[index][nr] & 0x3f) << 2;
  372. return sprintf(buf, "%d\n", val);
  373. }
  374. static ssize_t
  375. store_pwm(struct device *dev, struct device_attribute *attr,
  376. const char *buf, size_t count)
  377. {
  378. struct i2c_client *client = to_i2c_client(dev);
  379. struct w83793_data *data = i2c_get_clientdata(client);
  380. struct sensor_device_attribute_2 *sensor_attr =
  381. to_sensor_dev_attr_2(attr);
  382. int nr = sensor_attr->nr;
  383. int index = sensor_attr->index;
  384. u8 val;
  385. mutex_lock(&data->update_lock);
  386. if (PWM_STOP_TIME == nr) {
  387. val = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
  388. data->pwm_stop_time[index] = val;
  389. w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
  390. val);
  391. } else {
  392. val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff)
  393. >> 2;
  394. data->pwm[index][nr] =
  395. w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
  396. data->pwm[index][nr] |= val;
  397. w83793_write_value(client, W83793_REG_PWM(index, nr),
  398. data->pwm[index][nr]);
  399. }
  400. mutex_unlock(&data->update_lock);
  401. return count;
  402. }
  403. static ssize_t
  404. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  405. {
  406. struct sensor_device_attribute_2 *sensor_attr =
  407. to_sensor_dev_attr_2(attr);
  408. int nr = sensor_attr->nr;
  409. int index = sensor_attr->index;
  410. struct w83793_data *data = w83793_update_device(dev);
  411. long temp = TEMP_FROM_REG(data->temp[index][nr]);
  412. if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */
  413. int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
  414. temp += temp > 0 ? low : -low;
  415. }
  416. return sprintf(buf, "%ld\n", temp);
  417. }
  418. static ssize_t
  419. store_temp(struct device *dev, struct device_attribute *attr,
  420. const char *buf, size_t count)
  421. {
  422. struct sensor_device_attribute_2 *sensor_attr =
  423. to_sensor_dev_attr_2(attr);
  424. int nr = sensor_attr->nr;
  425. int index = sensor_attr->index;
  426. struct i2c_client *client = to_i2c_client(dev);
  427. struct w83793_data *data = i2c_get_clientdata(client);
  428. long tmp = simple_strtol(buf, NULL, 10);
  429. mutex_lock(&data->update_lock);
  430. data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
  431. w83793_write_value(client, W83793_REG_TEMP[index][nr],
  432. data->temp[index][nr]);
  433. mutex_unlock(&data->update_lock);
  434. return count;
  435. }
  436. /*
  437. TD1-TD4
  438. each has 4 mode:(2 bits)
  439. 0: Stop monitor
  440. 1: Use internal temp sensor(default)
  441. 2: Reserved
  442. 3: Use sensor in Intel CPU and get result by PECI
  443. TR1-TR2
  444. each has 2 mode:(1 bit)
  445. 0: Disable temp sensor monitor
  446. 1: To enable temp sensors monitor
  447. */
  448. /* 0 disable, 6 PECI */
  449. static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
  450. static ssize_t
  451. show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
  452. {
  453. struct w83793_data *data = w83793_update_device(dev);
  454. struct sensor_device_attribute_2 *sensor_attr =
  455. to_sensor_dev_attr_2(attr);
  456. int index = sensor_attr->index;
  457. u8 mask = (index < 4) ? 0x03 : 0x01;
  458. u8 shift = (index < 4) ? (2 * index) : (index - 4);
  459. u8 tmp;
  460. index = (index < 4) ? 0 : 1;
  461. tmp = (data->temp_mode[index] >> shift) & mask;
  462. /* for the internal sensor, found out if diode or thermistor */
  463. if (tmp == 1) {
  464. tmp = index == 0 ? 3 : 4;
  465. } else {
  466. tmp = TO_TEMP_MODE[tmp];
  467. }
  468. return sprintf(buf, "%d\n", tmp);
  469. }
  470. static ssize_t
  471. store_temp_mode(struct device *dev, struct device_attribute *attr,
  472. const char *buf, size_t count)
  473. {
  474. struct i2c_client *client = to_i2c_client(dev);
  475. struct w83793_data *data = i2c_get_clientdata(client);
  476. struct sensor_device_attribute_2 *sensor_attr =
  477. to_sensor_dev_attr_2(attr);
  478. int index = sensor_attr->index;
  479. u8 mask = (index < 4) ? 0x03 : 0x01;
  480. u8 shift = (index < 4) ? (2 * index) : (index - 4);
  481. u8 val = simple_strtoul(buf, NULL, 10);
  482. /* transform the sysfs interface values into table above */
  483. if ((val == 6) && (index < 4)) {
  484. val -= 3;
  485. } else if ((val == 3 && index < 4)
  486. || (val == 4 && index >= 4)) {
  487. /* transform diode or thermistor into internal enable */
  488. val = !!val;
  489. } else {
  490. return -EINVAL;
  491. }
  492. index = (index < 4) ? 0 : 1;
  493. mutex_lock(&data->update_lock);
  494. data->temp_mode[index] =
  495. w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
  496. data->temp_mode[index] &= ~(mask << shift);
  497. data->temp_mode[index] |= val << shift;
  498. w83793_write_value(client, W83793_REG_TEMP_MODE[index],
  499. data->temp_mode[index]);
  500. mutex_unlock(&data->update_lock);
  501. return count;
  502. }
  503. #define SETUP_PWM_DEFAULT 0
  504. #define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
  505. #define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
  506. #define SETUP_TEMP_CRITICAL 3
  507. static ssize_t
  508. show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
  509. {
  510. struct sensor_device_attribute_2 *sensor_attr =
  511. to_sensor_dev_attr_2(attr);
  512. int nr = sensor_attr->nr;
  513. struct w83793_data *data = w83793_update_device(dev);
  514. u32 val = 0;
  515. if (SETUP_PWM_DEFAULT == nr) {
  516. val = (data->pwm_default & 0x3f) << 2;
  517. } else if (SETUP_PWM_UPTIME == nr) {
  518. val = TIME_FROM_REG(data->pwm_uptime);
  519. } else if (SETUP_PWM_DOWNTIME == nr) {
  520. val = TIME_FROM_REG(data->pwm_downtime);
  521. } else if (SETUP_TEMP_CRITICAL == nr) {
  522. val = TEMP_FROM_REG(data->temp_critical & 0x7f);
  523. }
  524. return sprintf(buf, "%d\n", val);
  525. }
  526. static ssize_t
  527. store_sf_setup(struct device *dev, struct device_attribute *attr,
  528. const char *buf, size_t count)
  529. {
  530. struct sensor_device_attribute_2 *sensor_attr =
  531. to_sensor_dev_attr_2(attr);
  532. int nr = sensor_attr->nr;
  533. struct i2c_client *client = to_i2c_client(dev);
  534. struct w83793_data *data = i2c_get_clientdata(client);
  535. mutex_lock(&data->update_lock);
  536. if (SETUP_PWM_DEFAULT == nr) {
  537. data->pwm_default =
  538. w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
  539. data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL,
  540. 10),
  541. 0, 0xff) >> 2;
  542. w83793_write_value(client, W83793_REG_PWM_DEFAULT,
  543. data->pwm_default);
  544. } else if (SETUP_PWM_UPTIME == nr) {
  545. data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
  546. data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
  547. w83793_write_value(client, W83793_REG_PWM_UPTIME,
  548. data->pwm_uptime);
  549. } else if (SETUP_PWM_DOWNTIME == nr) {
  550. data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
  551. data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
  552. w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
  553. data->pwm_downtime);
  554. } else { /* SETUP_TEMP_CRITICAL */
  555. data->temp_critical =
  556. w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
  557. data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10),
  558. 0, 0x7f);
  559. w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
  560. data->temp_critical);
  561. }
  562. mutex_unlock(&data->update_lock);
  563. return count;
  564. }
  565. /*
  566. Temp SmartFan control
  567. TEMP_FAN_MAP
  568. Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
  569. It's possible two or more temp channels control the same fan, w83793
  570. always prefers to pick the most critical request and applies it to
  571. the related Fan.
  572. It's possible one fan is not in any mapping of 6 temp channels, this
  573. means the fan is manual mode
  574. TEMP_PWM_ENABLE
  575. Each temp channel has its own SmartFan mode, and temp channel
  576. control fans that are set by TEMP_FAN_MAP
  577. 0: SmartFanII mode
  578. 1: Thermal Cruise Mode
  579. TEMP_CRUISE
  580. Target temperature in thermal cruise mode, w83793 will try to turn
  581. fan speed to keep the temperature of target device around this
  582. temperature.
  583. TEMP_TOLERANCE
  584. If Temp higher or lower than target with this tolerance, w83793
  585. will take actions to speed up or slow down the fan to keep the
  586. temperature within the tolerance range.
  587. */
  588. #define TEMP_FAN_MAP 0
  589. #define TEMP_PWM_ENABLE 1
  590. #define TEMP_CRUISE 2
  591. #define TEMP_TOLERANCE 3
  592. static ssize_t
  593. show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
  594. {
  595. struct sensor_device_attribute_2 *sensor_attr =
  596. to_sensor_dev_attr_2(attr);
  597. int nr = sensor_attr->nr;
  598. int index = sensor_attr->index;
  599. struct w83793_data *data = w83793_update_device(dev);
  600. u32 val;
  601. if (TEMP_FAN_MAP == nr) {
  602. val = data->temp_fan_map[index];
  603. } else if (TEMP_PWM_ENABLE == nr) {
  604. /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
  605. val = ((data->pwm_enable >> index) & 0x01) + 2;
  606. } else if (TEMP_CRUISE == nr) {
  607. val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
  608. } else { /* TEMP_TOLERANCE */
  609. val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
  610. val = TEMP_FROM_REG(val & 0x0f);
  611. }
  612. return sprintf(buf, "%d\n", val);
  613. }
  614. static ssize_t
  615. store_sf_ctrl(struct device *dev, struct device_attribute *attr,
  616. const char *buf, size_t count)
  617. {
  618. struct sensor_device_attribute_2 *sensor_attr =
  619. to_sensor_dev_attr_2(attr);
  620. int nr = sensor_attr->nr;
  621. int index = sensor_attr->index;
  622. struct i2c_client *client = to_i2c_client(dev);
  623. struct w83793_data *data = i2c_get_clientdata(client);
  624. u32 val;
  625. mutex_lock(&data->update_lock);
  626. if (TEMP_FAN_MAP == nr) {
  627. val = simple_strtoul(buf, NULL, 10) & 0xff;
  628. w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
  629. data->temp_fan_map[index] = val;
  630. } else if (TEMP_PWM_ENABLE == nr) {
  631. val = simple_strtoul(buf, NULL, 10);
  632. if (2 == val || 3 == val) {
  633. data->pwm_enable =
  634. w83793_read_value(client, W83793_REG_PWM_ENABLE);
  635. if (val - 2)
  636. data->pwm_enable |= 1 << index;
  637. else
  638. data->pwm_enable &= ~(1 << index);
  639. w83793_write_value(client, W83793_REG_PWM_ENABLE,
  640. data->pwm_enable);
  641. } else {
  642. mutex_unlock(&data->update_lock);
  643. return -EINVAL;
  644. }
  645. } else if (TEMP_CRUISE == nr) {
  646. data->temp_cruise[index] =
  647. w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
  648. val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
  649. data->temp_cruise[index] &= 0x80;
  650. data->temp_cruise[index] |= val;
  651. w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
  652. data->temp_cruise[index]);
  653. } else { /* TEMP_TOLERANCE */
  654. int i = index >> 1;
  655. u8 shift = (index & 0x01) ? 4 : 0;
  656. data->tolerance[i] =
  657. w83793_read_value(client, W83793_REG_TEMP_TOL(i));
  658. val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f);
  659. data->tolerance[i] &= ~(0x0f << shift);
  660. data->tolerance[i] |= val << shift;
  661. w83793_write_value(client, W83793_REG_TEMP_TOL(i),
  662. data->tolerance[i]);
  663. }
  664. mutex_unlock(&data->update_lock);
  665. return count;
  666. }
  667. static ssize_t
  668. show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  669. {
  670. struct sensor_device_attribute_2 *sensor_attr =
  671. to_sensor_dev_attr_2(attr);
  672. int nr = sensor_attr->nr;
  673. int index = sensor_attr->index;
  674. struct w83793_data *data = w83793_update_device(dev);
  675. return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
  676. }
  677. static ssize_t
  678. store_sf2_pwm(struct device *dev, struct device_attribute *attr,
  679. const char *buf, size_t count)
  680. {
  681. struct i2c_client *client = to_i2c_client(dev);
  682. struct w83793_data *data = i2c_get_clientdata(client);
  683. struct sensor_device_attribute_2 *sensor_attr =
  684. to_sensor_dev_attr_2(attr);
  685. int nr = sensor_attr->nr;
  686. int index = sensor_attr->index;
  687. u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2;
  688. mutex_lock(&data->update_lock);
  689. data->sf2_pwm[index][nr] =
  690. w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
  691. data->sf2_pwm[index][nr] |= val;
  692. w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
  693. data->sf2_pwm[index][nr]);
  694. mutex_unlock(&data->update_lock);
  695. return count;
  696. }
  697. static ssize_t
  698. show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
  699. {
  700. struct sensor_device_attribute_2 *sensor_attr =
  701. to_sensor_dev_attr_2(attr);
  702. int nr = sensor_attr->nr;
  703. int index = sensor_attr->index;
  704. struct w83793_data *data = w83793_update_device(dev);
  705. return sprintf(buf, "%ld\n",
  706. TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
  707. }
  708. static ssize_t
  709. store_sf2_temp(struct device *dev, struct device_attribute *attr,
  710. const char *buf, size_t count)
  711. {
  712. struct i2c_client *client = to_i2c_client(dev);
  713. struct w83793_data *data = i2c_get_clientdata(client);
  714. struct sensor_device_attribute_2 *sensor_attr =
  715. to_sensor_dev_attr_2(attr);
  716. int nr = sensor_attr->nr;
  717. int index = sensor_attr->index;
  718. u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
  719. mutex_lock(&data->update_lock);
  720. data->sf2_temp[index][nr] =
  721. w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
  722. data->sf2_temp[index][nr] |= val;
  723. w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
  724. data->sf2_temp[index][nr]);
  725. mutex_unlock(&data->update_lock);
  726. return count;
  727. }
  728. /* only Vcore A/B and Vtt have additional 2 bits precision */
  729. static ssize_t
  730. show_in(struct device *dev, struct device_attribute *attr, char *buf)
  731. {
  732. struct sensor_device_attribute_2 *sensor_attr =
  733. to_sensor_dev_attr_2(attr);
  734. int nr = sensor_attr->nr;
  735. int index = sensor_attr->index;
  736. struct w83793_data *data = w83793_update_device(dev);
  737. u16 val = data->in[index][nr];
  738. if (index < 3) {
  739. val <<= 2;
  740. val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
  741. }
  742. /* voltage inputs 5VDD and 5VSB needs 150mV offset */
  743. val = val * scale_in[index] + scale_in_add[index];
  744. return sprintf(buf, "%d\n", val);
  745. }
  746. static ssize_t
  747. store_in(struct device *dev, struct device_attribute *attr,
  748. const char *buf, size_t count)
  749. {
  750. struct sensor_device_attribute_2 *sensor_attr =
  751. to_sensor_dev_attr_2(attr);
  752. int nr = sensor_attr->nr;
  753. int index = sensor_attr->index;
  754. struct i2c_client *client = to_i2c_client(dev);
  755. struct w83793_data *data = i2c_get_clientdata(client);
  756. u32 val;
  757. val =
  758. (simple_strtoul(buf, NULL, 10) +
  759. scale_in[index] / 2) / scale_in[index];
  760. mutex_lock(&data->update_lock);
  761. if (index > 2) {
  762. /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
  763. if (1 == nr || 2 == nr) {
  764. val -= scale_in_add[index] / scale_in[index];
  765. }
  766. val = SENSORS_LIMIT(val, 0, 255);
  767. } else {
  768. val = SENSORS_LIMIT(val, 0, 0x3FF);
  769. data->in_low_bits[nr] =
  770. w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
  771. data->in_low_bits[nr] &= ~(0x03 << (2 * index));
  772. data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
  773. w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
  774. data->in_low_bits[nr]);
  775. val >>= 2;
  776. }
  777. data->in[index][nr] = val;
  778. w83793_write_value(client, W83793_REG_IN[index][nr],
  779. data->in[index][nr]);
  780. mutex_unlock(&data->update_lock);
  781. return count;
  782. }
  783. #define NOT_USED -1
  784. #define SENSOR_ATTR_IN(index) \
  785. SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
  786. IN_READ, index), \
  787. SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
  788. store_in, IN_MAX, index), \
  789. SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
  790. store_in, IN_LOW, index), \
  791. SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
  792. NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
  793. SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
  794. show_alarm_beep, store_beep, BEEP_ENABLE, \
  795. index + ((index > 2) ? 1 : 0))
  796. #define SENSOR_ATTR_FAN(index) \
  797. SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
  798. NULL, ALARM_STATUS, index + 17), \
  799. SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
  800. show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
  801. SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
  802. NULL, FAN_INPUT, index - 1), \
  803. SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
  804. show_fan, store_fan_min, FAN_MIN, index - 1)
  805. #define SENSOR_ATTR_PWM(index) \
  806. SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
  807. store_pwm, PWM_DUTY, index - 1), \
  808. SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
  809. show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
  810. SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
  811. show_pwm, store_pwm, PWM_START, index - 1), \
  812. SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
  813. show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
  814. #define SENSOR_ATTR_TEMP(index) \
  815. SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
  816. show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
  817. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
  818. NULL, TEMP_READ, index - 1), \
  819. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
  820. store_temp, TEMP_CRIT, index - 1), \
  821. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  822. show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
  823. SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
  824. store_temp, TEMP_WARN, index - 1), \
  825. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
  826. show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
  827. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  828. show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
  829. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  830. show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
  831. SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
  832. S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
  833. TEMP_FAN_MAP, index - 1), \
  834. SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
  835. show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
  836. index - 1), \
  837. SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
  838. show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
  839. SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
  840. store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
  841. SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
  842. show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
  843. SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
  844. show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
  845. SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
  846. show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
  847. SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
  848. show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
  849. SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
  850. show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
  851. SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
  852. show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
  853. SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
  854. show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
  855. SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
  856. show_sf2_temp, store_sf2_temp, 0, index - 1), \
  857. SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
  858. show_sf2_temp, store_sf2_temp, 1, index - 1), \
  859. SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
  860. show_sf2_temp, store_sf2_temp, 2, index - 1), \
  861. SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
  862. show_sf2_temp, store_sf2_temp, 3, index - 1), \
  863. SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
  864. show_sf2_temp, store_sf2_temp, 4, index - 1), \
  865. SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
  866. show_sf2_temp, store_sf2_temp, 5, index - 1), \
  867. SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
  868. show_sf2_temp, store_sf2_temp, 6, index - 1)
  869. static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
  870. SENSOR_ATTR_IN(0),
  871. SENSOR_ATTR_IN(1),
  872. SENSOR_ATTR_IN(2),
  873. SENSOR_ATTR_IN(3),
  874. SENSOR_ATTR_IN(4),
  875. SENSOR_ATTR_IN(5),
  876. SENSOR_ATTR_IN(6),
  877. SENSOR_ATTR_IN(7),
  878. SENSOR_ATTR_IN(8),
  879. SENSOR_ATTR_IN(9),
  880. SENSOR_ATTR_FAN(1),
  881. SENSOR_ATTR_FAN(2),
  882. SENSOR_ATTR_FAN(3),
  883. SENSOR_ATTR_FAN(4),
  884. SENSOR_ATTR_FAN(5),
  885. SENSOR_ATTR_PWM(1),
  886. SENSOR_ATTR_PWM(2),
  887. SENSOR_ATTR_PWM(3),
  888. };
  889. static struct sensor_device_attribute_2 w83793_temp[] = {
  890. SENSOR_ATTR_TEMP(1),
  891. SENSOR_ATTR_TEMP(2),
  892. SENSOR_ATTR_TEMP(3),
  893. SENSOR_ATTR_TEMP(4),
  894. SENSOR_ATTR_TEMP(5),
  895. SENSOR_ATTR_TEMP(6),
  896. };
  897. /* Fan6-Fan12 */
  898. static struct sensor_device_attribute_2 w83793_left_fan[] = {
  899. SENSOR_ATTR_FAN(6),
  900. SENSOR_ATTR_FAN(7),
  901. SENSOR_ATTR_FAN(8),
  902. SENSOR_ATTR_FAN(9),
  903. SENSOR_ATTR_FAN(10),
  904. SENSOR_ATTR_FAN(11),
  905. SENSOR_ATTR_FAN(12),
  906. };
  907. /* Pwm4-Pwm8 */
  908. static struct sensor_device_attribute_2 w83793_left_pwm[] = {
  909. SENSOR_ATTR_PWM(4),
  910. SENSOR_ATTR_PWM(5),
  911. SENSOR_ATTR_PWM(6),
  912. SENSOR_ATTR_PWM(7),
  913. SENSOR_ATTR_PWM(8),
  914. };
  915. static struct sensor_device_attribute_2 w83793_vid[] = {
  916. SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
  917. SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
  918. };
  919. static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
  920. static struct sensor_device_attribute_2 sda_single_files[] = {
  921. SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
  922. store_chassis_clear, ALARM_STATUS, 30),
  923. SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
  924. store_beep_enable, NOT_USED, NOT_USED),
  925. SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
  926. store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
  927. SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
  928. store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
  929. SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
  930. store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
  931. SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
  932. store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
  933. };
  934. static void w83793_init_client(struct i2c_client *client)
  935. {
  936. if (reset) {
  937. w83793_write_value(client, W83793_REG_CONFIG, 0x80);
  938. }
  939. /* Start monitoring */
  940. w83793_write_value(client, W83793_REG_CONFIG,
  941. w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
  942. }
  943. static int w83793_remove(struct i2c_client *client)
  944. {
  945. struct w83793_data *data = i2c_get_clientdata(client);
  946. struct device *dev = &client->dev;
  947. int i;
  948. hwmon_device_unregister(data->hwmon_dev);
  949. for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
  950. device_remove_file(dev,
  951. &w83793_sensor_attr_2[i].dev_attr);
  952. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
  953. device_remove_file(dev, &sda_single_files[i].dev_attr);
  954. for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
  955. device_remove_file(dev, &w83793_vid[i].dev_attr);
  956. device_remove_file(dev, &dev_attr_vrm);
  957. for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
  958. device_remove_file(dev, &w83793_left_fan[i].dev_attr);
  959. for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
  960. device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
  961. for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
  962. device_remove_file(dev, &w83793_temp[i].dev_attr);
  963. if (data->lm75[0] != NULL)
  964. i2c_unregister_device(data->lm75[0]);
  965. if (data->lm75[1] != NULL)
  966. i2c_unregister_device(data->lm75[1]);
  967. kfree(data);
  968. return 0;
  969. }
  970. static int
  971. w83793_detect_subclients(struct i2c_client *client)
  972. {
  973. int i, id, err;
  974. int address = client->addr;
  975. u8 tmp;
  976. struct i2c_adapter *adapter = client->adapter;
  977. struct w83793_data *data = i2c_get_clientdata(client);
  978. id = i2c_adapter_id(adapter);
  979. if (force_subclients[0] == id && force_subclients[1] == address) {
  980. for (i = 2; i <= 3; i++) {
  981. if (force_subclients[i] < 0x48
  982. || force_subclients[i] > 0x4f) {
  983. dev_err(&client->dev,
  984. "invalid subclient "
  985. "address %d; must be 0x48-0x4f\n",
  986. force_subclients[i]);
  987. err = -EINVAL;
  988. goto ERROR_SC_0;
  989. }
  990. }
  991. w83793_write_value(client, W83793_REG_I2C_SUBADDR,
  992. (force_subclients[2] & 0x07) |
  993. ((force_subclients[3] & 0x07) << 4));
  994. }
  995. tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
  996. if (!(tmp & 0x08)) {
  997. data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
  998. }
  999. if (!(tmp & 0x80)) {
  1000. if ((data->lm75[0] != NULL)
  1001. && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
  1002. dev_err(&client->dev,
  1003. "duplicate addresses 0x%x, "
  1004. "use force_subclients\n", data->lm75[0]->addr);
  1005. err = -ENODEV;
  1006. goto ERROR_SC_1;
  1007. }
  1008. data->lm75[1] = i2c_new_dummy(adapter,
  1009. 0x48 + ((tmp >> 4) & 0x7));
  1010. }
  1011. return 0;
  1012. /* Undo inits in case of errors */
  1013. ERROR_SC_1:
  1014. if (data->lm75[0] != NULL)
  1015. i2c_unregister_device(data->lm75[0]);
  1016. ERROR_SC_0:
  1017. return err;
  1018. }
  1019. /* Return 0 if detection is successful, -ENODEV otherwise */
  1020. static int w83793_detect(struct i2c_client *client, int kind,
  1021. struct i2c_board_info *info)
  1022. {
  1023. u8 tmp, bank;
  1024. struct i2c_adapter *adapter = client->adapter;
  1025. unsigned short address = client->addr;
  1026. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  1027. return -ENODEV;
  1028. }
  1029. bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
  1030. if (kind < 0) {
  1031. tmp = bank & 0x80 ? 0x5c : 0xa3;
  1032. /* Check Winbond vendor ID */
  1033. if (tmp != i2c_smbus_read_byte_data(client,
  1034. W83793_REG_VENDORID)) {
  1035. pr_debug("w83793: Detection failed at check "
  1036. "vendor id\n");
  1037. return -ENODEV;
  1038. }
  1039. /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
  1040. should match */
  1041. if ((bank & 0x07) == 0
  1042. && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
  1043. (address << 1)) {
  1044. pr_debug("w83793: Detection failed at check "
  1045. "i2c addr\n");
  1046. return -ENODEV;
  1047. }
  1048. }
  1049. /* We have either had a force parameter, or we have already detected the
  1050. Winbond. Determine the chip type now */
  1051. if (kind <= 0) {
  1052. if (0x7b == i2c_smbus_read_byte_data(client,
  1053. W83793_REG_CHIPID)) {
  1054. kind = w83793;
  1055. } else {
  1056. if (kind == 0)
  1057. dev_warn(&adapter->dev, "w83793: Ignoring "
  1058. "'force' parameter for unknown chip "
  1059. "at address 0x%02x\n", address);
  1060. return -ENODEV;
  1061. }
  1062. }
  1063. strlcpy(info->type, "w83793", I2C_NAME_SIZE);
  1064. return 0;
  1065. }
  1066. static int w83793_probe(struct i2c_client *client,
  1067. const struct i2c_device_id *id)
  1068. {
  1069. struct device *dev = &client->dev;
  1070. struct w83793_data *data;
  1071. int i, tmp, val, err;
  1072. int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
  1073. int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
  1074. int files_temp = ARRAY_SIZE(w83793_temp) / 6;
  1075. data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
  1076. if (!data) {
  1077. err = -ENOMEM;
  1078. goto exit;
  1079. }
  1080. i2c_set_clientdata(client, data);
  1081. data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
  1082. mutex_init(&data->update_lock);
  1083. err = w83793_detect_subclients(client);
  1084. if (err)
  1085. goto free_mem;
  1086. /* Initialize the chip */
  1087. w83793_init_client(client);
  1088. /*
  1089. Only fan 1-5 has their own input pins,
  1090. Pwm 1-3 has their own pins
  1091. */
  1092. data->has_fan = 0x1f;
  1093. data->has_pwm = 0x07;
  1094. tmp = w83793_read_value(client, W83793_REG_MFC);
  1095. val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
  1096. /* check the function of pins 49-56 */
  1097. if (tmp & 0x80) {
  1098. data->has_vid |= 0x2; /* has VIDB */
  1099. } else {
  1100. data->has_pwm |= 0x18; /* pwm 4,5 */
  1101. if (val & 0x01) { /* fan 6 */
  1102. data->has_fan |= 0x20;
  1103. data->has_pwm |= 0x20;
  1104. }
  1105. if (val & 0x02) { /* fan 7 */
  1106. data->has_fan |= 0x40;
  1107. data->has_pwm |= 0x40;
  1108. }
  1109. if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
  1110. data->has_fan |= 0x80;
  1111. data->has_pwm |= 0x80;
  1112. }
  1113. }
  1114. /* check the function of pins 37-40 */
  1115. if (!(tmp & 0x29))
  1116. data->has_vid |= 0x1; /* has VIDA */
  1117. if (0x08 == (tmp & 0x0c)) {
  1118. if (val & 0x08) /* fan 9 */
  1119. data->has_fan |= 0x100;
  1120. if (val & 0x10) /* fan 10 */
  1121. data->has_fan |= 0x200;
  1122. }
  1123. if (0x20 == (tmp & 0x30)) {
  1124. if (val & 0x20) /* fan 11 */
  1125. data->has_fan |= 0x400;
  1126. if (val & 0x40) /* fan 12 */
  1127. data->has_fan |= 0x800;
  1128. }
  1129. if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
  1130. data->has_fan |= 0x80;
  1131. data->has_pwm |= 0x80;
  1132. }
  1133. tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
  1134. if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
  1135. data->has_fan |= 0x100;
  1136. }
  1137. if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
  1138. data->has_fan |= 0x200;
  1139. }
  1140. if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
  1141. data->has_fan |= 0x400;
  1142. }
  1143. if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
  1144. data->has_fan |= 0x800;
  1145. }
  1146. /* check the temp1-6 mode, ignore former AMDSI selected inputs */
  1147. tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]);
  1148. if (tmp & 0x01)
  1149. data->has_temp |= 0x01;
  1150. if (tmp & 0x04)
  1151. data->has_temp |= 0x02;
  1152. if (tmp & 0x10)
  1153. data->has_temp |= 0x04;
  1154. if (tmp & 0x40)
  1155. data->has_temp |= 0x08;
  1156. tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]);
  1157. if (tmp & 0x01)
  1158. data->has_temp |= 0x10;
  1159. if (tmp & 0x02)
  1160. data->has_temp |= 0x20;
  1161. /* Register sysfs hooks */
  1162. for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
  1163. err = device_create_file(dev,
  1164. &w83793_sensor_attr_2[i].dev_attr);
  1165. if (err)
  1166. goto exit_remove;
  1167. }
  1168. for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
  1169. if (!(data->has_vid & (1 << i)))
  1170. continue;
  1171. err = device_create_file(dev, &w83793_vid[i].dev_attr);
  1172. if (err)
  1173. goto exit_remove;
  1174. }
  1175. if (data->has_vid) {
  1176. data->vrm = vid_which_vrm();
  1177. err = device_create_file(dev, &dev_attr_vrm);
  1178. if (err)
  1179. goto exit_remove;
  1180. }
  1181. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
  1182. err = device_create_file(dev, &sda_single_files[i].dev_attr);
  1183. if (err)
  1184. goto exit_remove;
  1185. }
  1186. for (i = 0; i < 6; i++) {
  1187. int j;
  1188. if (!(data->has_temp & (1 << i)))
  1189. continue;
  1190. for (j = 0; j < files_temp; j++) {
  1191. err = device_create_file(dev,
  1192. &w83793_temp[(i) * files_temp
  1193. + j].dev_attr);
  1194. if (err)
  1195. goto exit_remove;
  1196. }
  1197. }
  1198. for (i = 5; i < 12; i++) {
  1199. int j;
  1200. if (!(data->has_fan & (1 << i)))
  1201. continue;
  1202. for (j = 0; j < files_fan; j++) {
  1203. err = device_create_file(dev,
  1204. &w83793_left_fan[(i - 5) * files_fan
  1205. + j].dev_attr);
  1206. if (err)
  1207. goto exit_remove;
  1208. }
  1209. }
  1210. for (i = 3; i < 8; i++) {
  1211. int j;
  1212. if (!(data->has_pwm & (1 << i)))
  1213. continue;
  1214. for (j = 0; j < files_pwm; j++) {
  1215. err = device_create_file(dev,
  1216. &w83793_left_pwm[(i - 3) * files_pwm
  1217. + j].dev_attr);
  1218. if (err)
  1219. goto exit_remove;
  1220. }
  1221. }
  1222. data->hwmon_dev = hwmon_device_register(dev);
  1223. if (IS_ERR(data->hwmon_dev)) {
  1224. err = PTR_ERR(data->hwmon_dev);
  1225. goto exit_remove;
  1226. }
  1227. return 0;
  1228. /* Unregister sysfs hooks */
  1229. exit_remove:
  1230. for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
  1231. device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
  1232. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
  1233. device_remove_file(dev, &sda_single_files[i].dev_attr);
  1234. for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
  1235. device_remove_file(dev, &w83793_vid[i].dev_attr);
  1236. for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
  1237. device_remove_file(dev, &w83793_left_fan[i].dev_attr);
  1238. for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
  1239. device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
  1240. for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
  1241. device_remove_file(dev, &w83793_temp[i].dev_attr);
  1242. if (data->lm75[0] != NULL)
  1243. i2c_unregister_device(data->lm75[0]);
  1244. if (data->lm75[1] != NULL)
  1245. i2c_unregister_device(data->lm75[1]);
  1246. free_mem:
  1247. kfree(data);
  1248. exit:
  1249. return err;
  1250. }
  1251. static void w83793_update_nonvolatile(struct device *dev)
  1252. {
  1253. struct i2c_client *client = to_i2c_client(dev);
  1254. struct w83793_data *data = i2c_get_clientdata(client);
  1255. int i, j;
  1256. /*
  1257. They are somewhat "stable" registers, and to update them everytime
  1258. takes so much time, it's just not worthy. Update them in a long
  1259. interval to avoid exception.
  1260. */
  1261. if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
  1262. || !data->valid))
  1263. return;
  1264. /* update voltage limits */
  1265. for (i = 1; i < 3; i++) {
  1266. for (j = 0; j < ARRAY_SIZE(data->in); j++) {
  1267. data->in[j][i] =
  1268. w83793_read_value(client, W83793_REG_IN[j][i]);
  1269. }
  1270. data->in_low_bits[i] =
  1271. w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
  1272. }
  1273. for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
  1274. /* Update the Fan measured value and limits */
  1275. if (!(data->has_fan & (1 << i))) {
  1276. continue;
  1277. }
  1278. data->fan_min[i] =
  1279. w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
  1280. data->fan_min[i] |=
  1281. w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
  1282. }
  1283. for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
  1284. if (!(data->has_temp & (1 << i)))
  1285. continue;
  1286. data->temp_fan_map[i] =
  1287. w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
  1288. for (j = 1; j < 5; j++) {
  1289. data->temp[i][j] =
  1290. w83793_read_value(client, W83793_REG_TEMP[i][j]);
  1291. }
  1292. data->temp_cruise[i] =
  1293. w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
  1294. for (j = 0; j < 7; j++) {
  1295. data->sf2_pwm[i][j] =
  1296. w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
  1297. data->sf2_temp[i][j] =
  1298. w83793_read_value(client,
  1299. W83793_REG_SF2_TEMP(i, j));
  1300. }
  1301. }
  1302. for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
  1303. data->temp_mode[i] =
  1304. w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
  1305. for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
  1306. data->tolerance[i] =
  1307. w83793_read_value(client, W83793_REG_TEMP_TOL(i));
  1308. }
  1309. for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
  1310. if (!(data->has_pwm & (1 << i)))
  1311. continue;
  1312. data->pwm[i][PWM_NONSTOP] =
  1313. w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
  1314. data->pwm[i][PWM_START] =
  1315. w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
  1316. data->pwm_stop_time[i] =
  1317. w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
  1318. }
  1319. data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
  1320. data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
  1321. data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
  1322. data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
  1323. data->temp_critical =
  1324. w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
  1325. data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
  1326. for (i = 0; i < ARRAY_SIZE(data->beeps); i++) {
  1327. data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
  1328. }
  1329. data->last_nonvolatile = jiffies;
  1330. }
  1331. static struct w83793_data *w83793_update_device(struct device *dev)
  1332. {
  1333. struct i2c_client *client = to_i2c_client(dev);
  1334. struct w83793_data *data = i2c_get_clientdata(client);
  1335. int i;
  1336. mutex_lock(&data->update_lock);
  1337. if (!(time_after(jiffies, data->last_updated + HZ * 2)
  1338. || !data->valid))
  1339. goto END;
  1340. /* Update the voltages measured value and limits */
  1341. for (i = 0; i < ARRAY_SIZE(data->in); i++)
  1342. data->in[i][IN_READ] =
  1343. w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
  1344. data->in_low_bits[IN_READ] =
  1345. w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
  1346. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  1347. if (!(data->has_fan & (1 << i))) {
  1348. continue;
  1349. }
  1350. data->fan[i] =
  1351. w83793_read_value(client, W83793_REG_FAN(i)) << 8;
  1352. data->fan[i] |=
  1353. w83793_read_value(client, W83793_REG_FAN(i) + 1);
  1354. }
  1355. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  1356. if (!(data->has_temp & (1 << i)))
  1357. continue;
  1358. data->temp[i][TEMP_READ] =
  1359. w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
  1360. }
  1361. data->temp_low_bits =
  1362. w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
  1363. for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
  1364. if (data->has_pwm & (1 << i))
  1365. data->pwm[i][PWM_DUTY] =
  1366. w83793_read_value(client,
  1367. W83793_REG_PWM(i, PWM_DUTY));
  1368. }
  1369. for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
  1370. data->alarms[i] =
  1371. w83793_read_value(client, W83793_REG_ALARM(i));
  1372. if (data->has_vid & 0x01)
  1373. data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
  1374. if (data->has_vid & 0x02)
  1375. data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
  1376. w83793_update_nonvolatile(dev);
  1377. data->last_updated = jiffies;
  1378. data->valid = 1;
  1379. END:
  1380. mutex_unlock(&data->update_lock);
  1381. return data;
  1382. }
  1383. /* Ignore the possibility that somebody change bank outside the driver
  1384. Must be called with data->update_lock held, except during initialization */
  1385. static u8 w83793_read_value(struct i2c_client *client, u16 reg)
  1386. {
  1387. struct w83793_data *data = i2c_get_clientdata(client);
  1388. u8 res = 0xff;
  1389. u8 new_bank = reg >> 8;
  1390. new_bank |= data->bank & 0xfc;
  1391. if (data->bank != new_bank) {
  1392. if (i2c_smbus_write_byte_data
  1393. (client, W83793_REG_BANKSEL, new_bank) >= 0)
  1394. data->bank = new_bank;
  1395. else {
  1396. dev_err(&client->dev,
  1397. "set bank to %d failed, fall back "
  1398. "to bank %d, read reg 0x%x error\n",
  1399. new_bank, data->bank, reg);
  1400. res = 0x0; /* read 0x0 from the chip */
  1401. goto END;
  1402. }
  1403. }
  1404. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1405. END:
  1406. return res;
  1407. }
  1408. /* Must be called with data->update_lock held, except during initialization */
  1409. static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
  1410. {
  1411. struct w83793_data *data = i2c_get_clientdata(client);
  1412. int res;
  1413. u8 new_bank = reg >> 8;
  1414. new_bank |= data->bank & 0xfc;
  1415. if (data->bank != new_bank) {
  1416. if ((res = i2c_smbus_write_byte_data
  1417. (client, W83793_REG_BANKSEL, new_bank)) >= 0)
  1418. data->bank = new_bank;
  1419. else {
  1420. dev_err(&client->dev,
  1421. "set bank to %d failed, fall back "
  1422. "to bank %d, write reg 0x%x error\n",
  1423. new_bank, data->bank, reg);
  1424. goto END;
  1425. }
  1426. }
  1427. res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
  1428. END:
  1429. return res;
  1430. }
  1431. static int __init sensors_w83793_init(void)
  1432. {
  1433. return i2c_add_driver(&w83793_driver);
  1434. }
  1435. static void __exit sensors_w83793_exit(void)
  1436. {
  1437. i2c_del_driver(&w83793_driver);
  1438. }
  1439. MODULE_AUTHOR("Yuan Mu");
  1440. MODULE_DESCRIPTION("w83793 driver");
  1441. MODULE_LICENSE("GPL");
  1442. module_init(sensors_w83793_init);
  1443. module_exit(sensors_w83793_exit);