pcbios.c 10.0 KB

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  1. /*
  2. * BIOS32 and PCI BIOS handling.
  3. */
  4. #include <linux/pci.h>
  5. #include <linux/init.h>
  6. #include <linux/module.h>
  7. #include <linux/uaccess.h>
  8. #include <asm/pci_x86.h>
  9. #include <asm/pci-functions.h>
  10. /* BIOS32 signature: "_32_" */
  11. #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
  12. /* PCI signature: "PCI " */
  13. #define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
  14. /* PCI service signature: "$PCI" */
  15. #define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
  16. /* PCI BIOS hardware mechanism flags */
  17. #define PCIBIOS_HW_TYPE1 0x01
  18. #define PCIBIOS_HW_TYPE2 0x02
  19. #define PCIBIOS_HW_TYPE1_SPEC 0x10
  20. #define PCIBIOS_HW_TYPE2_SPEC 0x20
  21. /*
  22. * This is the standard structure used to identify the entry point
  23. * to the BIOS32 Service Directory, as documented in
  24. * Standard BIOS 32-bit Service Directory Proposal
  25. * Revision 0.4 May 24, 1993
  26. * Phoenix Technologies Ltd.
  27. * Norwood, MA
  28. * and the PCI BIOS specification.
  29. */
  30. union bios32 {
  31. struct {
  32. unsigned long signature; /* _32_ */
  33. unsigned long entry; /* 32 bit physical address */
  34. unsigned char revision; /* Revision level, 0 */
  35. unsigned char length; /* Length in paragraphs should be 01 */
  36. unsigned char checksum; /* All bytes must add up to zero */
  37. unsigned char reserved[5]; /* Must be zero */
  38. } fields;
  39. char chars[16];
  40. };
  41. /*
  42. * Physical address of the service directory. I don't know if we're
  43. * allowed to have more than one of these or not, so just in case
  44. * we'll make pcibios_present() take a memory start parameter and store
  45. * the array there.
  46. */
  47. static struct {
  48. unsigned long address;
  49. unsigned short segment;
  50. } bios32_indirect = { 0, __KERNEL_CS };
  51. /*
  52. * Returns the entry point for the given service, NULL on error
  53. */
  54. static unsigned long bios32_service(unsigned long service)
  55. {
  56. unsigned char return_code; /* %al */
  57. unsigned long address; /* %ebx */
  58. unsigned long length; /* %ecx */
  59. unsigned long entry; /* %edx */
  60. unsigned long flags;
  61. local_irq_save(flags);
  62. __asm__("lcall *(%%edi); cld"
  63. : "=a" (return_code),
  64. "=b" (address),
  65. "=c" (length),
  66. "=d" (entry)
  67. : "0" (service),
  68. "1" (0),
  69. "D" (&bios32_indirect));
  70. local_irq_restore(flags);
  71. switch (return_code) {
  72. case 0:
  73. return address + entry;
  74. case 0x80: /* Not present */
  75. printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
  76. return 0;
  77. default: /* Shouldn't happen */
  78. printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
  79. service, return_code);
  80. return 0;
  81. }
  82. }
  83. static struct {
  84. unsigned long address;
  85. unsigned short segment;
  86. } pci_indirect = { 0, __KERNEL_CS };
  87. static int pci_bios_present;
  88. static int __devinit check_pcibios(void)
  89. {
  90. u32 signature, eax, ebx, ecx;
  91. u8 status, major_ver, minor_ver, hw_mech;
  92. unsigned long flags, pcibios_entry;
  93. if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
  94. pci_indirect.address = pcibios_entry + PAGE_OFFSET;
  95. local_irq_save(flags);
  96. __asm__(
  97. "lcall *(%%edi); cld\n\t"
  98. "jc 1f\n\t"
  99. "xor %%ah, %%ah\n"
  100. "1:"
  101. : "=d" (signature),
  102. "=a" (eax),
  103. "=b" (ebx),
  104. "=c" (ecx)
  105. : "1" (PCIBIOS_PCI_BIOS_PRESENT),
  106. "D" (&pci_indirect)
  107. : "memory");
  108. local_irq_restore(flags);
  109. status = (eax >> 8) & 0xff;
  110. hw_mech = eax & 0xff;
  111. major_ver = (ebx >> 8) & 0xff;
  112. minor_ver = ebx & 0xff;
  113. if (pcibios_last_bus < 0)
  114. pcibios_last_bus = ecx & 0xff;
  115. DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
  116. status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
  117. if (status || signature != PCI_SIGNATURE) {
  118. printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
  119. status, signature);
  120. return 0;
  121. }
  122. printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
  123. major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
  124. #ifdef CONFIG_PCI_DIRECT
  125. if (!(hw_mech & PCIBIOS_HW_TYPE1))
  126. pci_probe &= ~PCI_PROBE_CONF1;
  127. if (!(hw_mech & PCIBIOS_HW_TYPE2))
  128. pci_probe &= ~PCI_PROBE_CONF2;
  129. #endif
  130. return 1;
  131. }
  132. return 0;
  133. }
  134. static int pci_bios_read(unsigned int seg, unsigned int bus,
  135. unsigned int devfn, int reg, int len, u32 *value)
  136. {
  137. unsigned long result = 0;
  138. unsigned long flags;
  139. unsigned long bx = (bus << 8) | devfn;
  140. if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
  141. return -EINVAL;
  142. spin_lock_irqsave(&pci_config_lock, flags);
  143. switch (len) {
  144. case 1:
  145. __asm__("lcall *(%%esi); cld\n\t"
  146. "jc 1f\n\t"
  147. "xor %%ah, %%ah\n"
  148. "1:"
  149. : "=c" (*value),
  150. "=a" (result)
  151. : "1" (PCIBIOS_READ_CONFIG_BYTE),
  152. "b" (bx),
  153. "D" ((long)reg),
  154. "S" (&pci_indirect));
  155. /*
  156. * Zero-extend the result beyond 8 bits, do not trust the
  157. * BIOS having done it:
  158. */
  159. *value &= 0xff;
  160. break;
  161. case 2:
  162. __asm__("lcall *(%%esi); cld\n\t"
  163. "jc 1f\n\t"
  164. "xor %%ah, %%ah\n"
  165. "1:"
  166. : "=c" (*value),
  167. "=a" (result)
  168. : "1" (PCIBIOS_READ_CONFIG_WORD),
  169. "b" (bx),
  170. "D" ((long)reg),
  171. "S" (&pci_indirect));
  172. /*
  173. * Zero-extend the result beyond 16 bits, do not trust the
  174. * BIOS having done it:
  175. */
  176. *value &= 0xffff;
  177. break;
  178. case 4:
  179. __asm__("lcall *(%%esi); cld\n\t"
  180. "jc 1f\n\t"
  181. "xor %%ah, %%ah\n"
  182. "1:"
  183. : "=c" (*value),
  184. "=a" (result)
  185. : "1" (PCIBIOS_READ_CONFIG_DWORD),
  186. "b" (bx),
  187. "D" ((long)reg),
  188. "S" (&pci_indirect));
  189. break;
  190. }
  191. spin_unlock_irqrestore(&pci_config_lock, flags);
  192. return (int)((result & 0xff00) >> 8);
  193. }
  194. static int pci_bios_write(unsigned int seg, unsigned int bus,
  195. unsigned int devfn, int reg, int len, u32 value)
  196. {
  197. unsigned long result = 0;
  198. unsigned long flags;
  199. unsigned long bx = (bus << 8) | devfn;
  200. if ((bus > 255) || (devfn > 255) || (reg > 255))
  201. return -EINVAL;
  202. spin_lock_irqsave(&pci_config_lock, flags);
  203. switch (len) {
  204. case 1:
  205. __asm__("lcall *(%%esi); cld\n\t"
  206. "jc 1f\n\t"
  207. "xor %%ah, %%ah\n"
  208. "1:"
  209. : "=a" (result)
  210. : "0" (PCIBIOS_WRITE_CONFIG_BYTE),
  211. "c" (value),
  212. "b" (bx),
  213. "D" ((long)reg),
  214. "S" (&pci_indirect));
  215. break;
  216. case 2:
  217. __asm__("lcall *(%%esi); cld\n\t"
  218. "jc 1f\n\t"
  219. "xor %%ah, %%ah\n"
  220. "1:"
  221. : "=a" (result)
  222. : "0" (PCIBIOS_WRITE_CONFIG_WORD),
  223. "c" (value),
  224. "b" (bx),
  225. "D" ((long)reg),
  226. "S" (&pci_indirect));
  227. break;
  228. case 4:
  229. __asm__("lcall *(%%esi); cld\n\t"
  230. "jc 1f\n\t"
  231. "xor %%ah, %%ah\n"
  232. "1:"
  233. : "=a" (result)
  234. : "0" (PCIBIOS_WRITE_CONFIG_DWORD),
  235. "c" (value),
  236. "b" (bx),
  237. "D" ((long)reg),
  238. "S" (&pci_indirect));
  239. break;
  240. }
  241. spin_unlock_irqrestore(&pci_config_lock, flags);
  242. return (int)((result & 0xff00) >> 8);
  243. }
  244. /*
  245. * Function table for BIOS32 access
  246. */
  247. static struct pci_raw_ops pci_bios_access = {
  248. .read = pci_bios_read,
  249. .write = pci_bios_write
  250. };
  251. /*
  252. * Try to find PCI BIOS.
  253. */
  254. static struct pci_raw_ops * __devinit pci_find_bios(void)
  255. {
  256. union bios32 *check;
  257. unsigned char sum;
  258. int i, length;
  259. /*
  260. * Follow the standard procedure for locating the BIOS32 Service
  261. * directory by scanning the permissible address range from
  262. * 0xe0000 through 0xfffff for a valid BIOS32 structure.
  263. */
  264. for (check = (union bios32 *) __va(0xe0000);
  265. check <= (union bios32 *) __va(0xffff0);
  266. ++check) {
  267. long sig;
  268. if (probe_kernel_address(&check->fields.signature, sig))
  269. continue;
  270. if (check->fields.signature != BIOS32_SIGNATURE)
  271. continue;
  272. length = check->fields.length * 16;
  273. if (!length)
  274. continue;
  275. sum = 0;
  276. for (i = 0; i < length ; ++i)
  277. sum += check->chars[i];
  278. if (sum != 0)
  279. continue;
  280. if (check->fields.revision != 0) {
  281. printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
  282. check->fields.revision, check);
  283. continue;
  284. }
  285. DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
  286. if (check->fields.entry >= 0x100000) {
  287. printk("PCI: BIOS32 entry (0x%p) in high memory, "
  288. "cannot use.\n", check);
  289. return NULL;
  290. } else {
  291. unsigned long bios32_entry = check->fields.entry;
  292. DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
  293. bios32_entry);
  294. bios32_indirect.address = bios32_entry + PAGE_OFFSET;
  295. if (check_pcibios())
  296. return &pci_bios_access;
  297. }
  298. break; /* Hopefully more than one BIOS32 cannot happen... */
  299. }
  300. return NULL;
  301. }
  302. /*
  303. * BIOS Functions for IRQ Routing
  304. */
  305. struct irq_routing_options {
  306. u16 size;
  307. struct irq_info *table;
  308. u16 segment;
  309. } __attribute__((packed));
  310. struct irq_routing_table * pcibios_get_irq_routing_table(void)
  311. {
  312. struct irq_routing_options opt;
  313. struct irq_routing_table *rt = NULL;
  314. int ret, map;
  315. unsigned long page;
  316. if (!pci_bios_present)
  317. return NULL;
  318. page = __get_free_page(GFP_KERNEL);
  319. if (!page)
  320. return NULL;
  321. opt.table = (struct irq_info *) page;
  322. opt.size = PAGE_SIZE;
  323. opt.segment = __KERNEL_DS;
  324. DBG("PCI: Fetching IRQ routing table... ");
  325. __asm__("push %%es\n\t"
  326. "push %%ds\n\t"
  327. "pop %%es\n\t"
  328. "lcall *(%%esi); cld\n\t"
  329. "pop %%es\n\t"
  330. "jc 1f\n\t"
  331. "xor %%ah, %%ah\n"
  332. "1:"
  333. : "=a" (ret),
  334. "=b" (map),
  335. "=m" (opt)
  336. : "0" (PCIBIOS_GET_ROUTING_OPTIONS),
  337. "1" (0),
  338. "D" ((long) &opt),
  339. "S" (&pci_indirect),
  340. "m" (opt)
  341. : "memory");
  342. DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map);
  343. if (ret & 0xff00)
  344. printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
  345. else if (opt.size) {
  346. rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
  347. if (rt) {
  348. memset(rt, 0, sizeof(struct irq_routing_table));
  349. rt->size = opt.size + sizeof(struct irq_routing_table);
  350. rt->exclusive_irqs = map;
  351. memcpy(rt->slots, (void *) page, opt.size);
  352. printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
  353. }
  354. }
  355. free_page(page);
  356. return rt;
  357. }
  358. EXPORT_SYMBOL(pcibios_get_irq_routing_table);
  359. int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
  360. {
  361. int ret;
  362. __asm__("lcall *(%%esi); cld\n\t"
  363. "jc 1f\n\t"
  364. "xor %%ah, %%ah\n"
  365. "1:"
  366. : "=a" (ret)
  367. : "0" (PCIBIOS_SET_PCI_HW_INT),
  368. "b" ((dev->bus->number << 8) | dev->devfn),
  369. "c" ((irq << 8) | (pin + 10)),
  370. "S" (&pci_indirect));
  371. return !(ret & 0xff00);
  372. }
  373. EXPORT_SYMBOL(pcibios_set_irq_routing);
  374. void __init pci_pcbios_init(void)
  375. {
  376. if ((pci_probe & PCI_PROBE_BIOS)
  377. && ((raw_pci_ops = pci_find_bios()))) {
  378. pci_bios_present = 1;
  379. }
  380. }