mce_32.c 1.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576
  1. /*
  2. * mce.c - x86 Machine Check Exception Reporting
  3. * (c) 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>, Dave Jones <davej@redhat.com>
  4. */
  5. #include <linux/init.h>
  6. #include <linux/types.h>
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/smp.h>
  10. #include <linux/thread_info.h>
  11. #include <asm/processor.h>
  12. #include <asm/system.h>
  13. #include <asm/mce.h>
  14. #include "mce.h"
  15. int mce_disabled;
  16. int nr_mce_banks;
  17. EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
  18. /* Handle unconfigured int18 (should never happen) */
  19. static void unexpected_machine_check(struct pt_regs *regs, long error_code)
  20. {
  21. printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id());
  22. }
  23. /* Call the installed machine check handler for this CPU setup. */
  24. void (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
  25. /* This has to be run for each processor */
  26. void mcheck_init(struct cpuinfo_x86 *c)
  27. {
  28. if (mce_disabled == 1)
  29. return;
  30. switch (c->x86_vendor) {
  31. case X86_VENDOR_AMD:
  32. amd_mcheck_init(c);
  33. break;
  34. case X86_VENDOR_INTEL:
  35. if (c->x86 == 5)
  36. intel_p5_mcheck_init(c);
  37. if (c->x86 == 6)
  38. intel_p6_mcheck_init(c);
  39. if (c->x86 == 15)
  40. intel_p4_mcheck_init(c);
  41. break;
  42. case X86_VENDOR_CENTAUR:
  43. if (c->x86 == 5)
  44. winchip_mcheck_init(c);
  45. break;
  46. default:
  47. break;
  48. }
  49. }
  50. static int __init mcheck_disable(char *str)
  51. {
  52. mce_disabled = 1;
  53. return 1;
  54. }
  55. static int __init mcheck_enable(char *str)
  56. {
  57. mce_disabled = -1;
  58. return 1;
  59. }
  60. __setup("nomce", mcheck_disable);
  61. __setup("mce", mcheck_enable);