mpspec_def.h 4.0 KB

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  1. #ifndef _ASM_X86_MPSPEC_DEF_H
  2. #define _ASM_X86_MPSPEC_DEF_H
  3. /*
  4. * Structure definitions for SMP machines following the
  5. * Intel Multiprocessing Specification 1.1 and 1.4.
  6. */
  7. /*
  8. * This tag identifies where the SMP configuration
  9. * information is.
  10. */
  11. #define SMP_MAGIC_IDENT (('_'<<24) | ('P'<<16) | ('M'<<8) | '_')
  12. #ifdef CONFIG_X86_32
  13. # define MAX_MPC_ENTRY 1024
  14. # define MAX_APICS 256
  15. #else
  16. # if NR_CPUS <= 255
  17. # define MAX_APICS 255
  18. # else
  19. # define MAX_APICS 32768
  20. # endif
  21. #endif
  22. /* Intel MP Floating Pointer Structure */
  23. struct mpf_intel {
  24. char signature[4]; /* "_MP_" */
  25. unsigned int physptr; /* Configuration table address */
  26. unsigned char length; /* Our length (paragraphs) */
  27. unsigned char specification; /* Specification version */
  28. unsigned char checksum; /* Checksum (makes sum 0) */
  29. unsigned char feature1; /* Standard or configuration ? */
  30. unsigned char feature2; /* Bit7 set for IMCR|PIC */
  31. unsigned char feature3; /* Unused (0) */
  32. unsigned char feature4; /* Unused (0) */
  33. unsigned char feature5; /* Unused (0) */
  34. };
  35. #define MPC_SIGNATURE "PCMP"
  36. struct mpc_table {
  37. char signature[4];
  38. unsigned short length; /* Size of table */
  39. char spec; /* 0x01 */
  40. char checksum;
  41. char oem[8];
  42. char productid[12];
  43. unsigned int oemptr; /* 0 if not present */
  44. unsigned short oemsize; /* 0 if not present */
  45. unsigned short oemcount;
  46. unsigned int lapic; /* APIC address */
  47. unsigned int reserved;
  48. };
  49. /* Followed by entries */
  50. #define MP_PROCESSOR 0
  51. #define MP_BUS 1
  52. #define MP_IOAPIC 2
  53. #define MP_INTSRC 3
  54. #define MP_LINTSRC 4
  55. /* Used by IBM NUMA-Q to describe node locality */
  56. #define MP_TRANSLATION 192
  57. #define CPU_ENABLED 1 /* Processor is available */
  58. #define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
  59. #define CPU_STEPPING_MASK 0x000F
  60. #define CPU_MODEL_MASK 0x00F0
  61. #define CPU_FAMILY_MASK 0x0F00
  62. struct mpc_cpu {
  63. unsigned char type;
  64. unsigned char apicid; /* Local APIC number */
  65. unsigned char apicver; /* Its versions */
  66. unsigned char cpuflag;
  67. unsigned int cpufeature;
  68. unsigned int featureflag; /* CPUID feature value */
  69. unsigned int reserved[2];
  70. };
  71. struct mpc_bus {
  72. unsigned char type;
  73. unsigned char busid;
  74. unsigned char bustype[6];
  75. };
  76. /* List of Bus Type string values, Intel MP Spec. */
  77. #define BUSTYPE_EISA "EISA"
  78. #define BUSTYPE_ISA "ISA"
  79. #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
  80. #define BUSTYPE_MCA "MCA"
  81. #define BUSTYPE_VL "VL" /* Local bus */
  82. #define BUSTYPE_PCI "PCI"
  83. #define BUSTYPE_PCMCIA "PCMCIA"
  84. #define BUSTYPE_CBUS "CBUS"
  85. #define BUSTYPE_CBUSII "CBUSII"
  86. #define BUSTYPE_FUTURE "FUTURE"
  87. #define BUSTYPE_MBI "MBI"
  88. #define BUSTYPE_MBII "MBII"
  89. #define BUSTYPE_MPI "MPI"
  90. #define BUSTYPE_MPSA "MPSA"
  91. #define BUSTYPE_NUBUS "NUBUS"
  92. #define BUSTYPE_TC "TC"
  93. #define BUSTYPE_VME "VME"
  94. #define BUSTYPE_XPRESS "XPRESS"
  95. #define MPC_APIC_USABLE 0x01
  96. struct mpc_ioapic {
  97. unsigned char type;
  98. unsigned char apicid;
  99. unsigned char apicver;
  100. unsigned char flags;
  101. unsigned int apicaddr;
  102. };
  103. struct mpc_intsrc {
  104. unsigned char type;
  105. unsigned char irqtype;
  106. unsigned short irqflag;
  107. unsigned char srcbus;
  108. unsigned char srcbusirq;
  109. unsigned char dstapic;
  110. unsigned char dstirq;
  111. };
  112. enum mp_irq_source_types {
  113. mp_INT = 0,
  114. mp_NMI = 1,
  115. mp_SMI = 2,
  116. mp_ExtINT = 3
  117. };
  118. #define MP_IRQDIR_DEFAULT 0
  119. #define MP_IRQDIR_HIGH 1
  120. #define MP_IRQDIR_LOW 3
  121. #define MP_APIC_ALL 0xFF
  122. struct mpc_lintsrc {
  123. unsigned char type;
  124. unsigned char irqtype;
  125. unsigned short irqflag;
  126. unsigned char srcbusid;
  127. unsigned char srcbusirq;
  128. unsigned char destapic;
  129. unsigned char destapiclint;
  130. };
  131. #define MPC_OEM_SIGNATURE "_OEM"
  132. struct mpc_oemtable {
  133. char signature[4];
  134. unsigned short length; /* Size of table */
  135. char rev; /* 0x01 */
  136. char checksum;
  137. char mpc[8];
  138. };
  139. /*
  140. * Default configurations
  141. *
  142. * 1 2 CPU ISA 82489DX
  143. * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
  144. * 3 2 CPU EISA 82489DX
  145. * 4 2 CPU MCA 82489DX
  146. * 5 2 CPU ISA+PCI
  147. * 6 2 CPU EISA+PCI
  148. * 7 2 CPU MCA+PCI
  149. */
  150. enum mp_bustype {
  151. MP_BUS_ISA = 1,
  152. MP_BUS_EISA,
  153. MP_BUS_PCI,
  154. MP_BUS_MCA,
  155. };
  156. #endif /* _ASM_X86_MPSPEC_DEF_H */