intel_arch_perfmon.h 916 B

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  1. #ifndef _ASM_X86_INTEL_ARCH_PERFMON_H
  2. #define _ASM_X86_INTEL_ARCH_PERFMON_H
  3. #define MSR_ARCH_PERFMON_PERFCTR0 0xc1
  4. #define MSR_ARCH_PERFMON_PERFCTR1 0xc2
  5. #define MSR_ARCH_PERFMON_EVENTSEL0 0x186
  6. #define MSR_ARCH_PERFMON_EVENTSEL1 0x187
  7. #define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22)
  8. #define ARCH_PERFMON_EVENTSEL_INT (1 << 20)
  9. #define ARCH_PERFMON_EVENTSEL_OS (1 << 17)
  10. #define ARCH_PERFMON_EVENTSEL_USR (1 << 16)
  11. #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL (0x3c)
  12. #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
  13. #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX (0)
  14. #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \
  15. (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
  16. union cpuid10_eax {
  17. struct {
  18. unsigned int version_id:8;
  19. unsigned int num_counters:8;
  20. unsigned int bit_width:8;
  21. unsigned int mask_length:8;
  22. } split;
  23. unsigned int full;
  24. };
  25. #endif /* _ASM_X86_INTEL_ARCH_PERFMON_H */