gart.h 2.5 KB

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  1. #ifndef _ASM_X86_GART_H
  2. #define _ASM_X86_GART_H
  3. #include <asm/e820.h>
  4. extern void set_up_gart_resume(u32, u32);
  5. extern int fallback_aper_order;
  6. extern int fallback_aper_force;
  7. extern int fix_aperture;
  8. /* PTE bits. */
  9. #define GPTE_VALID 1
  10. #define GPTE_COHERENT 2
  11. /* Aperture control register bits. */
  12. #define GARTEN (1<<0)
  13. #define DISGARTCPU (1<<4)
  14. #define DISGARTIO (1<<5)
  15. /* GART cache control register bits. */
  16. #define INVGART (1<<0)
  17. #define GARTPTEERR (1<<1)
  18. /* K8 On-cpu GART registers */
  19. #define AMD64_GARTAPERTURECTL 0x90
  20. #define AMD64_GARTAPERTUREBASE 0x94
  21. #define AMD64_GARTTABLEBASE 0x98
  22. #define AMD64_GARTCACHECTL 0x9c
  23. #define AMD64_GARTEN (1<<0)
  24. #ifdef CONFIG_GART_IOMMU
  25. extern int gart_iommu_aperture;
  26. extern int gart_iommu_aperture_allowed;
  27. extern int gart_iommu_aperture_disabled;
  28. extern void early_gart_iommu_check(void);
  29. extern void gart_iommu_init(void);
  30. extern void gart_iommu_shutdown(void);
  31. extern void __init gart_parse_options(char *);
  32. extern void gart_iommu_hole_init(void);
  33. #else
  34. #define gart_iommu_aperture 0
  35. #define gart_iommu_aperture_allowed 0
  36. #define gart_iommu_aperture_disabled 1
  37. static inline void early_gart_iommu_check(void)
  38. {
  39. }
  40. static inline void gart_iommu_init(void)
  41. {
  42. }
  43. static inline void gart_iommu_shutdown(void)
  44. {
  45. }
  46. static inline void gart_parse_options(char *options)
  47. {
  48. }
  49. static inline void gart_iommu_hole_init(void)
  50. {
  51. }
  52. #endif
  53. extern int agp_amd64_init(void);
  54. static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
  55. {
  56. u32 tmp, ctl;
  57. /* address of the mappings table */
  58. addr >>= 12;
  59. tmp = (u32) addr<<4;
  60. tmp &= ~0xf;
  61. pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
  62. /* Enable GART translation for this hammer. */
  63. pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
  64. ctl |= GARTEN;
  65. ctl &= ~(DISGARTCPU | DISGARTIO);
  66. pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
  67. }
  68. static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
  69. {
  70. if (!aper_base)
  71. return 0;
  72. if (aper_base + aper_size > 0x100000000ULL) {
  73. printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
  74. return 0;
  75. }
  76. if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
  77. printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
  78. return 0;
  79. }
  80. if (aper_size < min_size) {
  81. printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
  82. aper_size>>20, min_size>>20);
  83. return 0;
  84. }
  85. return 1;
  86. }
  87. #endif /* _ASM_X86_GART_H */