ras.c 10 KB

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  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. /* Change Activity:
  19. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  20. * End Change Activity
  21. */
  22. #include <linux/errno.h>
  23. #include <linux/threads.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/signal.h>
  26. #include <linux/sched.h>
  27. #include <linux/ioport.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/timex.h>
  30. #include <linux/init.h>
  31. #include <linux/slab.h>
  32. #include <linux/delay.h>
  33. #include <linux/irq.h>
  34. #include <linux/random.h>
  35. #include <linux/sysrq.h>
  36. #include <linux/bitops.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/system.h>
  39. #include <asm/io.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/irq.h>
  42. #include <asm/cache.h>
  43. #include <asm/prom.h>
  44. #include <asm/ptrace.h>
  45. #include <asm/machdep.h>
  46. #include <asm/rtas.h>
  47. #include <asm/udbg.h>
  48. #include <asm/firmware.h>
  49. #include "pseries.h"
  50. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  51. static DEFINE_SPINLOCK(ras_log_buf_lock);
  52. static char mce_data_buf[RTAS_ERROR_LOG_MAX];
  53. static int ras_get_sensor_state_token;
  54. static int ras_check_exception_token;
  55. #define EPOW_SENSOR_TOKEN 9
  56. #define EPOW_SENSOR_INDEX 0
  57. #define RAS_VECTOR_OFFSET 0x500
  58. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id);
  59. static irqreturn_t ras_error_interrupt(int irq, void *dev_id);
  60. static void request_ras_irqs(struct device_node *np,
  61. irq_handler_t handler,
  62. const char *name)
  63. {
  64. int i, index, count = 0;
  65. struct of_irq oirq;
  66. const u32 *opicprop;
  67. unsigned int opicplen;
  68. unsigned int virqs[16];
  69. /* Check for obsolete "open-pic-interrupt" property. If present, then
  70. * map those interrupts using the default interrupt host and default
  71. * trigger
  72. */
  73. opicprop = of_get_property(np, "open-pic-interrupt", &opicplen);
  74. if (opicprop) {
  75. opicplen /= sizeof(u32);
  76. for (i = 0; i < opicplen; i++) {
  77. if (count > 15)
  78. break;
  79. virqs[count] = irq_create_mapping(NULL, *(opicprop++));
  80. if (virqs[count] == NO_IRQ)
  81. printk(KERN_ERR "Unable to allocate interrupt "
  82. "number for %s\n", np->full_name);
  83. else
  84. count++;
  85. }
  86. }
  87. /* Else use normal interrupt tree parsing */
  88. else {
  89. /* First try to do a proper OF tree parsing */
  90. for (index = 0; of_irq_map_one(np, index, &oirq) == 0;
  91. index++) {
  92. if (count > 15)
  93. break;
  94. virqs[count] = irq_create_of_mapping(oirq.controller,
  95. oirq.specifier,
  96. oirq.size);
  97. if (virqs[count] == NO_IRQ)
  98. printk(KERN_ERR "Unable to allocate interrupt "
  99. "number for %s\n", np->full_name);
  100. else
  101. count++;
  102. }
  103. }
  104. /* Now request them */
  105. for (i = 0; i < count; i++) {
  106. if (request_irq(virqs[i], handler, 0, name, NULL)) {
  107. printk(KERN_ERR "Unable to request interrupt %d for "
  108. "%s\n", virqs[i], np->full_name);
  109. return;
  110. }
  111. }
  112. }
  113. /*
  114. * Initialize handlers for the set of interrupts caused by hardware errors
  115. * and power system events.
  116. */
  117. static int __init init_ras_IRQ(void)
  118. {
  119. struct device_node *np;
  120. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  121. ras_check_exception_token = rtas_token("check-exception");
  122. /* Internal Errors */
  123. np = of_find_node_by_path("/event-sources/internal-errors");
  124. if (np != NULL) {
  125. request_ras_irqs(np, ras_error_interrupt, "RAS_ERROR");
  126. of_node_put(np);
  127. }
  128. /* EPOW Events */
  129. np = of_find_node_by_path("/event-sources/epow-events");
  130. if (np != NULL) {
  131. request_ras_irqs(np, ras_epow_interrupt, "RAS_EPOW");
  132. of_node_put(np);
  133. }
  134. return 0;
  135. }
  136. __initcall(init_ras_IRQ);
  137. /*
  138. * Handle power subsystem events (EPOW).
  139. *
  140. * Presently we just log the event has occurred. This should be fixed
  141. * to examine the type of power failure and take appropriate action where
  142. * the time horizon permits something useful to be done.
  143. */
  144. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id)
  145. {
  146. int status = 0xdeadbeef;
  147. int state = 0;
  148. int critical;
  149. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  150. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  151. if (state > 3)
  152. critical = 1; /* Time Critical */
  153. else
  154. critical = 0;
  155. spin_lock(&ras_log_buf_lock);
  156. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  157. RAS_VECTOR_OFFSET,
  158. irq_map[irq].hwirq,
  159. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  160. critical, __pa(&ras_log_buf),
  161. rtas_get_error_log_max());
  162. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  163. *((unsigned long *)&ras_log_buf), status, state);
  164. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  165. *((unsigned long *)&ras_log_buf), status, state);
  166. /* format and print the extended information */
  167. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  168. spin_unlock(&ras_log_buf_lock);
  169. return IRQ_HANDLED;
  170. }
  171. /*
  172. * Handle hardware error interrupts.
  173. *
  174. * RTAS check-exception is called to collect data on the exception. If
  175. * the error is deemed recoverable, we log a warning and return.
  176. * For nonrecoverable errors, an error is logged and we stop all processing
  177. * as quickly as possible in order to prevent propagation of the failure.
  178. */
  179. static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
  180. {
  181. struct rtas_error_log *rtas_elog;
  182. int status = 0xdeadbeef;
  183. int fatal;
  184. spin_lock(&ras_log_buf_lock);
  185. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  186. RAS_VECTOR_OFFSET,
  187. irq_map[irq].hwirq,
  188. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  189. __pa(&ras_log_buf),
  190. rtas_get_error_log_max());
  191. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  192. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  193. fatal = 1;
  194. else
  195. fatal = 0;
  196. /* format and print the extended information */
  197. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  198. if (fatal) {
  199. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  200. *((unsigned long *)&ras_log_buf), status);
  201. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  202. *((unsigned long *)&ras_log_buf), status);
  203. #ifndef DEBUG_RTAS_POWER_OFF
  204. /* Don't actually power off when debugging so we can test
  205. * without actually failing while injecting errors.
  206. * Error data will not be logged to syslog.
  207. */
  208. ppc_md.power_off();
  209. #endif
  210. } else {
  211. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  212. *((unsigned long *)&ras_log_buf), status);
  213. printk(KERN_WARNING
  214. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  215. *((unsigned long *)&ras_log_buf), status);
  216. }
  217. spin_unlock(&ras_log_buf_lock);
  218. return IRQ_HANDLED;
  219. }
  220. /* Get the error information for errors coming through the
  221. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  222. * the actual r3 if possible, and a ptr to the error log entry
  223. * will be returned if found.
  224. *
  225. * The mce_data_buf does not have any locks or protection around it,
  226. * if a second machine check comes in, or a system reset is done
  227. * before we have logged the error, then we will get corruption in the
  228. * error log. This is preferable over holding off on calling
  229. * ibm,nmi-interlock which would result in us checkstopping if a
  230. * second machine check did come in.
  231. */
  232. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  233. {
  234. unsigned long errdata = regs->gpr[3];
  235. struct rtas_error_log *errhdr = NULL;
  236. unsigned long *savep;
  237. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  238. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  239. savep = __va(errdata);
  240. regs->gpr[3] = savep[0]; /* restore original r3 */
  241. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  242. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  243. errhdr = (struct rtas_error_log *)mce_data_buf;
  244. } else {
  245. printk("FWNMI: corrupt r3\n");
  246. }
  247. return errhdr;
  248. }
  249. /* Call this when done with the data returned by FWNMI_get_errinfo.
  250. * It will release the saved data area for other CPUs in the
  251. * partition to receive FWNMI errors.
  252. */
  253. static void fwnmi_release_errinfo(void)
  254. {
  255. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  256. if (ret != 0)
  257. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  258. }
  259. int pSeries_system_reset_exception(struct pt_regs *regs)
  260. {
  261. if (fwnmi_active) {
  262. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  263. if (errhdr) {
  264. /* XXX Should look at FWNMI information */
  265. }
  266. fwnmi_release_errinfo();
  267. }
  268. return 0; /* need to perform reset */
  269. }
  270. /*
  271. * See if we can recover from a machine check exception.
  272. * This is only called on power4 (or above) and only via
  273. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  274. * which provides the error analysis for us.
  275. *
  276. * Return 1 if corrected (or delivered a signal).
  277. * Return 0 if there is nothing we can do.
  278. */
  279. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  280. {
  281. int nonfatal = 0;
  282. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  283. /* Platform corrected itself */
  284. nonfatal = 1;
  285. } else if ((regs->msr & MSR_RI) &&
  286. user_mode(regs) &&
  287. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  288. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  289. err->target == RTAS_TARGET_MEMORY &&
  290. err->type == RTAS_TYPE_ECC_UNCORR &&
  291. !(current->pid == 0 || is_global_init(current))) {
  292. /* Kill off a user process with an ECC error */
  293. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  294. current->pid);
  295. /* XXX something better for ECC error? */
  296. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  297. nonfatal = 1;
  298. }
  299. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  300. return nonfatal;
  301. }
  302. /*
  303. * Handle a machine check.
  304. *
  305. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  306. * should be present. If so the handler which called us tells us if the
  307. * error was recovered (never true if RI=0).
  308. *
  309. * On hardware prior to Power 4 these exceptions were asynchronous which
  310. * means we can't tell exactly where it occurred and so we can't recover.
  311. */
  312. int pSeries_machine_check_exception(struct pt_regs *regs)
  313. {
  314. struct rtas_error_log *errp;
  315. if (fwnmi_active) {
  316. errp = fwnmi_get_errinfo(regs);
  317. fwnmi_release_errinfo();
  318. if (errp && recover_mce(regs, errp))
  319. return 1;
  320. }
  321. return 0;
  322. }