eeh_cache.c 8.6 KB

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  1. /*
  2. * eeh_cache.c
  3. * PCI address cache; allows the lookup of PCI devices based on I/O address
  4. *
  5. * Copyright IBM Corporation 2004
  6. * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/list.h>
  23. #include <linux/pci.h>
  24. #include <linux/rbtree.h>
  25. #include <linux/spinlock.h>
  26. #include <asm/atomic.h>
  27. #include <asm/pci-bridge.h>
  28. #include <asm/ppc-pci.h>
  29. /**
  30. * The pci address cache subsystem. This subsystem places
  31. * PCI device address resources into a red-black tree, sorted
  32. * according to the address range, so that given only an i/o
  33. * address, the corresponding PCI device can be **quickly**
  34. * found. It is safe to perform an address lookup in an interrupt
  35. * context; this ability is an important feature.
  36. *
  37. * Currently, the only customer of this code is the EEH subsystem;
  38. * thus, this code has been somewhat tailored to suit EEH better.
  39. * In particular, the cache does *not* hold the addresses of devices
  40. * for which EEH is not enabled.
  41. *
  42. * (Implementation Note: The RB tree seems to be better/faster
  43. * than any hash algo I could think of for this problem, even
  44. * with the penalty of slow pointer chases for d-cache misses).
  45. */
  46. struct pci_io_addr_range
  47. {
  48. struct rb_node rb_node;
  49. unsigned long addr_lo;
  50. unsigned long addr_hi;
  51. struct pci_dev *pcidev;
  52. unsigned int flags;
  53. };
  54. static struct pci_io_addr_cache
  55. {
  56. struct rb_root rb_root;
  57. spinlock_t piar_lock;
  58. } pci_io_addr_cache_root;
  59. static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
  60. {
  61. struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
  62. while (n) {
  63. struct pci_io_addr_range *piar;
  64. piar = rb_entry(n, struct pci_io_addr_range, rb_node);
  65. if (addr < piar->addr_lo) {
  66. n = n->rb_left;
  67. } else {
  68. if (addr > piar->addr_hi) {
  69. n = n->rb_right;
  70. } else {
  71. pci_dev_get(piar->pcidev);
  72. return piar->pcidev;
  73. }
  74. }
  75. }
  76. return NULL;
  77. }
  78. /**
  79. * pci_get_device_by_addr - Get device, given only address
  80. * @addr: mmio (PIO) phys address or i/o port number
  81. *
  82. * Given an mmio phys address, or a port number, find a pci device
  83. * that implements this address. Be sure to pci_dev_put the device
  84. * when finished. I/O port numbers are assumed to be offset
  85. * from zero (that is, they do *not* have pci_io_addr added in).
  86. * It is safe to call this function within an interrupt.
  87. */
  88. struct pci_dev *pci_get_device_by_addr(unsigned long addr)
  89. {
  90. struct pci_dev *dev;
  91. unsigned long flags;
  92. spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
  93. dev = __pci_get_device_by_addr(addr);
  94. spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
  95. return dev;
  96. }
  97. #ifdef DEBUG
  98. /*
  99. * Handy-dandy debug print routine, does nothing more
  100. * than print out the contents of our addr cache.
  101. */
  102. static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
  103. {
  104. struct rb_node *n;
  105. int cnt = 0;
  106. n = rb_first(&cache->rb_root);
  107. while (n) {
  108. struct pci_io_addr_range *piar;
  109. piar = rb_entry(n, struct pci_io_addr_range, rb_node);
  110. printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
  111. (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
  112. piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
  113. cnt++;
  114. n = rb_next(n);
  115. }
  116. }
  117. #endif
  118. /* Insert address range into the rb tree. */
  119. static struct pci_io_addr_range *
  120. pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
  121. unsigned long ahi, unsigned int flags)
  122. {
  123. struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
  124. struct rb_node *parent = NULL;
  125. struct pci_io_addr_range *piar;
  126. /* Walk tree, find a place to insert into tree */
  127. while (*p) {
  128. parent = *p;
  129. piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
  130. if (ahi < piar->addr_lo) {
  131. p = &parent->rb_left;
  132. } else if (alo > piar->addr_hi) {
  133. p = &parent->rb_right;
  134. } else {
  135. if (dev != piar->pcidev ||
  136. alo != piar->addr_lo || ahi != piar->addr_hi) {
  137. printk(KERN_WARNING "PIAR: overlapping address range\n");
  138. }
  139. return piar;
  140. }
  141. }
  142. piar = kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
  143. if (!piar)
  144. return NULL;
  145. pci_dev_get(dev);
  146. piar->addr_lo = alo;
  147. piar->addr_hi = ahi;
  148. piar->pcidev = dev;
  149. piar->flags = flags;
  150. #ifdef DEBUG
  151. printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
  152. alo, ahi, pci_name (dev));
  153. #endif
  154. rb_link_node(&piar->rb_node, parent, p);
  155. rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
  156. return piar;
  157. }
  158. static void __pci_addr_cache_insert_device(struct pci_dev *dev)
  159. {
  160. struct device_node *dn;
  161. struct pci_dn *pdn;
  162. int i;
  163. dn = pci_device_to_OF_node(dev);
  164. if (!dn) {
  165. printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
  166. return;
  167. }
  168. /* Skip any devices for which EEH is not enabled. */
  169. pdn = PCI_DN(dn);
  170. if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
  171. pdn->eeh_mode & EEH_MODE_NOCHECK) {
  172. #ifdef DEBUG
  173. printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
  174. pci_name(dev), pdn->node->full_name);
  175. #endif
  176. return;
  177. }
  178. /* Walk resources on this device, poke them into the tree */
  179. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  180. unsigned long start = pci_resource_start(dev,i);
  181. unsigned long end = pci_resource_end(dev,i);
  182. unsigned int flags = pci_resource_flags(dev,i);
  183. /* We are interested only bus addresses, not dma or other stuff */
  184. if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
  185. continue;
  186. if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
  187. continue;
  188. pci_addr_cache_insert(dev, start, end, flags);
  189. }
  190. }
  191. /**
  192. * pci_addr_cache_insert_device - Add a device to the address cache
  193. * @dev: PCI device whose I/O addresses we are interested in.
  194. *
  195. * In order to support the fast lookup of devices based on addresses,
  196. * we maintain a cache of devices that can be quickly searched.
  197. * This routine adds a device to that cache.
  198. */
  199. void pci_addr_cache_insert_device(struct pci_dev *dev)
  200. {
  201. unsigned long flags;
  202. /* Ignore PCI bridges */
  203. if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
  204. return;
  205. spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
  206. __pci_addr_cache_insert_device(dev);
  207. spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
  208. }
  209. static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
  210. {
  211. struct rb_node *n;
  212. restart:
  213. n = rb_first(&pci_io_addr_cache_root.rb_root);
  214. while (n) {
  215. struct pci_io_addr_range *piar;
  216. piar = rb_entry(n, struct pci_io_addr_range, rb_node);
  217. if (piar->pcidev == dev) {
  218. rb_erase(n, &pci_io_addr_cache_root.rb_root);
  219. pci_dev_put(piar->pcidev);
  220. kfree(piar);
  221. goto restart;
  222. }
  223. n = rb_next(n);
  224. }
  225. }
  226. /**
  227. * pci_addr_cache_remove_device - remove pci device from addr cache
  228. * @dev: device to remove
  229. *
  230. * Remove a device from the addr-cache tree.
  231. * This is potentially expensive, since it will walk
  232. * the tree multiple times (once per resource).
  233. * But so what; device removal doesn't need to be that fast.
  234. */
  235. void pci_addr_cache_remove_device(struct pci_dev *dev)
  236. {
  237. unsigned long flags;
  238. spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
  239. __pci_addr_cache_remove_device(dev);
  240. spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
  241. }
  242. /**
  243. * pci_addr_cache_build - Build a cache of I/O addresses
  244. *
  245. * Build a cache of pci i/o addresses. This cache will be used to
  246. * find the pci device that corresponds to a given address.
  247. * This routine scans all pci busses to build the cache.
  248. * Must be run late in boot process, after the pci controllers
  249. * have been scanned for devices (after all device resources are known).
  250. */
  251. void __init pci_addr_cache_build(void)
  252. {
  253. struct device_node *dn;
  254. struct pci_dev *dev = NULL;
  255. spin_lock_init(&pci_io_addr_cache_root.piar_lock);
  256. while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  257. pci_addr_cache_insert_device(dev);
  258. dn = pci_device_to_OF_node(dev);
  259. if (!dn)
  260. continue;
  261. pci_dev_get(dev); /* matching put is in eeh_remove_device() */
  262. PCI_DN(dn)->pcidev = dev;
  263. eeh_sysfs_add_device(dev);
  264. }
  265. #ifdef DEBUG
  266. /* Verify tree built up above, echo back the list of addrs. */
  267. pci_addr_cache_print(&pci_io_addr_cache_root);
  268. #endif
  269. }