qpace_setup.c 3.3 KB

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  1. /*
  2. * linux/arch/powerpc/platforms/cell/qpace_setup.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
  9. * Modified by Benjamin Krill <ben@codiert.org>, IBM Corp.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/console.h>
  22. #include <linux/of_platform.h>
  23. #include <asm/mmu.h>
  24. #include <asm/processor.h>
  25. #include <asm/io.h>
  26. #include <asm/kexec.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/prom.h>
  29. #include <asm/rtas.h>
  30. #include <asm/dma.h>
  31. #include <asm/machdep.h>
  32. #include <asm/time.h>
  33. #include <asm/cputable.h>
  34. #include <asm/irq.h>
  35. #include <asm/spu.h>
  36. #include <asm/spu_priv1.h>
  37. #include <asm/udbg.h>
  38. #include <asm/cell-regs.h>
  39. #include "interrupt.h"
  40. #include "pervasive.h"
  41. #include "ras.h"
  42. #include "io-workarounds.h"
  43. static void qpace_show_cpuinfo(struct seq_file *m)
  44. {
  45. struct device_node *root;
  46. const char *model = "";
  47. root = of_find_node_by_path("/");
  48. if (root)
  49. model = of_get_property(root, "model", NULL);
  50. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  51. of_node_put(root);
  52. }
  53. static void qpace_progress(char *s, unsigned short hex)
  54. {
  55. printk("*** %04x : %s\n", hex, s ? s : "");
  56. }
  57. static int __init qpace_publish_devices(void)
  58. {
  59. int node;
  60. /* Publish OF platform devices for southbridge IOs */
  61. of_platform_bus_probe(NULL, NULL, NULL);
  62. /* There is no device for the MIC memory controller, thus we create
  63. * a platform device for it to attach the EDAC driver to.
  64. */
  65. for_each_online_node(node) {
  66. if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
  67. continue;
  68. platform_device_register_simple("cbe-mic", node, NULL, 0);
  69. }
  70. return 0;
  71. }
  72. machine_subsys_initcall(qpace, qpace_publish_devices);
  73. static void __init qpace_setup_arch(void)
  74. {
  75. #ifdef CONFIG_SPU_BASE
  76. spu_priv1_ops = &spu_priv1_mmio_ops;
  77. spu_management_ops = &spu_management_of_ops;
  78. #endif
  79. cbe_regs_init();
  80. #ifdef CONFIG_CBE_RAS
  81. cbe_ras_init();
  82. #endif
  83. #ifdef CONFIG_SMP
  84. smp_init_cell();
  85. #endif
  86. /* init to some ~sane value until calibrate_delay() runs */
  87. loops_per_jiffy = 50000000;
  88. cbe_pervasive_init();
  89. #ifdef CONFIG_DUMMY_CONSOLE
  90. conswitchp = &dummy_con;
  91. #endif
  92. }
  93. static int __init qpace_probe(void)
  94. {
  95. unsigned long root = of_get_flat_dt_root();
  96. if (!of_flat_dt_is_compatible(root, "IBM,QPACE"))
  97. return 0;
  98. hpte_init_native();
  99. return 1;
  100. }
  101. define_machine(qpace) {
  102. .name = "QPACE",
  103. .probe = qpace_probe,
  104. .setup_arch = qpace_setup_arch,
  105. .show_cpuinfo = qpace_show_cpuinfo,
  106. .restart = rtas_restart,
  107. .power_off = rtas_power_off,
  108. .halt = rtas_halt,
  109. .get_boot_time = rtas_get_boot_time,
  110. .get_rtc_time = rtas_get_rtc_time,
  111. .set_rtc_time = rtas_set_rtc_time,
  112. .calibrate_decr = generic_calibrate_decr,
  113. .progress = qpace_progress,
  114. .init_IRQ = iic_init_IRQ,
  115. #ifdef CONFIG_KEXEC
  116. .machine_kexec = default_machine_kexec,
  117. .machine_kexec_prepare = default_machine_kexec_prepare,
  118. .machine_crash_shutdown = default_machine_crash_shutdown,
  119. #endif
  120. };