suspend.c 7.8 KB

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  1. /*
  2. * MPC83xx suspend support
  3. *
  4. * Author: Scott Wood <scottwood@freescale.com>
  5. *
  6. * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/pm.h>
  14. #include <linux/types.h>
  15. #include <linux/ioport.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/wait.h>
  18. #include <linux/kthread.h>
  19. #include <linux/freezer.h>
  20. #include <linux/suspend.h>
  21. #include <linux/fsl_devices.h>
  22. #include <linux/of_platform.h>
  23. #include <asm/reg.h>
  24. #include <asm/io.h>
  25. #include <asm/time.h>
  26. #include <asm/mpc6xx.h>
  27. #include <sysdev/fsl_soc.h>
  28. #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
  29. #define PMCCR1_NEXT_STATE_SHIFT 2
  30. #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
  31. #define IMMR_RCW_OFFSET 0x900
  32. #define RCW_PCI_HOST 0x80000000
  33. void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
  34. struct mpc83xx_pmc {
  35. u32 config;
  36. #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
  37. #define PMCCR_SLPEN 1 /* System low power enable */
  38. u32 event;
  39. u32 mask;
  40. /* All but PMCI are deep-sleep only */
  41. #define PMCER_GPIO 0x100
  42. #define PMCER_PCI 0x080
  43. #define PMCER_USB 0x040
  44. #define PMCER_ETSEC1 0x020
  45. #define PMCER_ETSEC2 0x010
  46. #define PMCER_TIMER 0x008
  47. #define PMCER_INT1 0x004
  48. #define PMCER_INT2 0x002
  49. #define PMCER_PMCI 0x001
  50. #define PMCER_ALL 0x1FF
  51. /* deep-sleep only */
  52. u32 config1;
  53. #define PMCCR1_USE_STATE 0x80000000
  54. #define PMCCR1_PME_EN 0x00000080
  55. #define PMCCR1_ASSERT_PME 0x00000040
  56. #define PMCCR1_POWER_OFF 0x00000020
  57. /* deep-sleep only */
  58. u32 config2;
  59. };
  60. struct mpc83xx_rcw {
  61. u32 rcwlr;
  62. u32 rcwhr;
  63. };
  64. struct mpc83xx_clock {
  65. u32 spmr;
  66. u32 occr;
  67. u32 sccr;
  68. };
  69. struct pmc_type {
  70. int has_deep_sleep;
  71. };
  72. static struct of_device *pmc_dev;
  73. static int has_deep_sleep, deep_sleeping;
  74. static int pmc_irq;
  75. static struct mpc83xx_pmc __iomem *pmc_regs;
  76. static struct mpc83xx_clock __iomem *clock_regs;
  77. static int is_pci_agent, wake_from_pci;
  78. static phys_addr_t immrbase;
  79. static int pci_pm_state;
  80. static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
  81. int fsl_deep_sleep(void)
  82. {
  83. return deep_sleeping;
  84. }
  85. static int mpc83xx_change_state(void)
  86. {
  87. u32 curr_state;
  88. u32 reg_cfg1 = in_be32(&pmc_regs->config1);
  89. if (is_pci_agent) {
  90. pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
  91. PMCCR1_NEXT_STATE_SHIFT;
  92. curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
  93. if (curr_state != pci_pm_state) {
  94. reg_cfg1 &= ~PMCCR1_CURR_STATE;
  95. reg_cfg1 |= pci_pm_state;
  96. out_be32(&pmc_regs->config1, reg_cfg1);
  97. wake_up(&agent_wq);
  98. return 1;
  99. }
  100. }
  101. return 0;
  102. }
  103. static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
  104. {
  105. u32 event = in_be32(&pmc_regs->event);
  106. int ret = IRQ_NONE;
  107. if (mpc83xx_change_state())
  108. ret = IRQ_HANDLED;
  109. if (event) {
  110. out_be32(&pmc_regs->event, event);
  111. ret = IRQ_HANDLED;
  112. }
  113. return ret;
  114. }
  115. static int mpc83xx_suspend_enter(suspend_state_t state)
  116. {
  117. int ret = -EAGAIN;
  118. /* Don't go to sleep if there's a race where pci_pm_state changes
  119. * between the agent thread checking it and the PM code disabling
  120. * interrupts.
  121. */
  122. if (wake_from_pci) {
  123. if (pci_pm_state != (deep_sleeping ? 3 : 2))
  124. goto out;
  125. out_be32(&pmc_regs->config1,
  126. in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
  127. }
  128. /* Put the system into low-power mode and the RAM
  129. * into self-refresh mode once the core goes to
  130. * sleep.
  131. */
  132. out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
  133. /* If it has deep sleep (i.e. it's an 831x or compatible),
  134. * disable power to the core upon entering sleep mode. This will
  135. * require going through the boot firmware upon a wakeup event.
  136. */
  137. if (deep_sleeping) {
  138. out_be32(&pmc_regs->mask, PMCER_ALL);
  139. out_be32(&pmc_regs->config1,
  140. in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
  141. enable_kernel_fp();
  142. mpc83xx_enter_deep_sleep(immrbase);
  143. out_be32(&pmc_regs->config1,
  144. in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
  145. out_be32(&pmc_regs->mask, PMCER_PMCI);
  146. } else {
  147. out_be32(&pmc_regs->mask, PMCER_PMCI);
  148. mpc6xx_enter_standby();
  149. }
  150. ret = 0;
  151. out:
  152. out_be32(&pmc_regs->config1,
  153. in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
  154. return ret;
  155. }
  156. static void mpc83xx_suspend_finish(void)
  157. {
  158. deep_sleeping = 0;
  159. }
  160. static int mpc83xx_suspend_valid(suspend_state_t state)
  161. {
  162. return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
  163. }
  164. static int mpc83xx_suspend_begin(suspend_state_t state)
  165. {
  166. switch (state) {
  167. case PM_SUSPEND_STANDBY:
  168. deep_sleeping = 0;
  169. return 0;
  170. case PM_SUSPEND_MEM:
  171. if (has_deep_sleep)
  172. deep_sleeping = 1;
  173. return 0;
  174. default:
  175. return -EINVAL;
  176. }
  177. }
  178. static int agent_thread_fn(void *data)
  179. {
  180. while (1) {
  181. wait_event_interruptible(agent_wq, pci_pm_state >= 2);
  182. try_to_freeze();
  183. if (signal_pending(current) || pci_pm_state < 2)
  184. continue;
  185. /* With a preemptible kernel (or SMP), this could race with
  186. * a userspace-driven suspend request. It's probably best
  187. * to avoid mixing the two with such a configuration (or
  188. * else fix it by adding a mutex to state_store that we can
  189. * synchronize with).
  190. */
  191. wake_from_pci = 1;
  192. pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
  193. PM_SUSPEND_STANDBY);
  194. wake_from_pci = 0;
  195. }
  196. return 0;
  197. }
  198. static void mpc83xx_set_agent(void)
  199. {
  200. out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
  201. out_be32(&pmc_regs->mask, PMCER_PMCI);
  202. kthread_run(agent_thread_fn, NULL, "PCI power mgt");
  203. }
  204. static int mpc83xx_is_pci_agent(void)
  205. {
  206. struct mpc83xx_rcw __iomem *rcw_regs;
  207. int ret;
  208. rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
  209. sizeof(struct mpc83xx_rcw));
  210. if (!rcw_regs)
  211. return -ENOMEM;
  212. ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
  213. iounmap(rcw_regs);
  214. return ret;
  215. }
  216. static struct platform_suspend_ops mpc83xx_suspend_ops = {
  217. .valid = mpc83xx_suspend_valid,
  218. .begin = mpc83xx_suspend_begin,
  219. .enter = mpc83xx_suspend_enter,
  220. .finish = mpc83xx_suspend_finish,
  221. };
  222. static int pmc_probe(struct of_device *ofdev,
  223. const struct of_device_id *match)
  224. {
  225. struct device_node *np = ofdev->node;
  226. struct resource res;
  227. struct pmc_type *type = match->data;
  228. int ret = 0;
  229. if (!of_device_is_available(np))
  230. return -ENODEV;
  231. has_deep_sleep = type->has_deep_sleep;
  232. immrbase = get_immrbase();
  233. pmc_dev = ofdev;
  234. is_pci_agent = mpc83xx_is_pci_agent();
  235. if (is_pci_agent < 0)
  236. return is_pci_agent;
  237. ret = of_address_to_resource(np, 0, &res);
  238. if (ret)
  239. return -ENODEV;
  240. pmc_irq = irq_of_parse_and_map(np, 0);
  241. if (pmc_irq != NO_IRQ) {
  242. ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
  243. "pmc", ofdev);
  244. if (ret)
  245. return -EBUSY;
  246. }
  247. pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
  248. if (!pmc_regs) {
  249. ret = -ENOMEM;
  250. goto out;
  251. }
  252. ret = of_address_to_resource(np, 1, &res);
  253. if (ret) {
  254. ret = -ENODEV;
  255. goto out_pmc;
  256. }
  257. clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
  258. if (!clock_regs) {
  259. ret = -ENOMEM;
  260. goto out_pmc;
  261. }
  262. if (is_pci_agent)
  263. mpc83xx_set_agent();
  264. suspend_set_ops(&mpc83xx_suspend_ops);
  265. return 0;
  266. out_pmc:
  267. iounmap(pmc_regs);
  268. out:
  269. if (pmc_irq != NO_IRQ)
  270. free_irq(pmc_irq, ofdev);
  271. return ret;
  272. }
  273. static int pmc_remove(struct of_device *ofdev)
  274. {
  275. return -EPERM;
  276. };
  277. static struct pmc_type pmc_types[] = {
  278. {
  279. .has_deep_sleep = 1,
  280. },
  281. {
  282. .has_deep_sleep = 0,
  283. }
  284. };
  285. static struct of_device_id pmc_match[] = {
  286. {
  287. .compatible = "fsl,mpc8313-pmc",
  288. .data = &pmc_types[0],
  289. },
  290. {
  291. .compatible = "fsl,mpc8349-pmc",
  292. .data = &pmc_types[1],
  293. },
  294. {}
  295. };
  296. static struct of_platform_driver pmc_driver = {
  297. .name = "mpc83xx-pmc",
  298. .match_table = pmc_match,
  299. .probe = pmc_probe,
  300. .remove = pmc_remove
  301. };
  302. static int pmc_init(void)
  303. {
  304. return of_register_platform_driver(&pmc_driver);
  305. }
  306. module_init(pmc_init);