mpc52xx_common.c 6.5 KB

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  1. /*
  2. *
  3. * Utility functions for the Freescale MPC52xx.
  4. *
  5. * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. *
  11. */
  12. #undef DEBUG
  13. #include <linux/kernel.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/of_platform.h>
  16. #include <asm/io.h>
  17. #include <asm/prom.h>
  18. #include <asm/mpc52xx.h>
  19. /* MPC5200 device tree match tables */
  20. static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
  21. { .compatible = "fsl,mpc5200-xlb", },
  22. { .compatible = "mpc5200-xlb", },
  23. {}
  24. };
  25. static struct of_device_id mpc52xx_bus_ids[] __initdata = {
  26. { .compatible = "fsl,mpc5200-immr", },
  27. { .compatible = "fsl,mpc5200b-immr", },
  28. { .compatible = "simple-bus", },
  29. /* depreciated matches; shouldn't be used in new device trees */
  30. { .compatible = "fsl,lpb", },
  31. { .type = "builtin", .compatible = "mpc5200", }, /* efika */
  32. { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
  33. {}
  34. };
  35. /*
  36. * This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
  37. * Permanent mapping is required because mpc52xx_restart() can be called
  38. * from interrupt context while node mapping (which calls ioremap())
  39. * cannot be used at such point.
  40. */
  41. static DEFINE_SPINLOCK(mpc52xx_lock);
  42. static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
  43. static struct mpc52xx_cdm __iomem *mpc52xx_cdm;
  44. /**
  45. * mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device
  46. * @node: device node
  47. *
  48. * Returns IPB bus frequency, or 0 if the bus frequency cannot be found.
  49. */
  50. unsigned int
  51. mpc52xx_find_ipb_freq(struct device_node *node)
  52. {
  53. struct device_node *np;
  54. const unsigned int *p_ipb_freq = NULL;
  55. of_node_get(node);
  56. while (node) {
  57. p_ipb_freq = of_get_property(node, "bus-frequency", NULL);
  58. if (p_ipb_freq)
  59. break;
  60. np = of_get_parent(node);
  61. of_node_put(node);
  62. node = np;
  63. }
  64. if (node)
  65. of_node_put(node);
  66. return p_ipb_freq ? *p_ipb_freq : 0;
  67. }
  68. EXPORT_SYMBOL(mpc52xx_find_ipb_freq);
  69. /*
  70. * Configure the XLB arbiter settings to match what Linux expects.
  71. */
  72. void __init
  73. mpc5200_setup_xlb_arbiter(void)
  74. {
  75. struct device_node *np;
  76. struct mpc52xx_xlb __iomem *xlb;
  77. np = of_find_matching_node(NULL, mpc52xx_xlb_ids);
  78. xlb = of_iomap(np, 0);
  79. of_node_put(np);
  80. if (!xlb) {
  81. printk(KERN_ERR __FILE__ ": "
  82. "Error mapping XLB in mpc52xx_setup_cpu(). "
  83. "Expect some abnormal behavior\n");
  84. return;
  85. }
  86. /* Configure the XLB Arbiter priorities */
  87. out_be32(&xlb->master_pri_enable, 0xff);
  88. out_be32(&xlb->master_priority, 0x11111111);
  89. /*
  90. * Disable XLB pipelining
  91. * (cfr errate 292. We could do this only just before ATA PIO
  92. * transaction and re-enable it afterwards ...)
  93. * Not needed on MPC5200B.
  94. */
  95. if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR)
  96. out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
  97. iounmap(xlb);
  98. }
  99. /**
  100. * mpc52xx_declare_of_platform_devices: register internal devices and children
  101. * of the localplus bus to the of_platform
  102. * bus.
  103. */
  104. void __init
  105. mpc52xx_declare_of_platform_devices(void)
  106. {
  107. /* Find every child of the SOC node and add it to of_platform */
  108. if (of_platform_bus_probe(NULL, mpc52xx_bus_ids, NULL))
  109. printk(KERN_ERR __FILE__ ": "
  110. "Error while probing of_platform bus\n");
  111. }
  112. /*
  113. * match tables used by mpc52xx_map_common_devices()
  114. */
  115. static struct of_device_id mpc52xx_gpt_ids[] __initdata = {
  116. { .compatible = "fsl,mpc5200-gpt", },
  117. { .compatible = "mpc5200-gpt", }, /* old */
  118. {}
  119. };
  120. static struct of_device_id mpc52xx_cdm_ids[] __initdata = {
  121. { .compatible = "fsl,mpc5200-cdm", },
  122. { .compatible = "mpc5200-cdm", }, /* old */
  123. {}
  124. };
  125. /**
  126. * mpc52xx_map_common_devices: iomap devices required by common code
  127. */
  128. void __init
  129. mpc52xx_map_common_devices(void)
  130. {
  131. struct device_node *np;
  132. /* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
  133. * possibly from a interrupt context. wdt is only implement
  134. * on a gpt0, so check has-wdt property before mapping.
  135. */
  136. for_each_matching_node(np, mpc52xx_gpt_ids) {
  137. if (of_get_property(np, "fsl,has-wdt", NULL) ||
  138. of_get_property(np, "has-wdt", NULL)) {
  139. mpc52xx_wdt = of_iomap(np, 0);
  140. of_node_put(np);
  141. break;
  142. }
  143. }
  144. /* Clock Distribution Module, used by PSC clock setting function */
  145. np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
  146. mpc52xx_cdm = of_iomap(np, 0);
  147. of_node_put(np);
  148. }
  149. /**
  150. * mpc52xx_set_psc_clkdiv: Set clock divider in the CDM for PSC ports
  151. *
  152. * @psc_id: id of psc port; must be 1,2,3 or 6
  153. * @clkdiv: clock divider value to put into CDM PSC register.
  154. */
  155. int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
  156. {
  157. unsigned long flags;
  158. u16 __iomem *reg;
  159. u32 val;
  160. u32 mask;
  161. u32 mclken_div;
  162. if (!mpc52xx_cdm)
  163. return -ENODEV;
  164. mclken_div = 0x8000 | (clkdiv & 0x1FF);
  165. switch (psc_id) {
  166. case 1: reg = &mpc52xx_cdm->mclken_div_psc1; mask = 0x20; break;
  167. case 2: reg = &mpc52xx_cdm->mclken_div_psc2; mask = 0x40; break;
  168. case 3: reg = &mpc52xx_cdm->mclken_div_psc3; mask = 0x80; break;
  169. case 6: reg = &mpc52xx_cdm->mclken_div_psc6; mask = 0x10; break;
  170. default:
  171. return -ENODEV;
  172. }
  173. /* Set the rate and enable the clock */
  174. spin_lock_irqsave(&mpc52xx_lock, flags);
  175. out_be16(reg, mclken_div);
  176. val = in_be32(&mpc52xx_cdm->clk_enables);
  177. out_be32(&mpc52xx_cdm->clk_enables, val | mask);
  178. spin_unlock_irqrestore(&mpc52xx_lock, flags);
  179. return 0;
  180. }
  181. EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv);
  182. /**
  183. * mpc52xx_get_xtal_freq - Get SYS_XTAL_IN frequency for a device
  184. *
  185. * @node: device node
  186. *
  187. * Returns the frequency of the external oscillator clock connected
  188. * to the SYS_XTAL_IN pin, or 0 if it cannot be determined.
  189. */
  190. unsigned int mpc52xx_get_xtal_freq(struct device_node *node)
  191. {
  192. u32 val;
  193. unsigned int freq;
  194. if (!mpc52xx_cdm)
  195. return 0;
  196. freq = mpc52xx_find_ipb_freq(node);
  197. if (!freq)
  198. return 0;
  199. if (in_8(&mpc52xx_cdm->ipb_clk_sel) & 0x1)
  200. freq *= 2;
  201. val = in_be32(&mpc52xx_cdm->rstcfg);
  202. if (val & (1 << 5))
  203. freq *= 8;
  204. else
  205. freq *= 4;
  206. if (val & (1 << 6))
  207. freq /= 12;
  208. else
  209. freq /= 16;
  210. return freq;
  211. }
  212. EXPORT_SYMBOL(mpc52xx_get_xtal_freq);
  213. /**
  214. * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
  215. */
  216. void
  217. mpc52xx_restart(char *cmd)
  218. {
  219. local_irq_disable();
  220. /* Turn on the watchdog and wait for it to expire.
  221. * It effectively does a reset. */
  222. if (mpc52xx_wdt) {
  223. out_be32(&mpc52xx_wdt->mode, 0x00000000);
  224. out_be32(&mpc52xx_wdt->count, 0x000000ff);
  225. out_be32(&mpc52xx_wdt->mode, 0x00009004);
  226. } else
  227. printk(KERN_ERR __FILE__ ": "
  228. "mpc52xx_restart: Can't access wdt. "
  229. "Restart impossible, system halted.\n");
  230. while (1);
  231. }