udbg_16550.c 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300
  1. /*
  2. * udbg for for NS16550 compatable serial ports
  3. *
  4. * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/types.h>
  12. #include <asm/udbg.h>
  13. #include <asm/io.h>
  14. extern u8 real_readb(volatile u8 __iomem *addr);
  15. extern void real_writeb(u8 data, volatile u8 __iomem *addr);
  16. extern u8 real_205_readb(volatile u8 __iomem *addr);
  17. extern void real_205_writeb(u8 data, volatile u8 __iomem *addr);
  18. struct NS16550 {
  19. /* this struct must be packed */
  20. unsigned char rbr; /* 0 */
  21. unsigned char ier; /* 1 */
  22. unsigned char fcr; /* 2 */
  23. unsigned char lcr; /* 3 */
  24. unsigned char mcr; /* 4 */
  25. unsigned char lsr; /* 5 */
  26. unsigned char msr; /* 6 */
  27. unsigned char scr; /* 7 */
  28. };
  29. #define thr rbr
  30. #define iir fcr
  31. #define dll rbr
  32. #define dlm ier
  33. #define dlab lcr
  34. #define LSR_DR 0x01 /* Data ready */
  35. #define LSR_OE 0x02 /* Overrun */
  36. #define LSR_PE 0x04 /* Parity error */
  37. #define LSR_FE 0x08 /* Framing error */
  38. #define LSR_BI 0x10 /* Break */
  39. #define LSR_THRE 0x20 /* Xmit holding register empty */
  40. #define LSR_TEMT 0x40 /* Xmitter empty */
  41. #define LSR_ERR 0x80 /* Error */
  42. #define LCR_DLAB 0x80
  43. static struct NS16550 __iomem *udbg_comport;
  44. static void udbg_550_flush(void)
  45. {
  46. if (udbg_comport) {
  47. while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
  48. /* wait for idle */;
  49. }
  50. }
  51. static void udbg_550_putc(char c)
  52. {
  53. if (udbg_comport) {
  54. if (c == '\n')
  55. udbg_550_putc('\r');
  56. udbg_550_flush();
  57. out_8(&udbg_comport->thr, c);
  58. }
  59. }
  60. static int udbg_550_getc_poll(void)
  61. {
  62. if (udbg_comport) {
  63. if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
  64. return in_8(&udbg_comport->rbr);
  65. else
  66. return -1;
  67. }
  68. return -1;
  69. }
  70. static int udbg_550_getc(void)
  71. {
  72. if (udbg_comport) {
  73. while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
  74. /* wait for char */;
  75. return in_8(&udbg_comport->rbr);
  76. }
  77. return -1;
  78. }
  79. void udbg_init_uart(void __iomem *comport, unsigned int speed,
  80. unsigned int clock)
  81. {
  82. unsigned int dll, base_bauds;
  83. if (clock == 0)
  84. clock = 1843200;
  85. if (speed == 0)
  86. speed = 9600;
  87. base_bauds = clock / 16;
  88. dll = base_bauds / speed;
  89. if (comport) {
  90. udbg_comport = (struct NS16550 __iomem *)comport;
  91. out_8(&udbg_comport->lcr, 0x00);
  92. out_8(&udbg_comport->ier, 0xff);
  93. out_8(&udbg_comport->ier, 0x00);
  94. out_8(&udbg_comport->lcr, LCR_DLAB);
  95. out_8(&udbg_comport->dll, dll & 0xff);
  96. out_8(&udbg_comport->dlm, dll >> 8);
  97. /* 8 data, 1 stop, no parity */
  98. out_8(&udbg_comport->lcr, 0x03);
  99. /* RTS/DTR */
  100. out_8(&udbg_comport->mcr, 0x03);
  101. /* Clear & enable FIFOs */
  102. out_8(&udbg_comport->fcr ,0x07);
  103. udbg_putc = udbg_550_putc;
  104. udbg_flush = udbg_550_flush;
  105. udbg_getc = udbg_550_getc;
  106. udbg_getc_poll = udbg_550_getc_poll;
  107. }
  108. }
  109. unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
  110. {
  111. unsigned int dll, dlm, divisor, prescaler, speed;
  112. u8 old_lcr;
  113. struct NS16550 __iomem *port = comport;
  114. old_lcr = in_8(&port->lcr);
  115. /* select divisor latch registers. */
  116. out_8(&port->lcr, LCR_DLAB);
  117. /* now, read the divisor */
  118. dll = in_8(&port->dll);
  119. dlm = in_8(&port->dlm);
  120. divisor = dlm << 8 | dll;
  121. /* check prescaling */
  122. if (in_8(&port->mcr) & 0x80)
  123. prescaler = 4;
  124. else
  125. prescaler = 1;
  126. /* restore the LCR */
  127. out_8(&port->lcr, old_lcr);
  128. /* calculate speed */
  129. speed = (clock / prescaler) / (divisor * 16);
  130. /* sanity check */
  131. if (speed > (clock / 16))
  132. speed = 9600;
  133. return speed;
  134. }
  135. #ifdef CONFIG_PPC_MAPLE
  136. void udbg_maple_real_flush(void)
  137. {
  138. if (udbg_comport) {
  139. while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
  140. /* wait for idle */;
  141. }
  142. }
  143. void udbg_maple_real_putc(char c)
  144. {
  145. if (udbg_comport) {
  146. if (c == '\n')
  147. udbg_maple_real_putc('\r');
  148. udbg_maple_real_flush();
  149. real_writeb(c, &udbg_comport->thr); eieio();
  150. }
  151. }
  152. void __init udbg_init_maple_realmode(void)
  153. {
  154. udbg_comport = (struct NS16550 __iomem *)0xf40003f8;
  155. udbg_putc = udbg_maple_real_putc;
  156. udbg_flush = udbg_maple_real_flush;
  157. udbg_getc = NULL;
  158. udbg_getc_poll = NULL;
  159. }
  160. #endif /* CONFIG_PPC_MAPLE */
  161. #ifdef CONFIG_PPC_PASEMI
  162. void udbg_pas_real_flush(void)
  163. {
  164. if (udbg_comport) {
  165. while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
  166. /* wait for idle */;
  167. }
  168. }
  169. void udbg_pas_real_putc(char c)
  170. {
  171. if (udbg_comport) {
  172. if (c == '\n')
  173. udbg_pas_real_putc('\r');
  174. udbg_pas_real_flush();
  175. real_205_writeb(c, &udbg_comport->thr); eieio();
  176. }
  177. }
  178. void udbg_init_pas_realmode(void)
  179. {
  180. udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL;
  181. udbg_putc = udbg_pas_real_putc;
  182. udbg_flush = udbg_pas_real_flush;
  183. udbg_getc = NULL;
  184. udbg_getc_poll = NULL;
  185. }
  186. #endif /* CONFIG_PPC_MAPLE */
  187. #ifdef CONFIG_PPC_EARLY_DEBUG_44x
  188. #include <platforms/44x/44x.h>
  189. static int udbg_44x_as1_flush(void)
  190. {
  191. if (udbg_comport) {
  192. while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
  193. /* wait for idle */;
  194. }
  195. }
  196. static void udbg_44x_as1_putc(char c)
  197. {
  198. if (udbg_comport) {
  199. if (c == '\n')
  200. udbg_44x_as1_putc('\r');
  201. udbg_44x_as1_flush();
  202. as1_writeb(c, &udbg_comport->thr); eieio();
  203. }
  204. }
  205. static int udbg_44x_as1_getc(void)
  206. {
  207. if (udbg_comport) {
  208. while ((as1_readb(&udbg_comport->lsr) & LSR_DR) == 0)
  209. ; /* wait for char */
  210. return as1_readb(&udbg_comport->rbr);
  211. }
  212. return -1;
  213. }
  214. void __init udbg_init_44x_as1(void)
  215. {
  216. udbg_comport =
  217. (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
  218. udbg_putc = udbg_44x_as1_putc;
  219. udbg_flush = udbg_44x_as1_flush;
  220. udbg_getc = udbg_44x_as1_getc;
  221. }
  222. #endif /* CONFIG_PPC_EARLY_DEBUG_44x */
  223. #ifdef CONFIG_PPC_EARLY_DEBUG_40x
  224. static void udbg_40x_real_flush(void)
  225. {
  226. if (udbg_comport) {
  227. while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
  228. /* wait for idle */;
  229. }
  230. }
  231. static void udbg_40x_real_putc(char c)
  232. {
  233. if (udbg_comport) {
  234. if (c == '\n')
  235. udbg_40x_real_putc('\r');
  236. udbg_40x_real_flush();
  237. real_writeb(c, &udbg_comport->thr); eieio();
  238. }
  239. }
  240. static int udbg_40x_real_getc(void)
  241. {
  242. if (udbg_comport) {
  243. while ((real_readb(&udbg_comport->lsr) & LSR_DR) == 0)
  244. ; /* wait for char */
  245. return real_readb(&udbg_comport->rbr);
  246. }
  247. return -1;
  248. }
  249. void __init udbg_init_40x_realmode(void)
  250. {
  251. udbg_comport = (struct NS16550 __iomem *)
  252. CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
  253. udbg_putc = udbg_40x_real_putc;
  254. udbg_flush = udbg_40x_real_flush;
  255. udbg_getc = udbg_40x_real_getc;
  256. udbg_getc_poll = NULL;
  257. }
  258. #endif /* CONFIG_PPC_EARLY_DEBUG_40x */