cputable.c 56 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. #include <asm/mmu.h>
  21. struct cpu_spec* cur_cpu_spec = NULL;
  22. EXPORT_SYMBOL(cur_cpu_spec);
  23. /* The platform string corresponding to the real PVR */
  24. const char *powerpc_base_platform;
  25. /* NOTE:
  26. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  27. * the responsibility of the appropriate CPU save/restore functions to
  28. * eventually copy these settings over. Those save/restore aren't yet
  29. * part of the cputable though. That has to be fixed for both ppc32
  30. * and ppc64
  31. */
  32. #ifdef CONFIG_PPC32
  33. extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
  38. extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
  39. extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
  40. extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
  43. extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
  44. extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
  45. extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
  46. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  47. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  48. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  49. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  50. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  51. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  52. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  53. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  54. #endif /* CONFIG_PPC32 */
  55. #ifdef CONFIG_PPC64
  56. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  57. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  58. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  59. extern void __restore_cpu_pa6t(void);
  60. extern void __restore_cpu_ppc970(void);
  61. extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
  62. extern void __restore_cpu_power7(void);
  63. #endif /* CONFIG_PPC64 */
  64. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  65. * ones as well...
  66. */
  67. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  68. PPC_FEATURE_HAS_MMU)
  69. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  70. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  71. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  72. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  73. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  74. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  75. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  76. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  77. PPC_FEATURE_TRUE_LE | \
  78. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  79. #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  80. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  81. PPC_FEATURE_TRUE_LE | \
  82. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  83. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  84. PPC_FEATURE_TRUE_LE | \
  85. PPC_FEATURE_HAS_ALTIVEC_COMP)
  86. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  87. PPC_FEATURE_BOOKE)
  88. static struct cpu_spec __initdata cpu_specs[] = {
  89. #ifdef CONFIG_PPC64
  90. { /* Power3 */
  91. .pvr_mask = 0xffff0000,
  92. .pvr_value = 0x00400000,
  93. .cpu_name = "POWER3 (630)",
  94. .cpu_features = CPU_FTRS_POWER3,
  95. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  96. .mmu_features = MMU_FTR_HPTE_TABLE,
  97. .icache_bsize = 128,
  98. .dcache_bsize = 128,
  99. .num_pmcs = 8,
  100. .pmc_type = PPC_PMC_IBM,
  101. .oprofile_cpu_type = "ppc64/power3",
  102. .oprofile_type = PPC_OPROFILE_RS64,
  103. .machine_check = machine_check_generic,
  104. .platform = "power3",
  105. },
  106. { /* Power3+ */
  107. .pvr_mask = 0xffff0000,
  108. .pvr_value = 0x00410000,
  109. .cpu_name = "POWER3 (630+)",
  110. .cpu_features = CPU_FTRS_POWER3,
  111. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  112. .mmu_features = MMU_FTR_HPTE_TABLE,
  113. .icache_bsize = 128,
  114. .dcache_bsize = 128,
  115. .num_pmcs = 8,
  116. .pmc_type = PPC_PMC_IBM,
  117. .oprofile_cpu_type = "ppc64/power3",
  118. .oprofile_type = PPC_OPROFILE_RS64,
  119. .machine_check = machine_check_generic,
  120. .platform = "power3",
  121. },
  122. { /* Northstar */
  123. .pvr_mask = 0xffff0000,
  124. .pvr_value = 0x00330000,
  125. .cpu_name = "RS64-II (northstar)",
  126. .cpu_features = CPU_FTRS_RS64,
  127. .cpu_user_features = COMMON_USER_PPC64,
  128. .mmu_features = MMU_FTR_HPTE_TABLE,
  129. .icache_bsize = 128,
  130. .dcache_bsize = 128,
  131. .num_pmcs = 8,
  132. .pmc_type = PPC_PMC_IBM,
  133. .oprofile_cpu_type = "ppc64/rs64",
  134. .oprofile_type = PPC_OPROFILE_RS64,
  135. .machine_check = machine_check_generic,
  136. .platform = "rs64",
  137. },
  138. { /* Pulsar */
  139. .pvr_mask = 0xffff0000,
  140. .pvr_value = 0x00340000,
  141. .cpu_name = "RS64-III (pulsar)",
  142. .cpu_features = CPU_FTRS_RS64,
  143. .cpu_user_features = COMMON_USER_PPC64,
  144. .mmu_features = MMU_FTR_HPTE_TABLE,
  145. .icache_bsize = 128,
  146. .dcache_bsize = 128,
  147. .num_pmcs = 8,
  148. .pmc_type = PPC_PMC_IBM,
  149. .oprofile_cpu_type = "ppc64/rs64",
  150. .oprofile_type = PPC_OPROFILE_RS64,
  151. .machine_check = machine_check_generic,
  152. .platform = "rs64",
  153. },
  154. { /* I-star */
  155. .pvr_mask = 0xffff0000,
  156. .pvr_value = 0x00360000,
  157. .cpu_name = "RS64-III (icestar)",
  158. .cpu_features = CPU_FTRS_RS64,
  159. .cpu_user_features = COMMON_USER_PPC64,
  160. .mmu_features = MMU_FTR_HPTE_TABLE,
  161. .icache_bsize = 128,
  162. .dcache_bsize = 128,
  163. .num_pmcs = 8,
  164. .pmc_type = PPC_PMC_IBM,
  165. .oprofile_cpu_type = "ppc64/rs64",
  166. .oprofile_type = PPC_OPROFILE_RS64,
  167. .machine_check = machine_check_generic,
  168. .platform = "rs64",
  169. },
  170. { /* S-star */
  171. .pvr_mask = 0xffff0000,
  172. .pvr_value = 0x00370000,
  173. .cpu_name = "RS64-IV (sstar)",
  174. .cpu_features = CPU_FTRS_RS64,
  175. .cpu_user_features = COMMON_USER_PPC64,
  176. .mmu_features = MMU_FTR_HPTE_TABLE,
  177. .icache_bsize = 128,
  178. .dcache_bsize = 128,
  179. .num_pmcs = 8,
  180. .pmc_type = PPC_PMC_IBM,
  181. .oprofile_cpu_type = "ppc64/rs64",
  182. .oprofile_type = PPC_OPROFILE_RS64,
  183. .machine_check = machine_check_generic,
  184. .platform = "rs64",
  185. },
  186. { /* Power4 */
  187. .pvr_mask = 0xffff0000,
  188. .pvr_value = 0x00350000,
  189. .cpu_name = "POWER4 (gp)",
  190. .cpu_features = CPU_FTRS_POWER4,
  191. .cpu_user_features = COMMON_USER_POWER4,
  192. .mmu_features = MMU_FTR_HPTE_TABLE,
  193. .icache_bsize = 128,
  194. .dcache_bsize = 128,
  195. .num_pmcs = 8,
  196. .pmc_type = PPC_PMC_IBM,
  197. .oprofile_cpu_type = "ppc64/power4",
  198. .oprofile_type = PPC_OPROFILE_POWER4,
  199. .machine_check = machine_check_generic,
  200. .platform = "power4",
  201. },
  202. { /* Power4+ */
  203. .pvr_mask = 0xffff0000,
  204. .pvr_value = 0x00380000,
  205. .cpu_name = "POWER4+ (gq)",
  206. .cpu_features = CPU_FTRS_POWER4,
  207. .cpu_user_features = COMMON_USER_POWER4,
  208. .mmu_features = MMU_FTR_HPTE_TABLE,
  209. .icache_bsize = 128,
  210. .dcache_bsize = 128,
  211. .num_pmcs = 8,
  212. .pmc_type = PPC_PMC_IBM,
  213. .oprofile_cpu_type = "ppc64/power4",
  214. .oprofile_type = PPC_OPROFILE_POWER4,
  215. .machine_check = machine_check_generic,
  216. .platform = "power4",
  217. },
  218. { /* PPC970 */
  219. .pvr_mask = 0xffff0000,
  220. .pvr_value = 0x00390000,
  221. .cpu_name = "PPC970",
  222. .cpu_features = CPU_FTRS_PPC970,
  223. .cpu_user_features = COMMON_USER_POWER4 |
  224. PPC_FEATURE_HAS_ALTIVEC_COMP,
  225. .mmu_features = MMU_FTR_HPTE_TABLE,
  226. .icache_bsize = 128,
  227. .dcache_bsize = 128,
  228. .num_pmcs = 8,
  229. .pmc_type = PPC_PMC_IBM,
  230. .cpu_setup = __setup_cpu_ppc970,
  231. .cpu_restore = __restore_cpu_ppc970,
  232. .oprofile_cpu_type = "ppc64/970",
  233. .oprofile_type = PPC_OPROFILE_POWER4,
  234. .machine_check = machine_check_generic,
  235. .platform = "ppc970",
  236. },
  237. { /* PPC970FX */
  238. .pvr_mask = 0xffff0000,
  239. .pvr_value = 0x003c0000,
  240. .cpu_name = "PPC970FX",
  241. .cpu_features = CPU_FTRS_PPC970,
  242. .cpu_user_features = COMMON_USER_POWER4 |
  243. PPC_FEATURE_HAS_ALTIVEC_COMP,
  244. .mmu_features = MMU_FTR_HPTE_TABLE,
  245. .icache_bsize = 128,
  246. .dcache_bsize = 128,
  247. .num_pmcs = 8,
  248. .pmc_type = PPC_PMC_IBM,
  249. .cpu_setup = __setup_cpu_ppc970,
  250. .cpu_restore = __restore_cpu_ppc970,
  251. .oprofile_cpu_type = "ppc64/970",
  252. .oprofile_type = PPC_OPROFILE_POWER4,
  253. .machine_check = machine_check_generic,
  254. .platform = "ppc970",
  255. },
  256. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  257. .pvr_mask = 0xffffffff,
  258. .pvr_value = 0x00440100,
  259. .cpu_name = "PPC970MP",
  260. .cpu_features = CPU_FTRS_PPC970,
  261. .cpu_user_features = COMMON_USER_POWER4 |
  262. PPC_FEATURE_HAS_ALTIVEC_COMP,
  263. .mmu_features = MMU_FTR_HPTE_TABLE,
  264. .icache_bsize = 128,
  265. .dcache_bsize = 128,
  266. .num_pmcs = 8,
  267. .pmc_type = PPC_PMC_IBM,
  268. .cpu_setup = __setup_cpu_ppc970,
  269. .cpu_restore = __restore_cpu_ppc970,
  270. .oprofile_cpu_type = "ppc64/970MP",
  271. .oprofile_type = PPC_OPROFILE_POWER4,
  272. .machine_check = machine_check_generic,
  273. .platform = "ppc970",
  274. },
  275. { /* PPC970MP */
  276. .pvr_mask = 0xffff0000,
  277. .pvr_value = 0x00440000,
  278. .cpu_name = "PPC970MP",
  279. .cpu_features = CPU_FTRS_PPC970,
  280. .cpu_user_features = COMMON_USER_POWER4 |
  281. PPC_FEATURE_HAS_ALTIVEC_COMP,
  282. .mmu_features = MMU_FTR_HPTE_TABLE,
  283. .icache_bsize = 128,
  284. .dcache_bsize = 128,
  285. .num_pmcs = 8,
  286. .pmc_type = PPC_PMC_IBM,
  287. .cpu_setup = __setup_cpu_ppc970MP,
  288. .cpu_restore = __restore_cpu_ppc970,
  289. .oprofile_cpu_type = "ppc64/970MP",
  290. .oprofile_type = PPC_OPROFILE_POWER4,
  291. .machine_check = machine_check_generic,
  292. .platform = "ppc970",
  293. },
  294. { /* PPC970GX */
  295. .pvr_mask = 0xffff0000,
  296. .pvr_value = 0x00450000,
  297. .cpu_name = "PPC970GX",
  298. .cpu_features = CPU_FTRS_PPC970,
  299. .cpu_user_features = COMMON_USER_POWER4 |
  300. PPC_FEATURE_HAS_ALTIVEC_COMP,
  301. .mmu_features = MMU_FTR_HPTE_TABLE,
  302. .icache_bsize = 128,
  303. .dcache_bsize = 128,
  304. .num_pmcs = 8,
  305. .pmc_type = PPC_PMC_IBM,
  306. .cpu_setup = __setup_cpu_ppc970,
  307. .oprofile_cpu_type = "ppc64/970",
  308. .oprofile_type = PPC_OPROFILE_POWER4,
  309. .machine_check = machine_check_generic,
  310. .platform = "ppc970",
  311. },
  312. { /* Power5 GR */
  313. .pvr_mask = 0xffff0000,
  314. .pvr_value = 0x003a0000,
  315. .cpu_name = "POWER5 (gr)",
  316. .cpu_features = CPU_FTRS_POWER5,
  317. .cpu_user_features = COMMON_USER_POWER5,
  318. .mmu_features = MMU_FTR_HPTE_TABLE,
  319. .icache_bsize = 128,
  320. .dcache_bsize = 128,
  321. .num_pmcs = 6,
  322. .pmc_type = PPC_PMC_IBM,
  323. .oprofile_cpu_type = "ppc64/power5",
  324. .oprofile_type = PPC_OPROFILE_POWER4,
  325. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  326. * and above but only works on POWER5 and above
  327. */
  328. .oprofile_mmcra_sihv = MMCRA_SIHV,
  329. .oprofile_mmcra_sipr = MMCRA_SIPR,
  330. .machine_check = machine_check_generic,
  331. .platform = "power5",
  332. },
  333. { /* Power5++ */
  334. .pvr_mask = 0xffffff00,
  335. .pvr_value = 0x003b0300,
  336. .cpu_name = "POWER5+ (gs)",
  337. .cpu_features = CPU_FTRS_POWER5,
  338. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  339. .mmu_features = MMU_FTR_HPTE_TABLE,
  340. .icache_bsize = 128,
  341. .dcache_bsize = 128,
  342. .num_pmcs = 6,
  343. .oprofile_cpu_type = "ppc64/power5++",
  344. .oprofile_type = PPC_OPROFILE_POWER4,
  345. .oprofile_mmcra_sihv = MMCRA_SIHV,
  346. .oprofile_mmcra_sipr = MMCRA_SIPR,
  347. .machine_check = machine_check_generic,
  348. .platform = "power5+",
  349. },
  350. { /* Power5 GS */
  351. .pvr_mask = 0xffff0000,
  352. .pvr_value = 0x003b0000,
  353. .cpu_name = "POWER5+ (gs)",
  354. .cpu_features = CPU_FTRS_POWER5,
  355. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  356. .mmu_features = MMU_FTR_HPTE_TABLE,
  357. .icache_bsize = 128,
  358. .dcache_bsize = 128,
  359. .num_pmcs = 6,
  360. .pmc_type = PPC_PMC_IBM,
  361. .oprofile_cpu_type = "ppc64/power5+",
  362. .oprofile_type = PPC_OPROFILE_POWER4,
  363. .oprofile_mmcra_sihv = MMCRA_SIHV,
  364. .oprofile_mmcra_sipr = MMCRA_SIPR,
  365. .machine_check = machine_check_generic,
  366. .platform = "power5+",
  367. },
  368. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  369. .pvr_mask = 0xffffffff,
  370. .pvr_value = 0x0f000001,
  371. .cpu_name = "POWER5+",
  372. .cpu_features = CPU_FTRS_POWER5,
  373. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  374. .mmu_features = MMU_FTR_HPTE_TABLE,
  375. .icache_bsize = 128,
  376. .dcache_bsize = 128,
  377. .machine_check = machine_check_generic,
  378. .oprofile_cpu_type = "ppc64/compat-power5+",
  379. .platform = "power5+",
  380. },
  381. { /* Power6 */
  382. .pvr_mask = 0xffff0000,
  383. .pvr_value = 0x003e0000,
  384. .cpu_name = "POWER6 (raw)",
  385. .cpu_features = CPU_FTRS_POWER6,
  386. .cpu_user_features = COMMON_USER_POWER6 |
  387. PPC_FEATURE_POWER6_EXT,
  388. .mmu_features = MMU_FTR_HPTE_TABLE,
  389. .icache_bsize = 128,
  390. .dcache_bsize = 128,
  391. .num_pmcs = 6,
  392. .pmc_type = PPC_PMC_IBM,
  393. .oprofile_cpu_type = "ppc64/power6",
  394. .oprofile_type = PPC_OPROFILE_POWER4,
  395. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  396. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  397. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  398. POWER6_MMCRA_OTHER,
  399. .machine_check = machine_check_generic,
  400. .platform = "power6x",
  401. },
  402. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  403. .pvr_mask = 0xffffffff,
  404. .pvr_value = 0x0f000002,
  405. .cpu_name = "POWER6 (architected)",
  406. .cpu_features = CPU_FTRS_POWER6,
  407. .cpu_user_features = COMMON_USER_POWER6,
  408. .mmu_features = MMU_FTR_HPTE_TABLE,
  409. .icache_bsize = 128,
  410. .dcache_bsize = 128,
  411. .machine_check = machine_check_generic,
  412. .oprofile_cpu_type = "ppc64/compat-power6",
  413. .platform = "power6",
  414. },
  415. { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
  416. .pvr_mask = 0xffffffff,
  417. .pvr_value = 0x0f000003,
  418. .cpu_name = "POWER7 (architected)",
  419. .cpu_features = CPU_FTRS_POWER7,
  420. .cpu_user_features = COMMON_USER_POWER7,
  421. .mmu_features = MMU_FTR_HPTE_TABLE,
  422. .icache_bsize = 128,
  423. .dcache_bsize = 128,
  424. .machine_check = machine_check_generic,
  425. .oprofile_cpu_type = "ppc64/compat-power7",
  426. .platform = "power7",
  427. },
  428. { /* Power7 */
  429. .pvr_mask = 0xffff0000,
  430. .pvr_value = 0x003f0000,
  431. .cpu_name = "POWER7 (raw)",
  432. .cpu_features = CPU_FTRS_POWER7,
  433. .cpu_user_features = COMMON_USER_POWER7,
  434. .mmu_features = MMU_FTR_HPTE_TABLE,
  435. .icache_bsize = 128,
  436. .dcache_bsize = 128,
  437. .num_pmcs = 6,
  438. .pmc_type = PPC_PMC_IBM,
  439. .cpu_setup = __setup_cpu_power7,
  440. .cpu_restore = __restore_cpu_power7,
  441. .oprofile_cpu_type = "ppc64/power7",
  442. .oprofile_type = PPC_OPROFILE_POWER4,
  443. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  444. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  445. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  446. POWER6_MMCRA_OTHER,
  447. .platform = "power7",
  448. },
  449. { /* Cell Broadband Engine */
  450. .pvr_mask = 0xffff0000,
  451. .pvr_value = 0x00700000,
  452. .cpu_name = "Cell Broadband Engine",
  453. .cpu_features = CPU_FTRS_CELL,
  454. .cpu_user_features = COMMON_USER_PPC64 |
  455. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  456. PPC_FEATURE_SMT,
  457. .mmu_features = MMU_FTR_HPTE_TABLE,
  458. .icache_bsize = 128,
  459. .dcache_bsize = 128,
  460. .num_pmcs = 4,
  461. .pmc_type = PPC_PMC_IBM,
  462. .oprofile_cpu_type = "ppc64/cell-be",
  463. .oprofile_type = PPC_OPROFILE_CELL,
  464. .machine_check = machine_check_generic,
  465. .platform = "ppc-cell-be",
  466. },
  467. { /* PA Semi PA6T */
  468. .pvr_mask = 0x7fff0000,
  469. .pvr_value = 0x00900000,
  470. .cpu_name = "PA6T",
  471. .cpu_features = CPU_FTRS_PA6T,
  472. .cpu_user_features = COMMON_USER_PA6T,
  473. .mmu_features = MMU_FTR_HPTE_TABLE,
  474. .icache_bsize = 64,
  475. .dcache_bsize = 64,
  476. .num_pmcs = 6,
  477. .pmc_type = PPC_PMC_PA6T,
  478. .cpu_setup = __setup_cpu_pa6t,
  479. .cpu_restore = __restore_cpu_pa6t,
  480. .oprofile_cpu_type = "ppc64/pa6t",
  481. .oprofile_type = PPC_OPROFILE_PA6T,
  482. .machine_check = machine_check_generic,
  483. .platform = "pa6t",
  484. },
  485. { /* default match */
  486. .pvr_mask = 0x00000000,
  487. .pvr_value = 0x00000000,
  488. .cpu_name = "POWER4 (compatible)",
  489. .cpu_features = CPU_FTRS_COMPATIBLE,
  490. .cpu_user_features = COMMON_USER_PPC64,
  491. .mmu_features = MMU_FTR_HPTE_TABLE,
  492. .icache_bsize = 128,
  493. .dcache_bsize = 128,
  494. .num_pmcs = 6,
  495. .pmc_type = PPC_PMC_IBM,
  496. .machine_check = machine_check_generic,
  497. .platform = "power4",
  498. }
  499. #endif /* CONFIG_PPC64 */
  500. #ifdef CONFIG_PPC32
  501. #if CLASSIC_PPC
  502. { /* 601 */
  503. .pvr_mask = 0xffff0000,
  504. .pvr_value = 0x00010000,
  505. .cpu_name = "601",
  506. .cpu_features = CPU_FTRS_PPC601,
  507. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  508. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  509. .mmu_features = MMU_FTR_HPTE_TABLE,
  510. .icache_bsize = 32,
  511. .dcache_bsize = 32,
  512. .machine_check = machine_check_generic,
  513. .platform = "ppc601",
  514. },
  515. { /* 603 */
  516. .pvr_mask = 0xffff0000,
  517. .pvr_value = 0x00030000,
  518. .cpu_name = "603",
  519. .cpu_features = CPU_FTRS_603,
  520. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  521. .mmu_features = 0,
  522. .icache_bsize = 32,
  523. .dcache_bsize = 32,
  524. .cpu_setup = __setup_cpu_603,
  525. .machine_check = machine_check_generic,
  526. .platform = "ppc603",
  527. },
  528. { /* 603e */
  529. .pvr_mask = 0xffff0000,
  530. .pvr_value = 0x00060000,
  531. .cpu_name = "603e",
  532. .cpu_features = CPU_FTRS_603,
  533. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  534. .mmu_features = 0,
  535. .icache_bsize = 32,
  536. .dcache_bsize = 32,
  537. .cpu_setup = __setup_cpu_603,
  538. .machine_check = machine_check_generic,
  539. .platform = "ppc603",
  540. },
  541. { /* 603ev */
  542. .pvr_mask = 0xffff0000,
  543. .pvr_value = 0x00070000,
  544. .cpu_name = "603ev",
  545. .cpu_features = CPU_FTRS_603,
  546. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  547. .mmu_features = 0,
  548. .icache_bsize = 32,
  549. .dcache_bsize = 32,
  550. .cpu_setup = __setup_cpu_603,
  551. .machine_check = machine_check_generic,
  552. .platform = "ppc603",
  553. },
  554. { /* 604 */
  555. .pvr_mask = 0xffff0000,
  556. .pvr_value = 0x00040000,
  557. .cpu_name = "604",
  558. .cpu_features = CPU_FTRS_604,
  559. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  560. .mmu_features = MMU_FTR_HPTE_TABLE,
  561. .icache_bsize = 32,
  562. .dcache_bsize = 32,
  563. .num_pmcs = 2,
  564. .cpu_setup = __setup_cpu_604,
  565. .machine_check = machine_check_generic,
  566. .platform = "ppc604",
  567. },
  568. { /* 604e */
  569. .pvr_mask = 0xfffff000,
  570. .pvr_value = 0x00090000,
  571. .cpu_name = "604e",
  572. .cpu_features = CPU_FTRS_604,
  573. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  574. .mmu_features = MMU_FTR_HPTE_TABLE,
  575. .icache_bsize = 32,
  576. .dcache_bsize = 32,
  577. .num_pmcs = 4,
  578. .cpu_setup = __setup_cpu_604,
  579. .machine_check = machine_check_generic,
  580. .platform = "ppc604",
  581. },
  582. { /* 604r */
  583. .pvr_mask = 0xffff0000,
  584. .pvr_value = 0x00090000,
  585. .cpu_name = "604r",
  586. .cpu_features = CPU_FTRS_604,
  587. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  588. .mmu_features = MMU_FTR_HPTE_TABLE,
  589. .icache_bsize = 32,
  590. .dcache_bsize = 32,
  591. .num_pmcs = 4,
  592. .cpu_setup = __setup_cpu_604,
  593. .machine_check = machine_check_generic,
  594. .platform = "ppc604",
  595. },
  596. { /* 604ev */
  597. .pvr_mask = 0xffff0000,
  598. .pvr_value = 0x000a0000,
  599. .cpu_name = "604ev",
  600. .cpu_features = CPU_FTRS_604,
  601. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  602. .mmu_features = MMU_FTR_HPTE_TABLE,
  603. .icache_bsize = 32,
  604. .dcache_bsize = 32,
  605. .num_pmcs = 4,
  606. .cpu_setup = __setup_cpu_604,
  607. .machine_check = machine_check_generic,
  608. .platform = "ppc604",
  609. },
  610. { /* 740/750 (0x4202, don't support TAU ?) */
  611. .pvr_mask = 0xffffffff,
  612. .pvr_value = 0x00084202,
  613. .cpu_name = "740/750",
  614. .cpu_features = CPU_FTRS_740_NOTAU,
  615. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  616. .mmu_features = MMU_FTR_HPTE_TABLE,
  617. .icache_bsize = 32,
  618. .dcache_bsize = 32,
  619. .num_pmcs = 4,
  620. .cpu_setup = __setup_cpu_750,
  621. .machine_check = machine_check_generic,
  622. .platform = "ppc750",
  623. },
  624. { /* 750CX (80100 and 8010x?) */
  625. .pvr_mask = 0xfffffff0,
  626. .pvr_value = 0x00080100,
  627. .cpu_name = "750CX",
  628. .cpu_features = CPU_FTRS_750,
  629. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  630. .mmu_features = MMU_FTR_HPTE_TABLE,
  631. .icache_bsize = 32,
  632. .dcache_bsize = 32,
  633. .num_pmcs = 4,
  634. .cpu_setup = __setup_cpu_750cx,
  635. .machine_check = machine_check_generic,
  636. .platform = "ppc750",
  637. },
  638. { /* 750CX (82201 and 82202) */
  639. .pvr_mask = 0xfffffff0,
  640. .pvr_value = 0x00082200,
  641. .cpu_name = "750CX",
  642. .cpu_features = CPU_FTRS_750,
  643. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  644. .mmu_features = MMU_FTR_HPTE_TABLE,
  645. .icache_bsize = 32,
  646. .dcache_bsize = 32,
  647. .num_pmcs = 4,
  648. .pmc_type = PPC_PMC_IBM,
  649. .cpu_setup = __setup_cpu_750cx,
  650. .machine_check = machine_check_generic,
  651. .platform = "ppc750",
  652. },
  653. { /* 750CXe (82214) */
  654. .pvr_mask = 0xfffffff0,
  655. .pvr_value = 0x00082210,
  656. .cpu_name = "750CXe",
  657. .cpu_features = CPU_FTRS_750,
  658. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  659. .mmu_features = MMU_FTR_HPTE_TABLE,
  660. .icache_bsize = 32,
  661. .dcache_bsize = 32,
  662. .num_pmcs = 4,
  663. .pmc_type = PPC_PMC_IBM,
  664. .cpu_setup = __setup_cpu_750cx,
  665. .machine_check = machine_check_generic,
  666. .platform = "ppc750",
  667. },
  668. { /* 750CXe "Gekko" (83214) */
  669. .pvr_mask = 0xffffffff,
  670. .pvr_value = 0x00083214,
  671. .cpu_name = "750CXe",
  672. .cpu_features = CPU_FTRS_750,
  673. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  674. .mmu_features = MMU_FTR_HPTE_TABLE,
  675. .icache_bsize = 32,
  676. .dcache_bsize = 32,
  677. .num_pmcs = 4,
  678. .pmc_type = PPC_PMC_IBM,
  679. .cpu_setup = __setup_cpu_750cx,
  680. .machine_check = machine_check_generic,
  681. .platform = "ppc750",
  682. },
  683. { /* 750CL */
  684. .pvr_mask = 0xfffff0f0,
  685. .pvr_value = 0x00087010,
  686. .cpu_name = "750CL",
  687. .cpu_features = CPU_FTRS_750CL,
  688. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  689. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  690. .icache_bsize = 32,
  691. .dcache_bsize = 32,
  692. .num_pmcs = 4,
  693. .pmc_type = PPC_PMC_IBM,
  694. .cpu_setup = __setup_cpu_750,
  695. .machine_check = machine_check_generic,
  696. .platform = "ppc750",
  697. },
  698. { /* 745/755 */
  699. .pvr_mask = 0xfffff000,
  700. .pvr_value = 0x00083000,
  701. .cpu_name = "745/755",
  702. .cpu_features = CPU_FTRS_750,
  703. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  704. .mmu_features = MMU_FTR_HPTE_TABLE,
  705. .icache_bsize = 32,
  706. .dcache_bsize = 32,
  707. .num_pmcs = 4,
  708. .pmc_type = PPC_PMC_IBM,
  709. .cpu_setup = __setup_cpu_750,
  710. .machine_check = machine_check_generic,
  711. .platform = "ppc750",
  712. },
  713. { /* 750FX rev 1.x */
  714. .pvr_mask = 0xffffff00,
  715. .pvr_value = 0x70000100,
  716. .cpu_name = "750FX",
  717. .cpu_features = CPU_FTRS_750FX1,
  718. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  719. .mmu_features = MMU_FTR_HPTE_TABLE,
  720. .icache_bsize = 32,
  721. .dcache_bsize = 32,
  722. .num_pmcs = 4,
  723. .pmc_type = PPC_PMC_IBM,
  724. .cpu_setup = __setup_cpu_750,
  725. .machine_check = machine_check_generic,
  726. .platform = "ppc750",
  727. .oprofile_cpu_type = "ppc/750",
  728. .oprofile_type = PPC_OPROFILE_G4,
  729. },
  730. { /* 750FX rev 2.0 must disable HID0[DPM] */
  731. .pvr_mask = 0xffffffff,
  732. .pvr_value = 0x70000200,
  733. .cpu_name = "750FX",
  734. .cpu_features = CPU_FTRS_750FX2,
  735. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  736. .mmu_features = MMU_FTR_HPTE_TABLE,
  737. .icache_bsize = 32,
  738. .dcache_bsize = 32,
  739. .num_pmcs = 4,
  740. .pmc_type = PPC_PMC_IBM,
  741. .cpu_setup = __setup_cpu_750,
  742. .machine_check = machine_check_generic,
  743. .platform = "ppc750",
  744. .oprofile_cpu_type = "ppc/750",
  745. .oprofile_type = PPC_OPROFILE_G4,
  746. },
  747. { /* 750FX (All revs except 2.0) */
  748. .pvr_mask = 0xffff0000,
  749. .pvr_value = 0x70000000,
  750. .cpu_name = "750FX",
  751. .cpu_features = CPU_FTRS_750FX,
  752. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  753. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  754. .icache_bsize = 32,
  755. .dcache_bsize = 32,
  756. .num_pmcs = 4,
  757. .pmc_type = PPC_PMC_IBM,
  758. .cpu_setup = __setup_cpu_750fx,
  759. .machine_check = machine_check_generic,
  760. .platform = "ppc750",
  761. .oprofile_cpu_type = "ppc/750",
  762. .oprofile_type = PPC_OPROFILE_G4,
  763. },
  764. { /* 750GX */
  765. .pvr_mask = 0xffff0000,
  766. .pvr_value = 0x70020000,
  767. .cpu_name = "750GX",
  768. .cpu_features = CPU_FTRS_750GX,
  769. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  770. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  771. .icache_bsize = 32,
  772. .dcache_bsize = 32,
  773. .num_pmcs = 4,
  774. .pmc_type = PPC_PMC_IBM,
  775. .cpu_setup = __setup_cpu_750fx,
  776. .machine_check = machine_check_generic,
  777. .platform = "ppc750",
  778. .oprofile_cpu_type = "ppc/750",
  779. .oprofile_type = PPC_OPROFILE_G4,
  780. },
  781. { /* 740/750 (L2CR bit need fixup for 740) */
  782. .pvr_mask = 0xffff0000,
  783. .pvr_value = 0x00080000,
  784. .cpu_name = "740/750",
  785. .cpu_features = CPU_FTRS_740,
  786. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  787. .mmu_features = MMU_FTR_HPTE_TABLE,
  788. .icache_bsize = 32,
  789. .dcache_bsize = 32,
  790. .num_pmcs = 4,
  791. .pmc_type = PPC_PMC_IBM,
  792. .cpu_setup = __setup_cpu_750,
  793. .machine_check = machine_check_generic,
  794. .platform = "ppc750",
  795. },
  796. { /* 7400 rev 1.1 ? (no TAU) */
  797. .pvr_mask = 0xffffffff,
  798. .pvr_value = 0x000c1101,
  799. .cpu_name = "7400 (1.1)",
  800. .cpu_features = CPU_FTRS_7400_NOTAU,
  801. .cpu_user_features = COMMON_USER |
  802. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  803. .mmu_features = MMU_FTR_HPTE_TABLE,
  804. .icache_bsize = 32,
  805. .dcache_bsize = 32,
  806. .num_pmcs = 4,
  807. .pmc_type = PPC_PMC_G4,
  808. .cpu_setup = __setup_cpu_7400,
  809. .machine_check = machine_check_generic,
  810. .platform = "ppc7400",
  811. },
  812. { /* 7400 */
  813. .pvr_mask = 0xffff0000,
  814. .pvr_value = 0x000c0000,
  815. .cpu_name = "7400",
  816. .cpu_features = CPU_FTRS_7400,
  817. .cpu_user_features = COMMON_USER |
  818. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  819. .mmu_features = MMU_FTR_HPTE_TABLE,
  820. .icache_bsize = 32,
  821. .dcache_bsize = 32,
  822. .num_pmcs = 4,
  823. .pmc_type = PPC_PMC_G4,
  824. .cpu_setup = __setup_cpu_7400,
  825. .machine_check = machine_check_generic,
  826. .platform = "ppc7400",
  827. },
  828. { /* 7410 */
  829. .pvr_mask = 0xffff0000,
  830. .pvr_value = 0x800c0000,
  831. .cpu_name = "7410",
  832. .cpu_features = CPU_FTRS_7400,
  833. .cpu_user_features = COMMON_USER |
  834. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  835. .mmu_features = MMU_FTR_HPTE_TABLE,
  836. .icache_bsize = 32,
  837. .dcache_bsize = 32,
  838. .num_pmcs = 4,
  839. .pmc_type = PPC_PMC_G4,
  840. .cpu_setup = __setup_cpu_7410,
  841. .machine_check = machine_check_generic,
  842. .platform = "ppc7400",
  843. },
  844. { /* 7450 2.0 - no doze/nap */
  845. .pvr_mask = 0xffffffff,
  846. .pvr_value = 0x80000200,
  847. .cpu_name = "7450",
  848. .cpu_features = CPU_FTRS_7450_20,
  849. .cpu_user_features = COMMON_USER |
  850. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  851. .mmu_features = MMU_FTR_HPTE_TABLE,
  852. .icache_bsize = 32,
  853. .dcache_bsize = 32,
  854. .num_pmcs = 6,
  855. .pmc_type = PPC_PMC_G4,
  856. .cpu_setup = __setup_cpu_745x,
  857. .oprofile_cpu_type = "ppc/7450",
  858. .oprofile_type = PPC_OPROFILE_G4,
  859. .machine_check = machine_check_generic,
  860. .platform = "ppc7450",
  861. },
  862. { /* 7450 2.1 */
  863. .pvr_mask = 0xffffffff,
  864. .pvr_value = 0x80000201,
  865. .cpu_name = "7450",
  866. .cpu_features = CPU_FTRS_7450_21,
  867. .cpu_user_features = COMMON_USER |
  868. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  869. .mmu_features = MMU_FTR_HPTE_TABLE,
  870. .icache_bsize = 32,
  871. .dcache_bsize = 32,
  872. .num_pmcs = 6,
  873. .pmc_type = PPC_PMC_G4,
  874. .cpu_setup = __setup_cpu_745x,
  875. .oprofile_cpu_type = "ppc/7450",
  876. .oprofile_type = PPC_OPROFILE_G4,
  877. .machine_check = machine_check_generic,
  878. .platform = "ppc7450",
  879. },
  880. { /* 7450 2.3 and newer */
  881. .pvr_mask = 0xffff0000,
  882. .pvr_value = 0x80000000,
  883. .cpu_name = "7450",
  884. .cpu_features = CPU_FTRS_7450_23,
  885. .cpu_user_features = COMMON_USER |
  886. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  887. .mmu_features = MMU_FTR_HPTE_TABLE,
  888. .icache_bsize = 32,
  889. .dcache_bsize = 32,
  890. .num_pmcs = 6,
  891. .pmc_type = PPC_PMC_G4,
  892. .cpu_setup = __setup_cpu_745x,
  893. .oprofile_cpu_type = "ppc/7450",
  894. .oprofile_type = PPC_OPROFILE_G4,
  895. .machine_check = machine_check_generic,
  896. .platform = "ppc7450",
  897. },
  898. { /* 7455 rev 1.x */
  899. .pvr_mask = 0xffffff00,
  900. .pvr_value = 0x80010100,
  901. .cpu_name = "7455",
  902. .cpu_features = CPU_FTRS_7455_1,
  903. .cpu_user_features = COMMON_USER |
  904. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  905. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  906. .icache_bsize = 32,
  907. .dcache_bsize = 32,
  908. .num_pmcs = 6,
  909. .pmc_type = PPC_PMC_G4,
  910. .cpu_setup = __setup_cpu_745x,
  911. .oprofile_cpu_type = "ppc/7450",
  912. .oprofile_type = PPC_OPROFILE_G4,
  913. .machine_check = machine_check_generic,
  914. .platform = "ppc7450",
  915. },
  916. { /* 7455 rev 2.0 */
  917. .pvr_mask = 0xffffffff,
  918. .pvr_value = 0x80010200,
  919. .cpu_name = "7455",
  920. .cpu_features = CPU_FTRS_7455_20,
  921. .cpu_user_features = COMMON_USER |
  922. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  923. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  924. .icache_bsize = 32,
  925. .dcache_bsize = 32,
  926. .num_pmcs = 6,
  927. .pmc_type = PPC_PMC_G4,
  928. .cpu_setup = __setup_cpu_745x,
  929. .oprofile_cpu_type = "ppc/7450",
  930. .oprofile_type = PPC_OPROFILE_G4,
  931. .machine_check = machine_check_generic,
  932. .platform = "ppc7450",
  933. },
  934. { /* 7455 others */
  935. .pvr_mask = 0xffff0000,
  936. .pvr_value = 0x80010000,
  937. .cpu_name = "7455",
  938. .cpu_features = CPU_FTRS_7455,
  939. .cpu_user_features = COMMON_USER |
  940. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  941. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  942. .icache_bsize = 32,
  943. .dcache_bsize = 32,
  944. .num_pmcs = 6,
  945. .pmc_type = PPC_PMC_G4,
  946. .cpu_setup = __setup_cpu_745x,
  947. .oprofile_cpu_type = "ppc/7450",
  948. .oprofile_type = PPC_OPROFILE_G4,
  949. .machine_check = machine_check_generic,
  950. .platform = "ppc7450",
  951. },
  952. { /* 7447/7457 Rev 1.0 */
  953. .pvr_mask = 0xffffffff,
  954. .pvr_value = 0x80020100,
  955. .cpu_name = "7447/7457",
  956. .cpu_features = CPU_FTRS_7447_10,
  957. .cpu_user_features = COMMON_USER |
  958. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  959. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  960. .icache_bsize = 32,
  961. .dcache_bsize = 32,
  962. .num_pmcs = 6,
  963. .pmc_type = PPC_PMC_G4,
  964. .cpu_setup = __setup_cpu_745x,
  965. .oprofile_cpu_type = "ppc/7450",
  966. .oprofile_type = PPC_OPROFILE_G4,
  967. .machine_check = machine_check_generic,
  968. .platform = "ppc7450",
  969. },
  970. { /* 7447/7457 Rev 1.1 */
  971. .pvr_mask = 0xffffffff,
  972. .pvr_value = 0x80020101,
  973. .cpu_name = "7447/7457",
  974. .cpu_features = CPU_FTRS_7447_10,
  975. .cpu_user_features = COMMON_USER |
  976. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  977. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  978. .icache_bsize = 32,
  979. .dcache_bsize = 32,
  980. .num_pmcs = 6,
  981. .pmc_type = PPC_PMC_G4,
  982. .cpu_setup = __setup_cpu_745x,
  983. .oprofile_cpu_type = "ppc/7450",
  984. .oprofile_type = PPC_OPROFILE_G4,
  985. .machine_check = machine_check_generic,
  986. .platform = "ppc7450",
  987. },
  988. { /* 7447/7457 Rev 1.2 and later */
  989. .pvr_mask = 0xffff0000,
  990. .pvr_value = 0x80020000,
  991. .cpu_name = "7447/7457",
  992. .cpu_features = CPU_FTRS_7447,
  993. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  994. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  995. .icache_bsize = 32,
  996. .dcache_bsize = 32,
  997. .num_pmcs = 6,
  998. .pmc_type = PPC_PMC_G4,
  999. .cpu_setup = __setup_cpu_745x,
  1000. .oprofile_cpu_type = "ppc/7450",
  1001. .oprofile_type = PPC_OPROFILE_G4,
  1002. .machine_check = machine_check_generic,
  1003. .platform = "ppc7450",
  1004. },
  1005. { /* 7447A */
  1006. .pvr_mask = 0xffff0000,
  1007. .pvr_value = 0x80030000,
  1008. .cpu_name = "7447A",
  1009. .cpu_features = CPU_FTRS_7447A,
  1010. .cpu_user_features = COMMON_USER |
  1011. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1012. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1013. .icache_bsize = 32,
  1014. .dcache_bsize = 32,
  1015. .num_pmcs = 6,
  1016. .pmc_type = PPC_PMC_G4,
  1017. .cpu_setup = __setup_cpu_745x,
  1018. .oprofile_cpu_type = "ppc/7450",
  1019. .oprofile_type = PPC_OPROFILE_G4,
  1020. .machine_check = machine_check_generic,
  1021. .platform = "ppc7450",
  1022. },
  1023. { /* 7448 */
  1024. .pvr_mask = 0xffff0000,
  1025. .pvr_value = 0x80040000,
  1026. .cpu_name = "7448",
  1027. .cpu_features = CPU_FTRS_7448,
  1028. .cpu_user_features = COMMON_USER |
  1029. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1030. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1031. .icache_bsize = 32,
  1032. .dcache_bsize = 32,
  1033. .num_pmcs = 6,
  1034. .pmc_type = PPC_PMC_G4,
  1035. .cpu_setup = __setup_cpu_745x,
  1036. .oprofile_cpu_type = "ppc/7450",
  1037. .oprofile_type = PPC_OPROFILE_G4,
  1038. .machine_check = machine_check_generic,
  1039. .platform = "ppc7450",
  1040. },
  1041. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  1042. .pvr_mask = 0x7fff0000,
  1043. .pvr_value = 0x00810000,
  1044. .cpu_name = "82xx",
  1045. .cpu_features = CPU_FTRS_82XX,
  1046. .cpu_user_features = COMMON_USER,
  1047. .mmu_features = 0,
  1048. .icache_bsize = 32,
  1049. .dcache_bsize = 32,
  1050. .cpu_setup = __setup_cpu_603,
  1051. .machine_check = machine_check_generic,
  1052. .platform = "ppc603",
  1053. },
  1054. { /* All G2_LE (603e core, plus some) have the same pvr */
  1055. .pvr_mask = 0x7fff0000,
  1056. .pvr_value = 0x00820000,
  1057. .cpu_name = "G2_LE",
  1058. .cpu_features = CPU_FTRS_G2_LE,
  1059. .cpu_user_features = COMMON_USER,
  1060. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1061. .icache_bsize = 32,
  1062. .dcache_bsize = 32,
  1063. .cpu_setup = __setup_cpu_603,
  1064. .machine_check = machine_check_generic,
  1065. .platform = "ppc603",
  1066. },
  1067. { /* e300c1 (a 603e core, plus some) on 83xx */
  1068. .pvr_mask = 0x7fff0000,
  1069. .pvr_value = 0x00830000,
  1070. .cpu_name = "e300c1",
  1071. .cpu_features = CPU_FTRS_E300,
  1072. .cpu_user_features = COMMON_USER,
  1073. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1074. .icache_bsize = 32,
  1075. .dcache_bsize = 32,
  1076. .cpu_setup = __setup_cpu_603,
  1077. .machine_check = machine_check_generic,
  1078. .platform = "ppc603",
  1079. },
  1080. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  1081. .pvr_mask = 0x7fff0000,
  1082. .pvr_value = 0x00840000,
  1083. .cpu_name = "e300c2",
  1084. .cpu_features = CPU_FTRS_E300C2,
  1085. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1086. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1087. MMU_FTR_NEED_DTLB_SW_LRU,
  1088. .icache_bsize = 32,
  1089. .dcache_bsize = 32,
  1090. .cpu_setup = __setup_cpu_603,
  1091. .machine_check = machine_check_generic,
  1092. .platform = "ppc603",
  1093. },
  1094. { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
  1095. .pvr_mask = 0x7fff0000,
  1096. .pvr_value = 0x00850000,
  1097. .cpu_name = "e300c3",
  1098. .cpu_features = CPU_FTRS_E300,
  1099. .cpu_user_features = COMMON_USER,
  1100. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1101. MMU_FTR_NEED_DTLB_SW_LRU,
  1102. .icache_bsize = 32,
  1103. .dcache_bsize = 32,
  1104. .cpu_setup = __setup_cpu_603,
  1105. .num_pmcs = 4,
  1106. .oprofile_cpu_type = "ppc/e300",
  1107. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1108. .platform = "ppc603",
  1109. },
  1110. { /* e300c4 (e300c1, plus one IU) */
  1111. .pvr_mask = 0x7fff0000,
  1112. .pvr_value = 0x00860000,
  1113. .cpu_name = "e300c4",
  1114. .cpu_features = CPU_FTRS_E300,
  1115. .cpu_user_features = COMMON_USER,
  1116. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1117. MMU_FTR_NEED_DTLB_SW_LRU,
  1118. .icache_bsize = 32,
  1119. .dcache_bsize = 32,
  1120. .cpu_setup = __setup_cpu_603,
  1121. .machine_check = machine_check_generic,
  1122. .num_pmcs = 4,
  1123. .oprofile_cpu_type = "ppc/e300",
  1124. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1125. .platform = "ppc603",
  1126. },
  1127. { /* default match, we assume split I/D cache & TB (non-601)... */
  1128. .pvr_mask = 0x00000000,
  1129. .pvr_value = 0x00000000,
  1130. .cpu_name = "(generic PPC)",
  1131. .cpu_features = CPU_FTRS_CLASSIC32,
  1132. .cpu_user_features = COMMON_USER,
  1133. .mmu_features = MMU_FTR_HPTE_TABLE,
  1134. .icache_bsize = 32,
  1135. .dcache_bsize = 32,
  1136. .machine_check = machine_check_generic,
  1137. .platform = "ppc603",
  1138. },
  1139. #endif /* CLASSIC_PPC */
  1140. #ifdef CONFIG_8xx
  1141. { /* 8xx */
  1142. .pvr_mask = 0xffff0000,
  1143. .pvr_value = 0x00500000,
  1144. .cpu_name = "8xx",
  1145. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  1146. * if the 8xx code is there.... */
  1147. .cpu_features = CPU_FTRS_8XX,
  1148. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1149. .mmu_features = MMU_FTR_TYPE_8xx,
  1150. .icache_bsize = 16,
  1151. .dcache_bsize = 16,
  1152. .platform = "ppc823",
  1153. },
  1154. #endif /* CONFIG_8xx */
  1155. #ifdef CONFIG_40x
  1156. { /* 403GC */
  1157. .pvr_mask = 0xffffff00,
  1158. .pvr_value = 0x00200200,
  1159. .cpu_name = "403GC",
  1160. .cpu_features = CPU_FTRS_40X,
  1161. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1162. .mmu_features = MMU_FTR_TYPE_40x,
  1163. .icache_bsize = 16,
  1164. .dcache_bsize = 16,
  1165. .machine_check = machine_check_4xx,
  1166. .platform = "ppc403",
  1167. },
  1168. { /* 403GCX */
  1169. .pvr_mask = 0xffffff00,
  1170. .pvr_value = 0x00201400,
  1171. .cpu_name = "403GCX",
  1172. .cpu_features = CPU_FTRS_40X,
  1173. .cpu_user_features = PPC_FEATURE_32 |
  1174. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  1175. .mmu_features = MMU_FTR_TYPE_40x,
  1176. .icache_bsize = 16,
  1177. .dcache_bsize = 16,
  1178. .machine_check = machine_check_4xx,
  1179. .platform = "ppc403",
  1180. },
  1181. { /* 403G ?? */
  1182. .pvr_mask = 0xffff0000,
  1183. .pvr_value = 0x00200000,
  1184. .cpu_name = "403G ??",
  1185. .cpu_features = CPU_FTRS_40X,
  1186. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1187. .mmu_features = MMU_FTR_TYPE_40x,
  1188. .icache_bsize = 16,
  1189. .dcache_bsize = 16,
  1190. .machine_check = machine_check_4xx,
  1191. .platform = "ppc403",
  1192. },
  1193. { /* 405GP */
  1194. .pvr_mask = 0xffff0000,
  1195. .pvr_value = 0x40110000,
  1196. .cpu_name = "405GP",
  1197. .cpu_features = CPU_FTRS_40X,
  1198. .cpu_user_features = PPC_FEATURE_32 |
  1199. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1200. .mmu_features = MMU_FTR_TYPE_40x,
  1201. .icache_bsize = 32,
  1202. .dcache_bsize = 32,
  1203. .machine_check = machine_check_4xx,
  1204. .platform = "ppc405",
  1205. },
  1206. { /* STB 03xxx */
  1207. .pvr_mask = 0xffff0000,
  1208. .pvr_value = 0x40130000,
  1209. .cpu_name = "STB03xxx",
  1210. .cpu_features = CPU_FTRS_40X,
  1211. .cpu_user_features = PPC_FEATURE_32 |
  1212. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1213. .mmu_features = MMU_FTR_TYPE_40x,
  1214. .icache_bsize = 32,
  1215. .dcache_bsize = 32,
  1216. .machine_check = machine_check_4xx,
  1217. .platform = "ppc405",
  1218. },
  1219. { /* STB 04xxx */
  1220. .pvr_mask = 0xffff0000,
  1221. .pvr_value = 0x41810000,
  1222. .cpu_name = "STB04xxx",
  1223. .cpu_features = CPU_FTRS_40X,
  1224. .cpu_user_features = PPC_FEATURE_32 |
  1225. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1226. .mmu_features = MMU_FTR_TYPE_40x,
  1227. .icache_bsize = 32,
  1228. .dcache_bsize = 32,
  1229. .machine_check = machine_check_4xx,
  1230. .platform = "ppc405",
  1231. },
  1232. { /* NP405L */
  1233. .pvr_mask = 0xffff0000,
  1234. .pvr_value = 0x41610000,
  1235. .cpu_name = "NP405L",
  1236. .cpu_features = CPU_FTRS_40X,
  1237. .cpu_user_features = PPC_FEATURE_32 |
  1238. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1239. .mmu_features = MMU_FTR_TYPE_40x,
  1240. .icache_bsize = 32,
  1241. .dcache_bsize = 32,
  1242. .machine_check = machine_check_4xx,
  1243. .platform = "ppc405",
  1244. },
  1245. { /* NP4GS3 */
  1246. .pvr_mask = 0xffff0000,
  1247. .pvr_value = 0x40B10000,
  1248. .cpu_name = "NP4GS3",
  1249. .cpu_features = CPU_FTRS_40X,
  1250. .cpu_user_features = PPC_FEATURE_32 |
  1251. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1252. .mmu_features = MMU_FTR_TYPE_40x,
  1253. .icache_bsize = 32,
  1254. .dcache_bsize = 32,
  1255. .machine_check = machine_check_4xx,
  1256. .platform = "ppc405",
  1257. },
  1258. { /* NP405H */
  1259. .pvr_mask = 0xffff0000,
  1260. .pvr_value = 0x41410000,
  1261. .cpu_name = "NP405H",
  1262. .cpu_features = CPU_FTRS_40X,
  1263. .cpu_user_features = PPC_FEATURE_32 |
  1264. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1265. .mmu_features = MMU_FTR_TYPE_40x,
  1266. .icache_bsize = 32,
  1267. .dcache_bsize = 32,
  1268. .machine_check = machine_check_4xx,
  1269. .platform = "ppc405",
  1270. },
  1271. { /* 405GPr */
  1272. .pvr_mask = 0xffff0000,
  1273. .pvr_value = 0x50910000,
  1274. .cpu_name = "405GPr",
  1275. .cpu_features = CPU_FTRS_40X,
  1276. .cpu_user_features = PPC_FEATURE_32 |
  1277. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1278. .mmu_features = MMU_FTR_TYPE_40x,
  1279. .icache_bsize = 32,
  1280. .dcache_bsize = 32,
  1281. .machine_check = machine_check_4xx,
  1282. .platform = "ppc405",
  1283. },
  1284. { /* STBx25xx */
  1285. .pvr_mask = 0xffff0000,
  1286. .pvr_value = 0x51510000,
  1287. .cpu_name = "STBx25xx",
  1288. .cpu_features = CPU_FTRS_40X,
  1289. .cpu_user_features = PPC_FEATURE_32 |
  1290. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1291. .mmu_features = MMU_FTR_TYPE_40x,
  1292. .icache_bsize = 32,
  1293. .dcache_bsize = 32,
  1294. .machine_check = machine_check_4xx,
  1295. .platform = "ppc405",
  1296. },
  1297. { /* 405LP */
  1298. .pvr_mask = 0xffff0000,
  1299. .pvr_value = 0x41F10000,
  1300. .cpu_name = "405LP",
  1301. .cpu_features = CPU_FTRS_40X,
  1302. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1303. .mmu_features = MMU_FTR_TYPE_40x,
  1304. .icache_bsize = 32,
  1305. .dcache_bsize = 32,
  1306. .machine_check = machine_check_4xx,
  1307. .platform = "ppc405",
  1308. },
  1309. { /* Xilinx Virtex-II Pro */
  1310. .pvr_mask = 0xfffff000,
  1311. .pvr_value = 0x20010000,
  1312. .cpu_name = "Virtex-II Pro",
  1313. .cpu_features = CPU_FTRS_40X,
  1314. .cpu_user_features = PPC_FEATURE_32 |
  1315. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1316. .mmu_features = MMU_FTR_TYPE_40x,
  1317. .icache_bsize = 32,
  1318. .dcache_bsize = 32,
  1319. .machine_check = machine_check_4xx,
  1320. .platform = "ppc405",
  1321. },
  1322. { /* Xilinx Virtex-4 FX */
  1323. .pvr_mask = 0xfffff000,
  1324. .pvr_value = 0x20011000,
  1325. .cpu_name = "Virtex-4 FX",
  1326. .cpu_features = CPU_FTRS_40X,
  1327. .cpu_user_features = PPC_FEATURE_32 |
  1328. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1329. .mmu_features = MMU_FTR_TYPE_40x,
  1330. .icache_bsize = 32,
  1331. .dcache_bsize = 32,
  1332. .machine_check = machine_check_4xx,
  1333. .platform = "ppc405",
  1334. },
  1335. { /* 405EP */
  1336. .pvr_mask = 0xffff0000,
  1337. .pvr_value = 0x51210000,
  1338. .cpu_name = "405EP",
  1339. .cpu_features = CPU_FTRS_40X,
  1340. .cpu_user_features = PPC_FEATURE_32 |
  1341. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1342. .mmu_features = MMU_FTR_TYPE_40x,
  1343. .icache_bsize = 32,
  1344. .dcache_bsize = 32,
  1345. .machine_check = machine_check_4xx,
  1346. .platform = "ppc405",
  1347. },
  1348. { /* 405EX */
  1349. .pvr_mask = 0xffff0004,
  1350. .pvr_value = 0x12910004,
  1351. .cpu_name = "405EX",
  1352. .cpu_features = CPU_FTRS_40X,
  1353. .cpu_user_features = PPC_FEATURE_32 |
  1354. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1355. .mmu_features = MMU_FTR_TYPE_40x,
  1356. .icache_bsize = 32,
  1357. .dcache_bsize = 32,
  1358. .machine_check = machine_check_4xx,
  1359. .platform = "ppc405",
  1360. },
  1361. { /* 405EXr */
  1362. .pvr_mask = 0xffff0004,
  1363. .pvr_value = 0x12910000,
  1364. .cpu_name = "405EXr",
  1365. .cpu_features = CPU_FTRS_40X,
  1366. .cpu_user_features = PPC_FEATURE_32 |
  1367. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1368. .mmu_features = MMU_FTR_TYPE_40x,
  1369. .icache_bsize = 32,
  1370. .dcache_bsize = 32,
  1371. .machine_check = machine_check_4xx,
  1372. .platform = "ppc405",
  1373. },
  1374. {
  1375. /* 405EZ */
  1376. .pvr_mask = 0xffff0000,
  1377. .pvr_value = 0x41510000,
  1378. .cpu_name = "405EZ",
  1379. .cpu_features = CPU_FTRS_40X,
  1380. .cpu_user_features = PPC_FEATURE_32 |
  1381. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1382. .mmu_features = MMU_FTR_TYPE_40x,
  1383. .icache_bsize = 32,
  1384. .dcache_bsize = 32,
  1385. .machine_check = machine_check_4xx,
  1386. .platform = "ppc405",
  1387. },
  1388. { /* default match */
  1389. .pvr_mask = 0x00000000,
  1390. .pvr_value = 0x00000000,
  1391. .cpu_name = "(generic 40x PPC)",
  1392. .cpu_features = CPU_FTRS_40X,
  1393. .cpu_user_features = PPC_FEATURE_32 |
  1394. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1395. .mmu_features = MMU_FTR_TYPE_40x,
  1396. .icache_bsize = 32,
  1397. .dcache_bsize = 32,
  1398. .machine_check = machine_check_4xx,
  1399. .platform = "ppc405",
  1400. }
  1401. #endif /* CONFIG_40x */
  1402. #ifdef CONFIG_44x
  1403. {
  1404. .pvr_mask = 0xf0000fff,
  1405. .pvr_value = 0x40000850,
  1406. .cpu_name = "440GR Rev. A",
  1407. .cpu_features = CPU_FTRS_44X,
  1408. .cpu_user_features = COMMON_USER_BOOKE,
  1409. .mmu_features = MMU_FTR_TYPE_44x,
  1410. .icache_bsize = 32,
  1411. .dcache_bsize = 32,
  1412. .machine_check = machine_check_4xx,
  1413. .platform = "ppc440",
  1414. },
  1415. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1416. .pvr_mask = 0xf0000fff,
  1417. .pvr_value = 0x40000858,
  1418. .cpu_name = "440EP Rev. A",
  1419. .cpu_features = CPU_FTRS_44X,
  1420. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1421. .mmu_features = MMU_FTR_TYPE_44x,
  1422. .icache_bsize = 32,
  1423. .dcache_bsize = 32,
  1424. .cpu_setup = __setup_cpu_440ep,
  1425. .machine_check = machine_check_4xx,
  1426. .platform = "ppc440",
  1427. },
  1428. {
  1429. .pvr_mask = 0xf0000fff,
  1430. .pvr_value = 0x400008d3,
  1431. .cpu_name = "440GR Rev. B",
  1432. .cpu_features = CPU_FTRS_44X,
  1433. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1434. .mmu_features = MMU_FTR_TYPE_44x,
  1435. .icache_bsize = 32,
  1436. .dcache_bsize = 32,
  1437. .machine_check = machine_check_4xx,
  1438. .platform = "ppc440",
  1439. },
  1440. { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1441. .pvr_mask = 0xf0000ff7,
  1442. .pvr_value = 0x400008d4,
  1443. .cpu_name = "440EP Rev. C",
  1444. .cpu_features = CPU_FTRS_44X,
  1445. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1446. .mmu_features = MMU_FTR_TYPE_44x,
  1447. .icache_bsize = 32,
  1448. .dcache_bsize = 32,
  1449. .cpu_setup = __setup_cpu_440ep,
  1450. .machine_check = machine_check_4xx,
  1451. .platform = "ppc440",
  1452. },
  1453. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1454. .pvr_mask = 0xf0000fff,
  1455. .pvr_value = 0x400008db,
  1456. .cpu_name = "440EP Rev. B",
  1457. .cpu_features = CPU_FTRS_44X,
  1458. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1459. .mmu_features = MMU_FTR_TYPE_44x,
  1460. .icache_bsize = 32,
  1461. .dcache_bsize = 32,
  1462. .cpu_setup = __setup_cpu_440ep,
  1463. .machine_check = machine_check_4xx,
  1464. .platform = "ppc440",
  1465. },
  1466. { /* 440GRX */
  1467. .pvr_mask = 0xf0000ffb,
  1468. .pvr_value = 0x200008D0,
  1469. .cpu_name = "440GRX",
  1470. .cpu_features = CPU_FTRS_44X,
  1471. .cpu_user_features = COMMON_USER_BOOKE,
  1472. .mmu_features = MMU_FTR_TYPE_44x,
  1473. .icache_bsize = 32,
  1474. .dcache_bsize = 32,
  1475. .cpu_setup = __setup_cpu_440grx,
  1476. .machine_check = machine_check_440A,
  1477. .platform = "ppc440",
  1478. },
  1479. { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
  1480. .pvr_mask = 0xf0000ffb,
  1481. .pvr_value = 0x200008D8,
  1482. .cpu_name = "440EPX",
  1483. .cpu_features = CPU_FTRS_44X,
  1484. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1485. .mmu_features = MMU_FTR_TYPE_44x,
  1486. .icache_bsize = 32,
  1487. .dcache_bsize = 32,
  1488. .cpu_setup = __setup_cpu_440epx,
  1489. .machine_check = machine_check_440A,
  1490. .platform = "ppc440",
  1491. },
  1492. { /* 440GP Rev. B */
  1493. .pvr_mask = 0xf0000fff,
  1494. .pvr_value = 0x40000440,
  1495. .cpu_name = "440GP Rev. B",
  1496. .cpu_features = CPU_FTRS_44X,
  1497. .cpu_user_features = COMMON_USER_BOOKE,
  1498. .mmu_features = MMU_FTR_TYPE_44x,
  1499. .icache_bsize = 32,
  1500. .dcache_bsize = 32,
  1501. .machine_check = machine_check_4xx,
  1502. .platform = "ppc440gp",
  1503. },
  1504. { /* 440GP Rev. C */
  1505. .pvr_mask = 0xf0000fff,
  1506. .pvr_value = 0x40000481,
  1507. .cpu_name = "440GP Rev. C",
  1508. .cpu_features = CPU_FTRS_44X,
  1509. .cpu_user_features = COMMON_USER_BOOKE,
  1510. .mmu_features = MMU_FTR_TYPE_44x,
  1511. .icache_bsize = 32,
  1512. .dcache_bsize = 32,
  1513. .machine_check = machine_check_4xx,
  1514. .platform = "ppc440gp",
  1515. },
  1516. { /* 440GX Rev. A */
  1517. .pvr_mask = 0xf0000fff,
  1518. .pvr_value = 0x50000850,
  1519. .cpu_name = "440GX Rev. A",
  1520. .cpu_features = CPU_FTRS_44X,
  1521. .cpu_user_features = COMMON_USER_BOOKE,
  1522. .mmu_features = MMU_FTR_TYPE_44x,
  1523. .icache_bsize = 32,
  1524. .dcache_bsize = 32,
  1525. .cpu_setup = __setup_cpu_440gx,
  1526. .machine_check = machine_check_440A,
  1527. .platform = "ppc440",
  1528. },
  1529. { /* 440GX Rev. B */
  1530. .pvr_mask = 0xf0000fff,
  1531. .pvr_value = 0x50000851,
  1532. .cpu_name = "440GX Rev. B",
  1533. .cpu_features = CPU_FTRS_44X,
  1534. .cpu_user_features = COMMON_USER_BOOKE,
  1535. .mmu_features = MMU_FTR_TYPE_44x,
  1536. .icache_bsize = 32,
  1537. .dcache_bsize = 32,
  1538. .cpu_setup = __setup_cpu_440gx,
  1539. .machine_check = machine_check_440A,
  1540. .platform = "ppc440",
  1541. },
  1542. { /* 440GX Rev. C */
  1543. .pvr_mask = 0xf0000fff,
  1544. .pvr_value = 0x50000892,
  1545. .cpu_name = "440GX Rev. C",
  1546. .cpu_features = CPU_FTRS_44X,
  1547. .cpu_user_features = COMMON_USER_BOOKE,
  1548. .mmu_features = MMU_FTR_TYPE_44x,
  1549. .icache_bsize = 32,
  1550. .dcache_bsize = 32,
  1551. .cpu_setup = __setup_cpu_440gx,
  1552. .machine_check = machine_check_440A,
  1553. .platform = "ppc440",
  1554. },
  1555. { /* 440GX Rev. F */
  1556. .pvr_mask = 0xf0000fff,
  1557. .pvr_value = 0x50000894,
  1558. .cpu_name = "440GX Rev. F",
  1559. .cpu_features = CPU_FTRS_44X,
  1560. .cpu_user_features = COMMON_USER_BOOKE,
  1561. .mmu_features = MMU_FTR_TYPE_44x,
  1562. .icache_bsize = 32,
  1563. .dcache_bsize = 32,
  1564. .cpu_setup = __setup_cpu_440gx,
  1565. .machine_check = machine_check_440A,
  1566. .platform = "ppc440",
  1567. },
  1568. { /* 440SP Rev. A */
  1569. .pvr_mask = 0xfff00fff,
  1570. .pvr_value = 0x53200891,
  1571. .cpu_name = "440SP Rev. A",
  1572. .cpu_features = CPU_FTRS_44X,
  1573. .cpu_user_features = COMMON_USER_BOOKE,
  1574. .mmu_features = MMU_FTR_TYPE_44x,
  1575. .icache_bsize = 32,
  1576. .dcache_bsize = 32,
  1577. .machine_check = machine_check_4xx,
  1578. .platform = "ppc440",
  1579. },
  1580. { /* 440SPe Rev. A */
  1581. .pvr_mask = 0xfff00fff,
  1582. .pvr_value = 0x53400890,
  1583. .cpu_name = "440SPe Rev. A",
  1584. .cpu_features = CPU_FTRS_44X,
  1585. .cpu_user_features = COMMON_USER_BOOKE,
  1586. .mmu_features = MMU_FTR_TYPE_44x,
  1587. .icache_bsize = 32,
  1588. .dcache_bsize = 32,
  1589. .cpu_setup = __setup_cpu_440spe,
  1590. .machine_check = machine_check_440A,
  1591. .platform = "ppc440",
  1592. },
  1593. { /* 440SPe Rev. B */
  1594. .pvr_mask = 0xfff00fff,
  1595. .pvr_value = 0x53400891,
  1596. .cpu_name = "440SPe Rev. B",
  1597. .cpu_features = CPU_FTRS_44X,
  1598. .cpu_user_features = COMMON_USER_BOOKE,
  1599. .mmu_features = MMU_FTR_TYPE_44x,
  1600. .icache_bsize = 32,
  1601. .dcache_bsize = 32,
  1602. .cpu_setup = __setup_cpu_440spe,
  1603. .machine_check = machine_check_440A,
  1604. .platform = "ppc440",
  1605. },
  1606. { /* 440 in Xilinx Virtex-5 FXT */
  1607. .pvr_mask = 0xfffffff0,
  1608. .pvr_value = 0x7ff21910,
  1609. .cpu_name = "440 in Virtex-5 FXT",
  1610. .cpu_features = CPU_FTRS_44X,
  1611. .cpu_user_features = COMMON_USER_BOOKE,
  1612. .mmu_features = MMU_FTR_TYPE_44x,
  1613. .icache_bsize = 32,
  1614. .dcache_bsize = 32,
  1615. .cpu_setup = __setup_cpu_440x5,
  1616. .machine_check = machine_check_440A,
  1617. .platform = "ppc440",
  1618. },
  1619. { /* 460EX */
  1620. .pvr_mask = 0xffff0002,
  1621. .pvr_value = 0x13020002,
  1622. .cpu_name = "460EX",
  1623. .cpu_features = CPU_FTRS_440x6,
  1624. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1625. .mmu_features = MMU_FTR_TYPE_44x,
  1626. .icache_bsize = 32,
  1627. .dcache_bsize = 32,
  1628. .cpu_setup = __setup_cpu_460ex,
  1629. .machine_check = machine_check_440A,
  1630. .platform = "ppc440",
  1631. },
  1632. { /* 460GT */
  1633. .pvr_mask = 0xffff0002,
  1634. .pvr_value = 0x13020000,
  1635. .cpu_name = "460GT",
  1636. .cpu_features = CPU_FTRS_440x6,
  1637. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1638. .mmu_features = MMU_FTR_TYPE_44x,
  1639. .icache_bsize = 32,
  1640. .dcache_bsize = 32,
  1641. .cpu_setup = __setup_cpu_460gt,
  1642. .machine_check = machine_check_440A,
  1643. .platform = "ppc440",
  1644. },
  1645. { /* 460SX */
  1646. .pvr_mask = 0xffffff00,
  1647. .pvr_value = 0x13541800,
  1648. .cpu_name = "460SX",
  1649. .cpu_features = CPU_FTRS_44X,
  1650. .cpu_user_features = COMMON_USER_BOOKE,
  1651. .mmu_features = MMU_FTR_TYPE_44x,
  1652. .icache_bsize = 32,
  1653. .dcache_bsize = 32,
  1654. .cpu_setup = __setup_cpu_460sx,
  1655. .machine_check = machine_check_440A,
  1656. .platform = "ppc440",
  1657. },
  1658. { /* default match */
  1659. .pvr_mask = 0x00000000,
  1660. .pvr_value = 0x00000000,
  1661. .cpu_name = "(generic 44x PPC)",
  1662. .cpu_features = CPU_FTRS_44X,
  1663. .cpu_user_features = COMMON_USER_BOOKE,
  1664. .mmu_features = MMU_FTR_TYPE_44x,
  1665. .icache_bsize = 32,
  1666. .dcache_bsize = 32,
  1667. .machine_check = machine_check_4xx,
  1668. .platform = "ppc440",
  1669. }
  1670. #endif /* CONFIG_44x */
  1671. #ifdef CONFIG_E200
  1672. { /* e200z5 */
  1673. .pvr_mask = 0xfff00000,
  1674. .pvr_value = 0x81000000,
  1675. .cpu_name = "e200z5",
  1676. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1677. .cpu_features = CPU_FTRS_E200,
  1678. .cpu_user_features = COMMON_USER_BOOKE |
  1679. PPC_FEATURE_HAS_EFP_SINGLE |
  1680. PPC_FEATURE_UNIFIED_CACHE,
  1681. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1682. .dcache_bsize = 32,
  1683. .machine_check = machine_check_e200,
  1684. .platform = "ppc5554",
  1685. },
  1686. { /* e200z6 */
  1687. .pvr_mask = 0xfff00000,
  1688. .pvr_value = 0x81100000,
  1689. .cpu_name = "e200z6",
  1690. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1691. .cpu_features = CPU_FTRS_E200,
  1692. .cpu_user_features = COMMON_USER_BOOKE |
  1693. PPC_FEATURE_HAS_SPE_COMP |
  1694. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1695. PPC_FEATURE_UNIFIED_CACHE,
  1696. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1697. .dcache_bsize = 32,
  1698. .machine_check = machine_check_e200,
  1699. .platform = "ppc5554",
  1700. },
  1701. { /* default match */
  1702. .pvr_mask = 0x00000000,
  1703. .pvr_value = 0x00000000,
  1704. .cpu_name = "(generic E200 PPC)",
  1705. .cpu_features = CPU_FTRS_E200,
  1706. .cpu_user_features = COMMON_USER_BOOKE |
  1707. PPC_FEATURE_HAS_EFP_SINGLE |
  1708. PPC_FEATURE_UNIFIED_CACHE,
  1709. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1710. .dcache_bsize = 32,
  1711. .cpu_setup = __setup_cpu_e200,
  1712. .machine_check = machine_check_e200,
  1713. .platform = "ppc5554",
  1714. }
  1715. #endif /* CONFIG_E200 */
  1716. #ifdef CONFIG_E500
  1717. { /* e500 */
  1718. .pvr_mask = 0xffff0000,
  1719. .pvr_value = 0x80200000,
  1720. .cpu_name = "e500",
  1721. .cpu_features = CPU_FTRS_E500,
  1722. .cpu_user_features = COMMON_USER_BOOKE |
  1723. PPC_FEATURE_HAS_SPE_COMP |
  1724. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1725. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1726. .icache_bsize = 32,
  1727. .dcache_bsize = 32,
  1728. .num_pmcs = 4,
  1729. .oprofile_cpu_type = "ppc/e500",
  1730. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1731. .cpu_setup = __setup_cpu_e500v1,
  1732. .machine_check = machine_check_e500,
  1733. .platform = "ppc8540",
  1734. },
  1735. { /* e500v2 */
  1736. .pvr_mask = 0xffff0000,
  1737. .pvr_value = 0x80210000,
  1738. .cpu_name = "e500v2",
  1739. .cpu_features = CPU_FTRS_E500_2,
  1740. .cpu_user_features = COMMON_USER_BOOKE |
  1741. PPC_FEATURE_HAS_SPE_COMP |
  1742. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1743. PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
  1744. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1745. .icache_bsize = 32,
  1746. .dcache_bsize = 32,
  1747. .num_pmcs = 4,
  1748. .oprofile_cpu_type = "ppc/e500",
  1749. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1750. .cpu_setup = __setup_cpu_e500v2,
  1751. .machine_check = machine_check_e500,
  1752. .platform = "ppc8548",
  1753. },
  1754. { /* e500mc */
  1755. .pvr_mask = 0xffff0000,
  1756. .pvr_value = 0x80230000,
  1757. .cpu_name = "e500mc",
  1758. .cpu_features = CPU_FTRS_E500MC,
  1759. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1760. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  1761. MMU_FTR_USE_TLBILX,
  1762. .icache_bsize = 64,
  1763. .dcache_bsize = 64,
  1764. .num_pmcs = 4,
  1765. .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
  1766. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1767. .cpu_setup = __setup_cpu_e500mc,
  1768. .machine_check = machine_check_e500,
  1769. .platform = "ppce500mc",
  1770. },
  1771. { /* default match */
  1772. .pvr_mask = 0x00000000,
  1773. .pvr_value = 0x00000000,
  1774. .cpu_name = "(generic E500 PPC)",
  1775. .cpu_features = CPU_FTRS_E500,
  1776. .cpu_user_features = COMMON_USER_BOOKE |
  1777. PPC_FEATURE_HAS_SPE_COMP |
  1778. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1779. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1780. .icache_bsize = 32,
  1781. .dcache_bsize = 32,
  1782. .machine_check = machine_check_e500,
  1783. .platform = "powerpc",
  1784. }
  1785. #endif /* CONFIG_E500 */
  1786. #endif /* CONFIG_PPC32 */
  1787. };
  1788. static struct cpu_spec the_cpu_spec;
  1789. static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
  1790. {
  1791. struct cpu_spec *t = &the_cpu_spec;
  1792. struct cpu_spec old;
  1793. t = PTRRELOC(t);
  1794. old = *t;
  1795. /* Copy everything, then do fixups */
  1796. *t = *s;
  1797. /*
  1798. * If we are overriding a previous value derived from the real
  1799. * PVR with a new value obtained using a logical PVR value,
  1800. * don't modify the performance monitor fields.
  1801. */
  1802. if (old.num_pmcs && !s->num_pmcs) {
  1803. t->num_pmcs = old.num_pmcs;
  1804. t->pmc_type = old.pmc_type;
  1805. t->oprofile_type = old.oprofile_type;
  1806. t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
  1807. t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
  1808. t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
  1809. /*
  1810. * If we have passed through this logic once before and
  1811. * have pulled the default case because the real PVR was
  1812. * not found inside cpu_specs[], then we are possibly
  1813. * running in compatibility mode. In that case, let the
  1814. * oprofiler know which set of compatibility counters to
  1815. * pull from by making sure the oprofile_cpu_type string
  1816. * is set to that of compatibility mode. If the
  1817. * oprofile_cpu_type already has a value, then we are
  1818. * possibly overriding a real PVR with a logical one,
  1819. * and, in that case, keep the current value for
  1820. * oprofile_cpu_type.
  1821. */
  1822. if (old.oprofile_cpu_type == NULL)
  1823. t->oprofile_cpu_type = s->oprofile_cpu_type;
  1824. }
  1825. *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
  1826. /*
  1827. * Set the base platform string once; assumes
  1828. * we're called with real pvr first.
  1829. */
  1830. if (*PTRRELOC(&powerpc_base_platform) == NULL)
  1831. *PTRRELOC(&powerpc_base_platform) = t->platform;
  1832. #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
  1833. /* ppc64 and booke expect identify_cpu to also call setup_cpu for
  1834. * that processor. I will consolidate that at a later time, for now,
  1835. * just use #ifdef. We also don't need to PTRRELOC the function
  1836. * pointer on ppc64 and booke as we are running at 0 in real mode
  1837. * on ppc64 and reloc_offset is always 0 on booke.
  1838. */
  1839. if (s->cpu_setup) {
  1840. s->cpu_setup(offset, s);
  1841. }
  1842. #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
  1843. }
  1844. struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
  1845. {
  1846. struct cpu_spec *s = cpu_specs;
  1847. int i;
  1848. s = PTRRELOC(s);
  1849. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
  1850. if ((pvr & s->pvr_mask) == s->pvr_value) {
  1851. setup_cpu_spec(offset, s);
  1852. return s;
  1853. }
  1854. }
  1855. BUG();
  1856. return NULL;
  1857. }