tlbflush.h 4.6 KB

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  1. #ifndef _ASM_POWERPC_TLBFLUSH_H
  2. #define _ASM_POWERPC_TLBFLUSH_H
  3. /*
  4. * TLB flushing:
  5. *
  6. * - flush_tlb_mm(mm) flushes the specified mm context TLB's
  7. * - flush_tlb_page(vma, vmaddr) flushes one page
  8. * - local_flush_tlb_mm(mm) flushes the specified mm context on
  9. * the local processor
  10. * - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
  11. * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
  12. * - flush_tlb_range(vma, start, end) flushes a range of pages
  13. * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #ifdef __KERNEL__
  21. #ifdef CONFIG_PPC_MMU_NOHASH
  22. /*
  23. * TLB flushing for software loaded TLB chips
  24. *
  25. * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
  26. * flush_tlb_kernel_range are best implemented as tlbia vs
  27. * specific tlbie's
  28. */
  29. #include <linux/mm.h>
  30. #define MMU_NO_CONTEXT ((unsigned int)-1)
  31. extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  32. unsigned long end);
  33. extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  34. extern void local_flush_tlb_mm(struct mm_struct *mm);
  35. extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  36. #ifdef CONFIG_SMP
  37. extern void flush_tlb_mm(struct mm_struct *mm);
  38. extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  39. #else
  40. #define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
  41. #define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
  42. #endif
  43. #define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
  44. #elif defined(CONFIG_PPC_STD_MMU_32)
  45. /*
  46. * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
  47. */
  48. extern void flush_tlb_mm(struct mm_struct *mm);
  49. extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  50. extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
  51. extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  52. unsigned long end);
  53. extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  54. static inline void local_flush_tlb_page(struct vm_area_struct *vma,
  55. unsigned long vmaddr)
  56. {
  57. flush_tlb_page(vma, vmaddr);
  58. }
  59. static inline void local_flush_tlb_mm(struct mm_struct *mm)
  60. {
  61. flush_tlb_mm(mm);
  62. }
  63. #elif defined(CONFIG_PPC_STD_MMU_64)
  64. /*
  65. * TLB flushing for 64-bit hash-MMU CPUs
  66. */
  67. #include <linux/percpu.h>
  68. #include <asm/page.h>
  69. #define PPC64_TLB_BATCH_NR 192
  70. struct ppc64_tlb_batch {
  71. int active;
  72. unsigned long index;
  73. struct mm_struct *mm;
  74. real_pte_t pte[PPC64_TLB_BATCH_NR];
  75. unsigned long vaddr[PPC64_TLB_BATCH_NR];
  76. unsigned int psize;
  77. int ssize;
  78. };
  79. DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  80. extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
  81. extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  82. pte_t *ptep, unsigned long pte, int huge);
  83. #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
  84. static inline void arch_enter_lazy_mmu_mode(void)
  85. {
  86. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  87. batch->active = 1;
  88. }
  89. static inline void arch_leave_lazy_mmu_mode(void)
  90. {
  91. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  92. if (batch->index)
  93. __flush_tlb_pending(batch);
  94. batch->active = 0;
  95. }
  96. #define arch_flush_lazy_mmu_mode() do {} while (0)
  97. extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
  98. int ssize, int local);
  99. extern void flush_hash_range(unsigned long number, int local);
  100. static inline void local_flush_tlb_mm(struct mm_struct *mm)
  101. {
  102. }
  103. static inline void flush_tlb_mm(struct mm_struct *mm)
  104. {
  105. }
  106. static inline void local_flush_tlb_page(struct vm_area_struct *vma,
  107. unsigned long vmaddr)
  108. {
  109. }
  110. static inline void flush_tlb_page(struct vm_area_struct *vma,
  111. unsigned long vmaddr)
  112. {
  113. }
  114. static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
  115. unsigned long vmaddr)
  116. {
  117. }
  118. static inline void flush_tlb_range(struct vm_area_struct *vma,
  119. unsigned long start, unsigned long end)
  120. {
  121. }
  122. static inline void flush_tlb_kernel_range(unsigned long start,
  123. unsigned long end)
  124. {
  125. }
  126. /* Private function for use by PCI IO mapping code */
  127. extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
  128. unsigned long end);
  129. #else
  130. #error Unsupported MMU type
  131. #endif
  132. #endif /*__KERNEL__ */
  133. #endif /* _ASM_POWERPC_TLBFLUSH_H */