pte-hash64.h 2.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354
  1. #ifndef _ASM_POWERPC_PTE_HASH64_H
  2. #define _ASM_POWERPC_PTE_HASH64_H
  3. #ifdef __KERNEL__
  4. /*
  5. * Common bits between 4K and 64K pages in a linux-style PTE.
  6. * These match the bits in the (hardware-defined) PowerPC PTE as closely
  7. * as possible. Additional bits may be defined in pgtable-hash64-*.h
  8. *
  9. * Note: We only support user read/write permissions. Supervisor always
  10. * have full read/write to pages above PAGE_OFFSET (pages below that
  11. * always use the user access permissions).
  12. *
  13. * We could create separate kernel read-only if we used the 3 PP bits
  14. * combinations that newer processors provide but we currently don't.
  15. */
  16. #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
  17. #define _PAGE_USER 0x0002 /* matches one of the PP bits */
  18. #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
  19. #define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
  20. #define _PAGE_GUARDED 0x0008
  21. #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
  22. #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
  23. #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
  24. #define _PAGE_DIRTY 0x0080 /* C: page changed */
  25. #define _PAGE_ACCESSED 0x0100 /* R: page referenced */
  26. #define _PAGE_RW 0x0200 /* software: user write access allowed */
  27. #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
  28. /* No separate kernel read-only */
  29. #define _PAGE_KERNEL_RW (_PAGE_RW | _PAGE_DIRTY) /* user access blocked by key */
  30. #define _PAGE_KERNEL_RO _PAGE_KERNEL_RW
  31. /* Strong Access Ordering */
  32. #define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
  33. /* No page size encoding in the linux PTE */
  34. #define _PAGE_PSIZE 0
  35. /* PTEIDX nibble */
  36. #define _PTEIDX_SECONDARY 0x8
  37. #define _PTEIDX_GROUP_IX 0x7
  38. /* Hash table based platforms need atomic updates of the linux PTE */
  39. #define PTE_ATOMIC_UPDATES 1
  40. #ifdef CONFIG_PPC_64K_PAGES
  41. #include <asm/pte-hash64-64k.h>
  42. #else
  43. #include <asm/pte-hash64-4k.h>
  44. #endif
  45. #endif /* __KERNEL__ */
  46. #endif /* _ASM_POWERPC_PTE_HASH64_H */