mmu-hash32.h 2.0 KB

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  1. #ifndef _ASM_POWERPC_MMU_HASH32_H_
  2. #define _ASM_POWERPC_MMU_HASH32_H_
  3. /*
  4. * 32-bit hash table MMU support
  5. */
  6. /*
  7. * BATs
  8. */
  9. /* Block size masks */
  10. #define BL_128K 0x000
  11. #define BL_256K 0x001
  12. #define BL_512K 0x003
  13. #define BL_1M 0x007
  14. #define BL_2M 0x00F
  15. #define BL_4M 0x01F
  16. #define BL_8M 0x03F
  17. #define BL_16M 0x07F
  18. #define BL_32M 0x0FF
  19. #define BL_64M 0x1FF
  20. #define BL_128M 0x3FF
  21. #define BL_256M 0x7FF
  22. /* BAT Access Protection */
  23. #define BPP_XX 0x00 /* No access */
  24. #define BPP_RX 0x01 /* Read only */
  25. #define BPP_RW 0x02 /* Read/write */
  26. #ifndef __ASSEMBLY__
  27. /* Contort a phys_addr_t into the right format/bits for a BAT */
  28. #ifdef CONFIG_PHYS_64BIT
  29. #define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \
  30. ((x & 0x0000000e00000000ULL) >> 24) | \
  31. ((x & 0x0000000100000000ULL) >> 30)))
  32. #else
  33. #define BAT_PHYS_ADDR(x) (x)
  34. #endif
  35. struct ppc_bat {
  36. u32 batu;
  37. u32 batl;
  38. };
  39. #endif /* !__ASSEMBLY__ */
  40. /*
  41. * Hash table
  42. */
  43. /* Values for PP (assumes Ks=0, Kp=1) */
  44. #define PP_RWXX 0 /* Supervisor read/write, User none */
  45. #define PP_RWRX 1 /* Supervisor read/write, User read */
  46. #define PP_RWRW 2 /* Supervisor read/write, User read/write */
  47. #define PP_RXRX 3 /* Supervisor read, User read */
  48. #ifndef __ASSEMBLY__
  49. /* Hardware Page Table Entry */
  50. struct hash_pte {
  51. unsigned long v:1; /* Entry is valid */
  52. unsigned long vsid:24; /* Virtual segment identifier */
  53. unsigned long h:1; /* Hash algorithm indicator */
  54. unsigned long api:6; /* Abbreviated page index */
  55. unsigned long rpn:20; /* Real (physical) page number */
  56. unsigned long :3; /* Unused */
  57. unsigned long r:1; /* Referenced */
  58. unsigned long c:1; /* Changed */
  59. unsigned long w:1; /* Write-thru cache mode */
  60. unsigned long i:1; /* Cache inhibited */
  61. unsigned long m:1; /* Memory coherence */
  62. unsigned long g:1; /* Guarded */
  63. unsigned long :1; /* Unused */
  64. unsigned long pp:2; /* Page protection */
  65. };
  66. typedef struct {
  67. unsigned long id;
  68. unsigned long vdso_base;
  69. } mm_context_t;
  70. #endif /* !__ASSEMBLY__ */
  71. #endif /* _ASM_POWERPC_MMU_HASH32_H_ */