ksi8560.dts 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334
  1. /*
  2. * Device Tree Source for Emerson KSI8560
  3. *
  4. * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5. *
  6. * Based on mpc8560ads.dts
  7. *
  8. * 2008 (c) MontaVista, Software, Inc. This file is licensed under
  9. * the terms of the GNU General Public License version 2. This program
  10. * is licensed "as is" without any warranty of any kind, whether express
  11. * or implied.
  12. *
  13. */
  14. /dts-v1/;
  15. / {
  16. model = "KSI8560";
  17. compatible = "emerson,KSI8560";
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. aliases {
  21. ethernet0 = &enet0;
  22. ethernet1 = &enet1;
  23. ethernet2 = &enet2;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8560@0 {
  29. device_type = "cpu";
  30. reg = <0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <0x8000>; /* L1, 32K */
  34. i-cache-size = <0x8000>; /* L1, 32K */
  35. timebase-frequency = <0>; /* From U-boot */
  36. bus-frequency = <0>; /* From U-boot */
  37. clock-frequency = <0>; /* From U-boot */
  38. next-level-cache = <&L2>;
  39. };
  40. };
  41. memory {
  42. device_type = "memory";
  43. reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
  44. };
  45. soc@fdf00000 {
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. device_type = "soc";
  49. ranges = <0x00000000 0xfdf00000 0x00100000>;
  50. bus-frequency = <0>; /* Fixed by bootwrapper */
  51. memory-controller@2000 {
  52. compatible = "fsl,mpc8540-memory-controller";
  53. reg = <0x2000 0x1000>;
  54. interrupt-parent = <&mpic>;
  55. interrupts = <0x12 0x2>;
  56. };
  57. L2: l2-cache-controller@20000 {
  58. compatible = "fsl,mpc8540-l2-cache-controller";
  59. reg = <0x20000 0x1000>;
  60. cache-line-size = <0x20>; /* 32 bytes */
  61. cache-size = <0x40000>; /* L2, 256K */
  62. interrupt-parent = <&mpic>;
  63. interrupts = <0x10 0x2>;
  64. };
  65. i2c@3000 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. cell-index = <0>;
  69. compatible = "fsl-i2c";
  70. reg = <0x3000 0x100>;
  71. interrupts = <0x2b 0x2>;
  72. interrupt-parent = <&mpic>;
  73. dfsrr;
  74. };
  75. dma@21300 {
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  79. reg = <0x21300 0x4>;
  80. ranges = <0x0 0x21100 0x200>;
  81. cell-index = <0>;
  82. dma-channel@0 {
  83. compatible = "fsl,mpc8560-dma-channel",
  84. "fsl,eloplus-dma-channel";
  85. reg = <0x0 0x80>;
  86. cell-index = <0>;
  87. interrupt-parent = <&mpic>;
  88. interrupts = <20 2>;
  89. };
  90. dma-channel@80 {
  91. compatible = "fsl,mpc8560-dma-channel",
  92. "fsl,eloplus-dma-channel";
  93. reg = <0x80 0x80>;
  94. cell-index = <1>;
  95. interrupt-parent = <&mpic>;
  96. interrupts = <21 2>;
  97. };
  98. dma-channel@100 {
  99. compatible = "fsl,mpc8560-dma-channel",
  100. "fsl,eloplus-dma-channel";
  101. reg = <0x100 0x80>;
  102. cell-index = <2>;
  103. interrupt-parent = <&mpic>;
  104. interrupts = <22 2>;
  105. };
  106. dma-channel@180 {
  107. compatible = "fsl,mpc8560-dma-channel",
  108. "fsl,eloplus-dma-channel";
  109. reg = <0x180 0x80>;
  110. cell-index = <3>;
  111. interrupt-parent = <&mpic>;
  112. interrupts = <23 2>;
  113. };
  114. };
  115. enet0: ethernet@24000 {
  116. #address-cells = <1>;
  117. #size-cells = <1>;
  118. device_type = "network";
  119. model = "TSEC";
  120. compatible = "gianfar";
  121. reg = <0x24000 0x1000>;
  122. ranges = <0x0 0x24000 0x1000>;
  123. /* Mac address filled in by bootwrapper */
  124. local-mac-address = [ 00 00 00 00 00 00 ];
  125. interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
  126. interrupt-parent = <&mpic>;
  127. tbi-handle = <&tbi0>;
  128. phy-handle = <&PHY1>;
  129. mdio@520 { /* For TSECs */
  130. #address-cells = <1>;
  131. #size-cells = <0>;
  132. compatible = "fsl,gianfar-mdio";
  133. reg = <0x520 0x20>;
  134. PHY1: ethernet-phy@1 {
  135. interrupt-parent = <&mpic>;
  136. reg = <0x1>;
  137. device_type = "ethernet-phy";
  138. };
  139. PHY2: ethernet-phy@2 {
  140. interrupt-parent = <&mpic>;
  141. reg = <0x2>;
  142. device_type = "ethernet-phy";
  143. };
  144. tbi0: tbi-phy@11 {
  145. reg = <0x11>;
  146. device_type = "tbi-phy";
  147. };
  148. };
  149. };
  150. enet1: ethernet@25000 {
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. device_type = "network";
  154. model = "TSEC";
  155. compatible = "gianfar";
  156. reg = <0x25000 0x1000>;
  157. ranges = <0x0 0x25000 0x1000>;
  158. /* Mac address filled in by bootwrapper */
  159. local-mac-address = [ 00 00 00 00 00 00 ];
  160. interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
  161. interrupt-parent = <&mpic>;
  162. tbi-handle = <&tbi1>;
  163. phy-handle = <&PHY2>;
  164. mdio@520 {
  165. #address-cells = <1>;
  166. #size-cells = <0>;
  167. compatible = "fsl,gianfar-tbi";
  168. reg = <0x520 0x20>;
  169. tbi1: tbi-phy@11 {
  170. reg = <0x11>;
  171. device_type = "tbi-phy";
  172. };
  173. };
  174. };
  175. mpic: pic@40000 {
  176. #address-cells = <0>;
  177. #interrupt-cells = <2>;
  178. interrupt-controller;
  179. reg = <0x40000 0x40000>;
  180. device_type = "open-pic";
  181. };
  182. cpm@919c0 {
  183. #address-cells = <1>;
  184. #size-cells = <1>;
  185. compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
  186. reg = <0x919c0 0x30>;
  187. ranges;
  188. muram@80000 {
  189. #address-cells = <1>;
  190. #size-cells = <1>;
  191. ranges = <0x0 0x80000 0x10000>;
  192. data@0 {
  193. compatible = "fsl,cpm-muram-data";
  194. reg = <0x0 0x4000 0x9000 0x2000>;
  195. };
  196. };
  197. brg@919f0 {
  198. compatible = "fsl,mpc8560-brg",
  199. "fsl,cpm2-brg",
  200. "fsl,cpm-brg";
  201. reg = <0x919f0 0x10 0x915f0 0x10>;
  202. clock-frequency = <165000000>; /* 166MHz */
  203. };
  204. CPMPIC: pic@90c00 {
  205. #address-cells = <0>;
  206. #interrupt-cells = <2>;
  207. interrupt-controller;
  208. interrupts = <0x2e 0x2>;
  209. interrupt-parent = <&mpic>;
  210. reg = <0x90c00 0x80>;
  211. compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
  212. };
  213. serial@91a00 {
  214. device_type = "serial";
  215. compatible = "fsl,mpc8560-scc-uart",
  216. "fsl,cpm2-scc-uart";
  217. reg = <0x91a00 0x20 0x88000 0x100>;
  218. fsl,cpm-brg = <1>;
  219. fsl,cpm-command = <0x800000>;
  220. current-speed = <0x1c200>;
  221. interrupts = <0x28 0x8>;
  222. interrupt-parent = <&CPMPIC>;
  223. };
  224. serial@91a20 {
  225. device_type = "serial";
  226. compatible = "fsl,mpc8560-scc-uart",
  227. "fsl,cpm2-scc-uart";
  228. reg = <0x91a20 0x20 0x88100 0x100>;
  229. fsl,cpm-brg = <2>;
  230. fsl,cpm-command = <0x4a00000>;
  231. current-speed = <0x1c200>;
  232. interrupts = <0x29 0x8>;
  233. interrupt-parent = <&CPMPIC>;
  234. };
  235. mdio@90d00 { /* For FCCs */
  236. #address-cells = <1>;
  237. #size-cells = <0>;
  238. compatible = "fsl,cpm2-mdio-bitbang";
  239. reg = <0x90d00 0x14>;
  240. fsl,mdio-pin = <24>;
  241. fsl,mdc-pin = <25>;
  242. PHY0: ethernet-phy@0 {
  243. interrupt-parent = <&mpic>;
  244. reg = <0x0>;
  245. device_type = "ethernet-phy";
  246. };
  247. };
  248. enet2: ethernet@91300 {
  249. device_type = "network";
  250. compatible = "fsl,mpc8560-fcc-enet",
  251. "fsl,cpm2-fcc-enet";
  252. reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
  253. /* Mac address filled in by bootwrapper */
  254. local-mac-address = [ 00 00 00 00 00 00 ];
  255. fsl,cpm-command = <0x12000300>;
  256. interrupts = <0x20 0x8>;
  257. interrupt-parent = <&CPMPIC>;
  258. phy-handle = <&PHY0>;
  259. };
  260. };
  261. };
  262. localbus@fdf05000 {
  263. #address-cells = <2>;
  264. #size-cells = <1>;
  265. compatible = "fsl,mpc8560-localbus";
  266. reg = <0xfdf05000 0x68>;
  267. ranges = <0x0 0x0 0xe0000000 0x00800000
  268. 0x4 0x0 0xe8080000 0x00080000>;
  269. flash@0,0 {
  270. #address-cells = <1>;
  271. #size-cells = <1>;
  272. compatible = "jedec-flash";
  273. reg = <0x0 0x0 0x800000>;
  274. bank-width = <0x2>;
  275. partition@0 {
  276. label = "Primary Kernel";
  277. reg = <0x0 0x180000>;
  278. };
  279. partition@180000 {
  280. label = "Primary Filesystem";
  281. reg = <0x180000 0x580000>;
  282. };
  283. partition@700000 {
  284. label = "Monitor";
  285. reg = <0x300000 0x100000>;
  286. read-only;
  287. };
  288. };
  289. cpld@4,0 {
  290. compatible = "emerson,KSI8560-cpld";
  291. reg = <0x4 0x0 0x80000>;
  292. };
  293. };
  294. chosen {
  295. linux,stdout-path = "/soc/cpm/serial@91a00";
  296. };
  297. };