arches.dts 7.5 KB

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  1. /*
  2. * Device Tree Source for AMCC Arches (dual 460GT board)
  3. *
  4. * (C) Copyright 2008 Applied Micro Circuits Corporation
  5. * Victor Gallardo <vgallardo@amcc.com>
  6. * Adam Graham <agraham@amcc.com>
  7. *
  8. * Based on the glacier.dts file
  9. * Stefan Roese <sr@denx.de>
  10. * Copyright 2008 DENX Software Engineering
  11. *
  12. * See file CREDITS for list of people who contributed to this
  13. * project.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28. * MA 02111-1307 USA
  29. */
  30. /dts-v1/;
  31. / {
  32. #address-cells = <2>;
  33. #size-cells = <1>;
  34. model = "amcc,arches";
  35. compatible = "amcc,arches";
  36. dcr-parent = <&{/cpus/cpu@0}>;
  37. aliases {
  38. ethernet0 = &EMAC0;
  39. ethernet1 = &EMAC1;
  40. ethernet2 = &EMAC2;
  41. serial0 = &UART0;
  42. };
  43. cpus {
  44. #address-cells = <1>;
  45. #size-cells = <0>;
  46. cpu@0 {
  47. device_type = "cpu";
  48. model = "PowerPC,460GT";
  49. reg = <0x00000000>;
  50. clock-frequency = <0>; /* Filled in by U-Boot */
  51. timebase-frequency = <0>; /* Filled in by U-Boot */
  52. i-cache-line-size = <32>;
  53. d-cache-line-size = <32>;
  54. i-cache-size = <32768>;
  55. d-cache-size = <32768>;
  56. dcr-controller;
  57. dcr-access-method = "native";
  58. };
  59. };
  60. memory {
  61. device_type = "memory";
  62. reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  63. };
  64. UIC0: interrupt-controller0 {
  65. compatible = "ibm,uic-460gt","ibm,uic";
  66. interrupt-controller;
  67. cell-index = <0>;
  68. dcr-reg = <0x0c0 0x009>;
  69. #address-cells = <0>;
  70. #size-cells = <0>;
  71. #interrupt-cells = <2>;
  72. };
  73. UIC1: interrupt-controller1 {
  74. compatible = "ibm,uic-460gt","ibm,uic";
  75. interrupt-controller;
  76. cell-index = <1>;
  77. dcr-reg = <0x0d0 0x009>;
  78. #address-cells = <0>;
  79. #size-cells = <0>;
  80. #interrupt-cells = <2>;
  81. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  82. interrupt-parent = <&UIC0>;
  83. };
  84. UIC2: interrupt-controller2 {
  85. compatible = "ibm,uic-460gt","ibm,uic";
  86. interrupt-controller;
  87. cell-index = <2>;
  88. dcr-reg = <0x0e0 0x009>;
  89. #address-cells = <0>;
  90. #size-cells = <0>;
  91. #interrupt-cells = <2>;
  92. interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  93. interrupt-parent = <&UIC0>;
  94. };
  95. UIC3: interrupt-controller3 {
  96. compatible = "ibm,uic-460gt","ibm,uic";
  97. interrupt-controller;
  98. cell-index = <3>;
  99. dcr-reg = <0x0f0 0x009>;
  100. #address-cells = <0>;
  101. #size-cells = <0>;
  102. #interrupt-cells = <2>;
  103. interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  104. interrupt-parent = <&UIC0>;
  105. };
  106. SDR0: sdr {
  107. compatible = "ibm,sdr-460gt";
  108. dcr-reg = <0x00e 0x002>;
  109. };
  110. CPR0: cpr {
  111. compatible = "ibm,cpr-460gt";
  112. dcr-reg = <0x00c 0x002>;
  113. };
  114. plb {
  115. compatible = "ibm,plb-460gt", "ibm,plb4";
  116. #address-cells = <2>;
  117. #size-cells = <1>;
  118. ranges;
  119. clock-frequency = <0>; /* Filled in by U-Boot */
  120. SDRAM0: sdram {
  121. compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
  122. dcr-reg = <0x010 0x002>;
  123. };
  124. MAL0: mcmal {
  125. compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
  126. dcr-reg = <0x180 0x062>;
  127. num-tx-chans = <3>;
  128. num-rx-chans = <24>;
  129. #address-cells = <0>;
  130. #size-cells = <0>;
  131. interrupt-parent = <&UIC2>;
  132. interrupts = < /*TXEOB*/ 0x6 0x4
  133. /*RXEOB*/ 0x7 0x4
  134. /*SERR*/ 0x3 0x4
  135. /*TXDE*/ 0x4 0x4
  136. /*RXDE*/ 0x5 0x4>;
  137. desc-base-addr-high = <0x8>;
  138. };
  139. POB0: opb {
  140. compatible = "ibm,opb-460gt", "ibm,opb";
  141. #address-cells = <1>;
  142. #size-cells = <1>;
  143. ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
  144. clock-frequency = <0>; /* Filled in by U-Boot */
  145. EBC0: ebc {
  146. compatible = "ibm,ebc-460gt", "ibm,ebc";
  147. dcr-reg = <0x012 0x002>;
  148. #address-cells = <2>;
  149. #size-cells = <1>;
  150. clock-frequency = <0>; /* Filled in by U-Boot */
  151. /* ranges property is supplied by U-Boot */
  152. interrupts = <0x6 0x4>;
  153. interrupt-parent = <&UIC1>;
  154. };
  155. UART0: serial@ef600300 {
  156. device_type = "serial";
  157. compatible = "ns16550";
  158. reg = <0xef600300 0x00000008>;
  159. virtual-reg = <0xef600300>;
  160. clock-frequency = <0>; /* Filled in by U-Boot */
  161. current-speed = <0>; /* Filled in by U-Boot */
  162. interrupt-parent = <&UIC1>;
  163. interrupts = <0x1 0x4>;
  164. };
  165. IIC0: i2c@ef600700 {
  166. compatible = "ibm,iic-460gt", "ibm,iic";
  167. reg = <0xef600700 0x00000014>;
  168. interrupt-parent = <&UIC0>;
  169. interrupts = <0x2 0x4>;
  170. };
  171. IIC1: i2c@ef600800 {
  172. compatible = "ibm,iic-460gt", "ibm,iic";
  173. reg = <0xef600800 0x00000014>;
  174. interrupt-parent = <&UIC0>;
  175. interrupts = <0x3 0x4>;
  176. };
  177. TAH0: emac-tah@ef601350 {
  178. compatible = "ibm,tah-460gt", "ibm,tah";
  179. reg = <0xef601350 0x00000030>;
  180. };
  181. TAH1: emac-tah@ef601450 {
  182. compatible = "ibm,tah-460gt", "ibm,tah";
  183. reg = <0xef601450 0x00000030>;
  184. };
  185. EMAC0: ethernet@ef600e00 {
  186. device_type = "network";
  187. compatible = "ibm,emac-460gt", "ibm,emac4sync";
  188. interrupt-parent = <&EMAC0>;
  189. interrupts = <0x0 0x1>;
  190. #interrupt-cells = <1>;
  191. #address-cells = <0>;
  192. #size-cells = <0>;
  193. interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
  194. /*Wake*/ 0x1 &UIC2 0x14 0x4>;
  195. reg = <0xef600e00 0x000000c4>;
  196. local-mac-address = [000000000000]; /* Filled in by U-Boot */
  197. mal-device = <&MAL0>;
  198. mal-tx-channel = <0>;
  199. mal-rx-channel = <0>;
  200. cell-index = <0>;
  201. max-frame-size = <9000>;
  202. rx-fifo-size = <4096>;
  203. tx-fifo-size = <2048>;
  204. phy-mode = "sgmii";
  205. phy-map = <0xffffffff>;
  206. gpcs-address = <0x0000000a>;
  207. tah-device = <&TAH0>;
  208. tah-channel = <0>;
  209. has-inverted-stacr-oc;
  210. has-new-stacr-staopc;
  211. };
  212. EMAC1: ethernet@ef600f00 {
  213. device_type = "network";
  214. compatible = "ibm,emac-460gt", "ibm,emac4sync";
  215. interrupt-parent = <&EMAC1>;
  216. interrupts = <0x0 0x1>;
  217. #interrupt-cells = <1>;
  218. #address-cells = <0>;
  219. #size-cells = <0>;
  220. interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
  221. /*Wake*/ 0x1 &UIC2 0x15 0x4>;
  222. reg = <0xef600f00 0x000000c4>;
  223. local-mac-address = [000000000000]; /* Filled in by U-Boot */
  224. mal-device = <&MAL0>;
  225. mal-tx-channel = <1>;
  226. mal-rx-channel = <8>;
  227. cell-index = <1>;
  228. max-frame-size = <9000>;
  229. rx-fifo-size = <4096>;
  230. tx-fifo-size = <2048>;
  231. phy-mode = "sgmii";
  232. phy-map = <0x00000000>;
  233. gpcs-address = <0x0000000b>;
  234. tah-device = <&TAH1>;
  235. tah-channel = <1>;
  236. has-inverted-stacr-oc;
  237. has-new-stacr-staopc;
  238. mdio-device = <&EMAC0>;
  239. };
  240. EMAC2: ethernet@ef601100 {
  241. device_type = "network";
  242. compatible = "ibm,emac-460gt", "ibm,emac4sync";
  243. interrupt-parent = <&EMAC2>;
  244. interrupts = <0x0 0x1>;
  245. #interrupt-cells = <1>;
  246. #address-cells = <0>;
  247. #size-cells = <0>;
  248. interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
  249. /*Wake*/ 0x1 &UIC2 0x16 0x4>;
  250. reg = <0xef601100 0x000000c4>;
  251. local-mac-address = [000000000000]; /* Filled in by U-Boot */
  252. mal-device = <&MAL0>;
  253. mal-tx-channel = <2>;
  254. mal-rx-channel = <16>;
  255. cell-index = <2>;
  256. max-frame-size = <9000>;
  257. rx-fifo-size = <4096>;
  258. tx-fifo-size = <2048>;
  259. phy-mode = "sgmii";
  260. phy-map = <0x00000001>;
  261. gpcs-address = <0x0000000C>;
  262. has-inverted-stacr-oc;
  263. has-new-stacr-staopc;
  264. mdio-device = <&EMAC0>;
  265. };
  266. };
  267. };
  268. };