ip22-int.c 8.6 KB

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  1. /*
  2. * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
  3. * found on INDY and Indigo2 workstations.
  4. *
  5. * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
  6. * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
  7. * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
  8. * - Indigo2 changes
  9. * - Interrupt handling fixes
  10. * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
  11. */
  12. #include <linux/types.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/interrupt.h>
  16. #include <asm/irq_cpu.h>
  17. #include <asm/sgi/hpc3.h>
  18. #include <asm/sgi/ip22.h>
  19. /* So far nothing hangs here */
  20. #undef USE_LIO3_IRQ
  21. struct sgint_regs *sgint;
  22. static char lc0msk_to_irqnr[256];
  23. static char lc1msk_to_irqnr[256];
  24. static char lc2msk_to_irqnr[256];
  25. static char lc3msk_to_irqnr[256];
  26. extern int ip22_eisa_init(void);
  27. static void enable_local0_irq(unsigned int irq)
  28. {
  29. /* don't allow mappable interrupt to be enabled from setup_irq,
  30. * we have our own way to do so */
  31. if (irq != SGI_MAP_0_IRQ)
  32. sgint->imask0 |= (1 << (irq - SGINT_LOCAL0));
  33. }
  34. static void disable_local0_irq(unsigned int irq)
  35. {
  36. sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
  37. }
  38. static struct irq_chip ip22_local0_irq_type = {
  39. .name = "IP22 local 0",
  40. .ack = disable_local0_irq,
  41. .mask = disable_local0_irq,
  42. .mask_ack = disable_local0_irq,
  43. .unmask = enable_local0_irq,
  44. };
  45. static void enable_local1_irq(unsigned int irq)
  46. {
  47. /* don't allow mappable interrupt to be enabled from setup_irq,
  48. * we have our own way to do so */
  49. if (irq != SGI_MAP_1_IRQ)
  50. sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
  51. }
  52. static void disable_local1_irq(unsigned int irq)
  53. {
  54. sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
  55. }
  56. static struct irq_chip ip22_local1_irq_type = {
  57. .name = "IP22 local 1",
  58. .ack = disable_local1_irq,
  59. .mask = disable_local1_irq,
  60. .mask_ack = disable_local1_irq,
  61. .unmask = enable_local1_irq,
  62. };
  63. static void enable_local2_irq(unsigned int irq)
  64. {
  65. sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
  66. sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
  67. }
  68. static void disable_local2_irq(unsigned int irq)
  69. {
  70. sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
  71. if (!sgint->cmeimask0)
  72. sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
  73. }
  74. static struct irq_chip ip22_local2_irq_type = {
  75. .name = "IP22 local 2",
  76. .ack = disable_local2_irq,
  77. .mask = disable_local2_irq,
  78. .mask_ack = disable_local2_irq,
  79. .unmask = enable_local2_irq,
  80. };
  81. static void enable_local3_irq(unsigned int irq)
  82. {
  83. sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
  84. sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
  85. }
  86. static void disable_local3_irq(unsigned int irq)
  87. {
  88. sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
  89. if (!sgint->cmeimask1)
  90. sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
  91. }
  92. static struct irq_chip ip22_local3_irq_type = {
  93. .name = "IP22 local 3",
  94. .ack = disable_local3_irq,
  95. .mask = disable_local3_irq,
  96. .mask_ack = disable_local3_irq,
  97. .unmask = enable_local3_irq,
  98. };
  99. static void indy_local0_irqdispatch(void)
  100. {
  101. u8 mask = sgint->istat0 & sgint->imask0;
  102. u8 mask2;
  103. int irq;
  104. if (mask & SGINT_ISTAT0_LIO2) {
  105. mask2 = sgint->vmeistat & sgint->cmeimask0;
  106. irq = lc2msk_to_irqnr[mask2];
  107. } else
  108. irq = lc0msk_to_irqnr[mask];
  109. /* if irq == 0, then the interrupt has already been cleared */
  110. if (irq)
  111. do_IRQ(irq);
  112. }
  113. static void indy_local1_irqdispatch(void)
  114. {
  115. u8 mask = sgint->istat1 & sgint->imask1;
  116. u8 mask2;
  117. int irq;
  118. if (mask & SGINT_ISTAT1_LIO3) {
  119. mask2 = sgint->vmeistat & sgint->cmeimask1;
  120. irq = lc3msk_to_irqnr[mask2];
  121. } else
  122. irq = lc1msk_to_irqnr[mask];
  123. /* if irq == 0, then the interrupt has already been cleared */
  124. if (irq)
  125. do_IRQ(irq);
  126. }
  127. extern void ip22_be_interrupt(int irq);
  128. static void indy_buserror_irq(void)
  129. {
  130. int irq = SGI_BUSERR_IRQ;
  131. irq_enter();
  132. kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
  133. ip22_be_interrupt(irq);
  134. irq_exit();
  135. }
  136. static struct irqaction local0_cascade = {
  137. .handler = no_action,
  138. .flags = IRQF_DISABLED,
  139. .name = "local0 cascade",
  140. };
  141. static struct irqaction local1_cascade = {
  142. .handler = no_action,
  143. .flags = IRQF_DISABLED,
  144. .name = "local1 cascade",
  145. };
  146. static struct irqaction buserr = {
  147. .handler = no_action,
  148. .flags = IRQF_DISABLED,
  149. .name = "Bus Error",
  150. };
  151. static struct irqaction map0_cascade = {
  152. .handler = no_action,
  153. .flags = IRQF_DISABLED,
  154. .name = "mapable0 cascade",
  155. };
  156. #ifdef USE_LIO3_IRQ
  157. static struct irqaction map1_cascade = {
  158. .handler = no_action,
  159. .flags = IRQF_DISABLED,
  160. .name = "mapable1 cascade",
  161. };
  162. #define SGI_INTERRUPTS SGINT_END
  163. #else
  164. #define SGI_INTERRUPTS SGINT_LOCAL3
  165. #endif
  166. extern void indy_8254timer_irq(void);
  167. /*
  168. * IRQs on the INDY look basically (barring software IRQs which we don't use
  169. * at all) like:
  170. *
  171. * MIPS IRQ Source
  172. * -------- ------
  173. * 0 Software (ignored)
  174. * 1 Software (ignored)
  175. * 2 Local IRQ level zero
  176. * 3 Local IRQ level one
  177. * 4 8254 Timer zero
  178. * 5 8254 Timer one
  179. * 6 Bus Error
  180. * 7 R4k timer (what we use)
  181. *
  182. * We handle the IRQ according to _our_ priority which is:
  183. *
  184. * Highest ---- R4k Timer
  185. * Local IRQ zero
  186. * Local IRQ one
  187. * Bus Error
  188. * 8254 Timer zero
  189. * Lowest ---- 8254 Timer one
  190. *
  191. * then we just return, if multiple IRQs are pending then we will just take
  192. * another exception, big deal.
  193. */
  194. asmlinkage void plat_irq_dispatch(void)
  195. {
  196. unsigned int pending = read_c0_status() & read_c0_cause();
  197. /*
  198. * First we check for r4k counter/timer IRQ.
  199. */
  200. if (pending & CAUSEF_IP7)
  201. do_IRQ(SGI_TIMER_IRQ);
  202. else if (pending & CAUSEF_IP2)
  203. indy_local0_irqdispatch();
  204. else if (pending & CAUSEF_IP3)
  205. indy_local1_irqdispatch();
  206. else if (pending & CAUSEF_IP6)
  207. indy_buserror_irq();
  208. else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
  209. indy_8254timer_irq();
  210. }
  211. void __init arch_init_irq(void)
  212. {
  213. int i;
  214. /* Init local mask --> irq tables. */
  215. for (i = 0; i < 256; i++) {
  216. if (i & 0x80) {
  217. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
  218. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
  219. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
  220. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
  221. } else if (i & 0x40) {
  222. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
  223. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
  224. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
  225. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
  226. } else if (i & 0x20) {
  227. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
  228. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
  229. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
  230. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
  231. } else if (i & 0x10) {
  232. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
  233. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
  234. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
  235. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
  236. } else if (i & 0x08) {
  237. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
  238. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
  239. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
  240. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
  241. } else if (i & 0x04) {
  242. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
  243. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
  244. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
  245. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
  246. } else if (i & 0x02) {
  247. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
  248. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
  249. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
  250. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
  251. } else if (i & 0x01) {
  252. lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
  253. lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
  254. lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
  255. lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
  256. } else {
  257. lc0msk_to_irqnr[i] = 0;
  258. lc1msk_to_irqnr[i] = 0;
  259. lc2msk_to_irqnr[i] = 0;
  260. lc3msk_to_irqnr[i] = 0;
  261. }
  262. }
  263. /* Mask out all interrupts. */
  264. sgint->imask0 = 0;
  265. sgint->imask1 = 0;
  266. sgint->cmeimask0 = 0;
  267. sgint->cmeimask1 = 0;
  268. /* init CPU irqs */
  269. mips_cpu_irq_init();
  270. for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
  271. struct irq_chip *handler;
  272. if (i < SGINT_LOCAL1)
  273. handler = &ip22_local0_irq_type;
  274. else if (i < SGINT_LOCAL2)
  275. handler = &ip22_local1_irq_type;
  276. else if (i < SGINT_LOCAL3)
  277. handler = &ip22_local2_irq_type;
  278. else
  279. handler = &ip22_local3_irq_type;
  280. set_irq_chip_and_handler(i, handler, handle_level_irq);
  281. }
  282. /* vector handler. this register the IRQ as non-sharable */
  283. setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
  284. setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
  285. setup_irq(SGI_BUSERR_IRQ, &buserr);
  286. /* cascade in cascade. i love Indy ;-) */
  287. setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
  288. #ifdef USE_LIO3_IRQ
  289. setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
  290. #endif
  291. #ifdef CONFIG_EISA
  292. if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
  293. ip22_eisa_init();
  294. #endif
  295. }