pci-tx4939.c 2.7 KB

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  1. /*
  2. * linux/arch/mips/pci/pci-tx4939.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4939/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * Copyright 2001, 2003-2005 MontaVista Software Inc.
  8. * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
  9. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  10. *
  11. * This file is subject to the terms and conditions of the GNU General Public
  12. * License. See the file "COPYING" in the main directory of this archive
  13. * for more details.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/pci.h>
  17. #include <linux/kernel.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/txx9/generic.h>
  20. #include <asm/txx9/tx4939.h>
  21. int __init tx4939_report_pciclk(void)
  22. {
  23. int pciclk = 0;
  24. pr_info("PCIC --%s PCICLK:",
  25. (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
  26. " PCI66" : "");
  27. if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
  28. pciclk = txx9_master_clock * 20 / 6;
  29. if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
  30. pciclk /= 2;
  31. printk(KERN_CONT "Internal(%u.%uMHz)",
  32. (pciclk + 50000) / 1000000,
  33. ((pciclk + 50000) / 100000) % 10);
  34. } else {
  35. printk(KERN_CONT "External");
  36. pciclk = -1;
  37. }
  38. printk(KERN_CONT "\n");
  39. return pciclk;
  40. }
  41. void __init tx4939_report_pci1clk(void)
  42. {
  43. unsigned int pciclk = txx9_master_clock * 20 / 6;
  44. pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
  45. (pciclk + 50000) / 1000000,
  46. ((pciclk + 50000) / 100000) % 10);
  47. }
  48. int __init tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
  49. {
  50. if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
  51. switch (slot) {
  52. case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
  53. if (__raw_readq(&tx4939_ccfgptr->pcfg) &
  54. TX4939_PCFG_ET0MODE)
  55. return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
  56. break;
  57. case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
  58. if (__raw_readq(&tx4939_ccfgptr->pcfg) &
  59. TX4939_PCFG_ET1MODE)
  60. return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
  61. break;
  62. }
  63. return 0;
  64. }
  65. return -1;
  66. }
  67. int __init tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  68. {
  69. int irq = tx4939_pcic1_map_irq(dev, slot);
  70. if (irq >= 0)
  71. return irq;
  72. irq = pin;
  73. /* IRQ rotation */
  74. irq--; /* 0-3 */
  75. irq = (irq + 33 - slot) % 4;
  76. irq++; /* 1-4 */
  77. switch (irq) {
  78. case 1:
  79. irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
  80. break;
  81. case 2:
  82. irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
  83. break;
  84. case 3:
  85. irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
  86. break;
  87. case 4:
  88. irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
  89. break;
  90. }
  91. return irq;
  92. }
  93. void __init tx4939_setup_pcierr_irq(void)
  94. {
  95. if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
  96. tx4927_pcierr_interrupt,
  97. IRQF_DISABLED, "PCI error",
  98. (void *)TX4939_PCIC_REG))
  99. pr_warning("Failed to request irq for PCIERR\n");
  100. }