ip27.h 2.1 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Derived from IRIX <sys/SN/SN0/IP27.h>.
  7. *
  8. * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
  9. * Copyright (C) 1999, 2006 by Ralf Baechle
  10. */
  11. #ifndef _ASM_SN_SN0_IP27_H
  12. #define _ASM_SN_SN0_IP27_H
  13. #include <asm/mipsregs.h>
  14. /*
  15. * Simple definitions for the masks which remove SW bits from pte.
  16. */
  17. #define TLBLO_HWBITSHIFT 0 /* Shift value, for masking */
  18. #ifndef __ASSEMBLY__
  19. #define CAUSE_BERRINTR IE_IRQ5
  20. #define ECCF_CACHE_ERR 0
  21. #define ECCF_TAGLO 1
  22. #define ECCF_ECC 2
  23. #define ECCF_ERROREPC 3
  24. #define ECCF_PADDR 4
  25. #define ECCF_SIZE (5 * sizeof(long))
  26. #endif /* !__ASSEMBLY__ */
  27. #ifdef __ASSEMBLY__
  28. /*
  29. * KL_GET_CPUNUM (similar to EV_GET_SPNUM for EVEREST platform) reads
  30. * the processor number of the calling processor. The proc parameters
  31. * must be a register.
  32. */
  33. #define KL_GET_CPUNUM(proc) \
  34. dli proc, LOCAL_HUB(0); \
  35. ld proc, PI_CPU_NUM(proc)
  36. #endif /* __ASSEMBLY__ */
  37. /*
  38. * R10000 status register interrupt bit mask usage for IP27.
  39. */
  40. #define SRB_SWTIMO IE_SW0 /* 0x0100 */
  41. #define SRB_NET IE_SW1 /* 0x0200 */
  42. #define SRB_DEV0 IE_IRQ0 /* 0x0400 */
  43. #define SRB_DEV1 IE_IRQ1 /* 0x0800 */
  44. #define SRB_TIMOCLK IE_IRQ2 /* 0x1000 */
  45. #define SRB_PROFCLK IE_IRQ3 /* 0x2000 */
  46. #define SRB_ERR IE_IRQ4 /* 0x4000 */
  47. #define SRB_SCHEDCLK IE_IRQ5 /* 0x8000 */
  48. #define SR_IBIT_HI SRB_DEV0
  49. #define SR_IBIT_PROF SRB_PROFCLK
  50. #define SRB_SWTIMO_IDX 0
  51. #define SRB_NET_IDX 1
  52. #define SRB_DEV0_IDX 2
  53. #define SRB_DEV1_IDX 3
  54. #define SRB_TIMOCLK_IDX 4
  55. #define SRB_PROFCLK_IDX 5
  56. #define SRB_ERR_IDX 6
  57. #define SRB_SCHEDCLK_IDX 7
  58. #define NUM_CAUSE_INTRS 8
  59. #define SCACHE_LINESIZE 128
  60. #define SCACHE_LINEMASK (SCACHE_LINESIZE - 1)
  61. #include <asm/sn/addrs.h>
  62. #define LED_CYCLE_MASK 0x0f
  63. #define LED_CYCLE_SHFT 4
  64. #define SEND_NMI(_nasid, _slice) \
  65. REMOTE_HUB_S((_nasid), (PI_NMI_A + ((_slice) * PI_NMI_OFFSET)), 1)
  66. #endif /* _ASM_SN_SN0_IP27_H */