platform.c 8.9 KB

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  1. /*
  2. * Platform device support for Au1x00 SoCs.
  3. *
  4. * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
  5. *
  6. * (C) Copyright Embedded Alley Solutions, Inc 2005
  7. * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/init.h>
  17. #include <asm/mach-au1x00/au1xxx.h>
  18. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  19. #include <asm/mach-au1x00/au1100_mmc.h>
  20. #define PORT(_base, _irq) \
  21. { \
  22. .iobase = _base, \
  23. .membase = (void __iomem *)_base,\
  24. .mapbase = CPHYSADDR(_base), \
  25. .irq = _irq, \
  26. .regshift = 2, \
  27. .iotype = UPIO_AU, \
  28. .flags = UPF_SKIP_TEST \
  29. }
  30. static struct plat_serial8250_port au1x00_uart_data[] = {
  31. #if defined(CONFIG_SERIAL_8250_AU1X00)
  32. #if defined(CONFIG_SOC_AU1000)
  33. PORT(UART0_ADDR, AU1000_UART0_INT),
  34. PORT(UART1_ADDR, AU1000_UART1_INT),
  35. PORT(UART2_ADDR, AU1000_UART2_INT),
  36. PORT(UART3_ADDR, AU1000_UART3_INT),
  37. #elif defined(CONFIG_SOC_AU1500)
  38. PORT(UART0_ADDR, AU1500_UART0_INT),
  39. PORT(UART3_ADDR, AU1500_UART3_INT),
  40. #elif defined(CONFIG_SOC_AU1100)
  41. PORT(UART0_ADDR, AU1100_UART0_INT),
  42. PORT(UART1_ADDR, AU1100_UART1_INT),
  43. PORT(UART3_ADDR, AU1100_UART3_INT),
  44. #elif defined(CONFIG_SOC_AU1550)
  45. PORT(UART0_ADDR, AU1550_UART0_INT),
  46. PORT(UART1_ADDR, AU1550_UART1_INT),
  47. PORT(UART3_ADDR, AU1550_UART3_INT),
  48. #elif defined(CONFIG_SOC_AU1200)
  49. PORT(UART0_ADDR, AU1200_UART0_INT),
  50. PORT(UART1_ADDR, AU1200_UART1_INT),
  51. #endif
  52. #endif /* CONFIG_SERIAL_8250_AU1X00 */
  53. { },
  54. };
  55. static struct platform_device au1xx0_uart_device = {
  56. .name = "serial8250",
  57. .id = PLAT8250_DEV_AU1X00,
  58. .dev = {
  59. .platform_data = au1x00_uart_data,
  60. },
  61. };
  62. /* OHCI (USB full speed host controller) */
  63. static struct resource au1xxx_usb_ohci_resources[] = {
  64. [0] = {
  65. .start = USB_OHCI_BASE,
  66. .end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [1] = {
  70. .start = AU1000_USB_HOST_INT,
  71. .end = AU1000_USB_HOST_INT,
  72. .flags = IORESOURCE_IRQ,
  73. },
  74. };
  75. /* The dmamask must be set for OHCI to work */
  76. static u64 ohci_dmamask = DMA_BIT_MASK(32);
  77. static struct platform_device au1xxx_usb_ohci_device = {
  78. .name = "au1xxx-ohci",
  79. .id = 0,
  80. .dev = {
  81. .dma_mask = &ohci_dmamask,
  82. .coherent_dma_mask = DMA_BIT_MASK(32),
  83. },
  84. .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
  85. .resource = au1xxx_usb_ohci_resources,
  86. };
  87. /*** AU1100 LCD controller ***/
  88. #ifdef CONFIG_FB_AU1100
  89. static struct resource au1100_lcd_resources[] = {
  90. [0] = {
  91. .start = LCD_PHYS_ADDR,
  92. .end = LCD_PHYS_ADDR + 0x800 - 1,
  93. .flags = IORESOURCE_MEM,
  94. },
  95. [1] = {
  96. .start = AU1100_LCD_INT,
  97. .end = AU1100_LCD_INT,
  98. .flags = IORESOURCE_IRQ,
  99. }
  100. };
  101. static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
  102. static struct platform_device au1100_lcd_device = {
  103. .name = "au1100-lcd",
  104. .id = 0,
  105. .dev = {
  106. .dma_mask = &au1100_lcd_dmamask,
  107. .coherent_dma_mask = DMA_BIT_MASK(32),
  108. },
  109. .num_resources = ARRAY_SIZE(au1100_lcd_resources),
  110. .resource = au1100_lcd_resources,
  111. };
  112. #endif
  113. #ifdef CONFIG_SOC_AU1200
  114. /* EHCI (USB high speed host controller) */
  115. static struct resource au1xxx_usb_ehci_resources[] = {
  116. [0] = {
  117. .start = USB_EHCI_BASE,
  118. .end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
  119. .flags = IORESOURCE_MEM,
  120. },
  121. [1] = {
  122. .start = AU1000_USB_HOST_INT,
  123. .end = AU1000_USB_HOST_INT,
  124. .flags = IORESOURCE_IRQ,
  125. },
  126. };
  127. static u64 ehci_dmamask = DMA_BIT_MASK(32);
  128. static struct platform_device au1xxx_usb_ehci_device = {
  129. .name = "au1xxx-ehci",
  130. .id = 0,
  131. .dev = {
  132. .dma_mask = &ehci_dmamask,
  133. .coherent_dma_mask = DMA_BIT_MASK(32),
  134. },
  135. .num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
  136. .resource = au1xxx_usb_ehci_resources,
  137. };
  138. /* Au1200 UDC (USB gadget controller) */
  139. static struct resource au1xxx_usb_gdt_resources[] = {
  140. [0] = {
  141. .start = USB_UDC_BASE,
  142. .end = USB_UDC_BASE + USB_UDC_LEN - 1,
  143. .flags = IORESOURCE_MEM,
  144. },
  145. [1] = {
  146. .start = AU1200_USB_INT,
  147. .end = AU1200_USB_INT,
  148. .flags = IORESOURCE_IRQ,
  149. },
  150. };
  151. static u64 udc_dmamask = DMA_BIT_MASK(32);
  152. static struct platform_device au1xxx_usb_gdt_device = {
  153. .name = "au1xxx-udc",
  154. .id = 0,
  155. .dev = {
  156. .dma_mask = &udc_dmamask,
  157. .coherent_dma_mask = DMA_BIT_MASK(32),
  158. },
  159. .num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
  160. .resource = au1xxx_usb_gdt_resources,
  161. };
  162. /* Au1200 UOC (USB OTG controller) */
  163. static struct resource au1xxx_usb_otg_resources[] = {
  164. [0] = {
  165. .start = USB_UOC_BASE,
  166. .end = USB_UOC_BASE + USB_UOC_LEN - 1,
  167. .flags = IORESOURCE_MEM,
  168. },
  169. [1] = {
  170. .start = AU1200_USB_INT,
  171. .end = AU1200_USB_INT,
  172. .flags = IORESOURCE_IRQ,
  173. },
  174. };
  175. static u64 uoc_dmamask = DMA_BIT_MASK(32);
  176. static struct platform_device au1xxx_usb_otg_device = {
  177. .name = "au1xxx-uoc",
  178. .id = 0,
  179. .dev = {
  180. .dma_mask = &uoc_dmamask,
  181. .coherent_dma_mask = DMA_BIT_MASK(32),
  182. },
  183. .num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
  184. .resource = au1xxx_usb_otg_resources,
  185. };
  186. static struct resource au1200_lcd_resources[] = {
  187. [0] = {
  188. .start = LCD_PHYS_ADDR,
  189. .end = LCD_PHYS_ADDR + 0x800 - 1,
  190. .flags = IORESOURCE_MEM,
  191. },
  192. [1] = {
  193. .start = AU1200_LCD_INT,
  194. .end = AU1200_LCD_INT,
  195. .flags = IORESOURCE_IRQ,
  196. }
  197. };
  198. static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
  199. static struct platform_device au1200_lcd_device = {
  200. .name = "au1200-lcd",
  201. .id = 0,
  202. .dev = {
  203. .dma_mask = &au1200_lcd_dmamask,
  204. .coherent_dma_mask = DMA_BIT_MASK(32),
  205. },
  206. .num_resources = ARRAY_SIZE(au1200_lcd_resources),
  207. .resource = au1200_lcd_resources,
  208. };
  209. static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32);
  210. extern struct au1xmmc_platform_data au1xmmc_platdata[2];
  211. static struct resource au1200_mmc0_resources[] = {
  212. [0] = {
  213. .start = SD0_PHYS_ADDR,
  214. .end = SD0_PHYS_ADDR + 0x7ffff,
  215. .flags = IORESOURCE_MEM,
  216. },
  217. [1] = {
  218. .start = AU1200_SD_INT,
  219. .end = AU1200_SD_INT,
  220. .flags = IORESOURCE_IRQ,
  221. },
  222. [2] = {
  223. .start = DSCR_CMD0_SDMS_TX0,
  224. .end = DSCR_CMD0_SDMS_TX0,
  225. .flags = IORESOURCE_DMA,
  226. },
  227. [3] = {
  228. .start = DSCR_CMD0_SDMS_RX0,
  229. .end = DSCR_CMD0_SDMS_RX0,
  230. .flags = IORESOURCE_DMA,
  231. }
  232. };
  233. static struct platform_device au1200_mmc0_device = {
  234. .name = "au1xxx-mmc",
  235. .id = 0,
  236. .dev = {
  237. .dma_mask = &au1xxx_mmc_dmamask,
  238. .coherent_dma_mask = DMA_BIT_MASK(32),
  239. .platform_data = &au1xmmc_platdata[0],
  240. },
  241. .num_resources = ARRAY_SIZE(au1200_mmc0_resources),
  242. .resource = au1200_mmc0_resources,
  243. };
  244. #ifndef CONFIG_MIPS_DB1200
  245. static struct resource au1200_mmc1_resources[] = {
  246. [0] = {
  247. .start = SD1_PHYS_ADDR,
  248. .end = SD1_PHYS_ADDR + 0x7ffff,
  249. .flags = IORESOURCE_MEM,
  250. },
  251. [1] = {
  252. .start = AU1200_SD_INT,
  253. .end = AU1200_SD_INT,
  254. .flags = IORESOURCE_IRQ,
  255. },
  256. [2] = {
  257. .start = DSCR_CMD0_SDMS_TX1,
  258. .end = DSCR_CMD0_SDMS_TX1,
  259. .flags = IORESOURCE_DMA,
  260. },
  261. [3] = {
  262. .start = DSCR_CMD0_SDMS_RX1,
  263. .end = DSCR_CMD0_SDMS_RX1,
  264. .flags = IORESOURCE_DMA,
  265. }
  266. };
  267. static struct platform_device au1200_mmc1_device = {
  268. .name = "au1xxx-mmc",
  269. .id = 1,
  270. .dev = {
  271. .dma_mask = &au1xxx_mmc_dmamask,
  272. .coherent_dma_mask = DMA_BIT_MASK(32),
  273. .platform_data = &au1xmmc_platdata[1],
  274. },
  275. .num_resources = ARRAY_SIZE(au1200_mmc1_resources),
  276. .resource = au1200_mmc1_resources,
  277. };
  278. #endif /* #ifndef CONFIG_MIPS_DB1200 */
  279. #endif /* #ifdef CONFIG_SOC_AU1200 */
  280. static struct platform_device au1x00_pcmcia_device = {
  281. .name = "au1x00-pcmcia",
  282. .id = 0,
  283. };
  284. /* All Alchemy demoboards with I2C have this #define in their headers */
  285. #ifdef SMBUS_PSC_BASE
  286. static struct resource pbdb_smbus_resources[] = {
  287. {
  288. .start = CPHYSADDR(SMBUS_PSC_BASE),
  289. .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
  290. .flags = IORESOURCE_MEM,
  291. },
  292. };
  293. static struct platform_device pbdb_smbus_device = {
  294. .name = "au1xpsc_smbus",
  295. .id = 0, /* bus number */
  296. .num_resources = ARRAY_SIZE(pbdb_smbus_resources),
  297. .resource = pbdb_smbus_resources,
  298. };
  299. #endif
  300. static struct platform_device *au1xxx_platform_devices[] __initdata = {
  301. &au1xx0_uart_device,
  302. &au1xxx_usb_ohci_device,
  303. &au1x00_pcmcia_device,
  304. #ifdef CONFIG_FB_AU1100
  305. &au1100_lcd_device,
  306. #endif
  307. #ifdef CONFIG_SOC_AU1200
  308. &au1xxx_usb_ehci_device,
  309. &au1xxx_usb_gdt_device,
  310. &au1xxx_usb_otg_device,
  311. &au1200_lcd_device,
  312. &au1200_mmc0_device,
  313. #ifndef CONFIG_MIPS_DB1200
  314. &au1200_mmc1_device,
  315. #endif
  316. #endif
  317. #ifdef SMBUS_PSC_BASE
  318. &pbdb_smbus_device,
  319. #endif
  320. };
  321. static int __init au1xxx_platform_init(void)
  322. {
  323. unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
  324. int i;
  325. /* Fill up uartclk. */
  326. for (i = 0; au1x00_uart_data[i].flags; i++)
  327. au1x00_uart_data[i].uartclk = uartclk;
  328. return platform_add_devices(au1xxx_platform_devices,
  329. ARRAY_SIZE(au1xxx_platform_devices));
  330. }
  331. arch_initcall(au1xxx_platform_init);