m68360_pram.h 19 KB

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  1. /***********************************
  2. * $Id: m68360_pram.h,v 1.1 2002/03/02 15:01:07 gerg Exp $
  3. ***********************************
  4. *
  5. ***************************************
  6. * Definitions of the parameter area RAM.
  7. * Note that different structures are overlaid
  8. * at the same offsets for the different modes
  9. * of operation.
  10. ***************************************
  11. */
  12. #ifndef __PRAM_H
  13. #define __PRAM_H
  14. /* Time slot assignment table */
  15. #define VALID_SLOT 0x8000
  16. #define WRAP_SLOT 0x4000
  17. /*****************************************************************
  18. Global Multichannel parameter RAM
  19. *****************************************************************/
  20. struct global_multi_pram {
  21. /*
  22. * Global Multichannel parameter RAM
  23. */
  24. unsigned long mcbase; /* Multichannel Base pointer */
  25. unsigned short qmcstate; /* Multichannel Controller state */
  26. unsigned short mrblr; /* Maximum Receive Buffer Length */
  27. unsigned short tx_s_ptr; /* TSTATx Pointer */
  28. unsigned short rxptr; /* Current Time slot entry in TSATRx */
  29. unsigned short grfthr; /* Global Receive frame threshold */
  30. unsigned short grfcnt; /* Global Receive Frame Count */
  31. unsigned long intbase; /* Multichannel Base address */
  32. unsigned long iintptr; /* Pointer to interrupt queue */
  33. unsigned short rx_s_ptr; /* TSTARx Pointer */
  34. unsigned short txptr; /* Current Time slot entry in TSATTx */
  35. unsigned long c_mask32; /* CRC Constant (debb20e3) */
  36. unsigned short tsatrx[32]; /* Time Slot Assignment Table Rx */
  37. unsigned short tsattx[32]; /* Time Slot Assignment Table Tx */
  38. unsigned short c_mask16; /* CRC Constant (f0b8) */
  39. };
  40. /*****************************************************************
  41. Quicc32 HDLC parameter RAM
  42. *****************************************************************/
  43. struct quicc32_pram {
  44. unsigned short tbase; /* Tx Buffer Descriptors Base Address */
  45. unsigned short chamr; /* Channel Mode Register */
  46. unsigned long tstate; /* Tx Internal State */
  47. unsigned long txintr; /* Tx Internal Data Pointer */
  48. unsigned short tbptr; /* Tx Buffer Descriptor Pointer */
  49. unsigned short txcntr; /* Tx Internal Byte Count */
  50. unsigned long tupack; /* (Tx Temp) */
  51. unsigned long zistate; /* Zero Insertion machine state */
  52. unsigned long tcrc; /* Temp Transmit CRC */
  53. unsigned short intmask; /* Channel's interrupt mask flags */
  54. unsigned short bdflags;
  55. unsigned short rbase; /* Rx Buffer Descriptors Base Address */
  56. unsigned short mflr; /* Max Frame Length Register */
  57. unsigned long rstate; /* Rx Internal State */
  58. unsigned long rxintr; /* Rx Internal Data Pointer */
  59. unsigned short rbptr; /* Rx Buffer Descriptor Pointer */
  60. unsigned short rxbyc; /* Rx Internal Byte Count */
  61. unsigned long rpack; /* (Rx Temp) */
  62. unsigned long zdstate; /* Zero Deletion machine state */
  63. unsigned long rcrc; /* Temp Transmit CRC */
  64. unsigned short maxc; /* Max_length counter */
  65. unsigned short tmp_mb; /* Temp */
  66. };
  67. /*****************************************************************
  68. HDLC parameter RAM
  69. *****************************************************************/
  70. struct hdlc_pram {
  71. /*
  72. * SCC parameter RAM
  73. */
  74. unsigned short rbase; /* RX BD base address */
  75. unsigned short tbase; /* TX BD base address */
  76. unsigned char rfcr; /* Rx function code */
  77. unsigned char tfcr; /* Tx function code */
  78. unsigned short mrblr; /* Rx buffer length */
  79. unsigned long rstate; /* Rx internal state */
  80. unsigned long rptr; /* Rx internal data pointer */
  81. unsigned short rbptr; /* rb BD Pointer */
  82. unsigned short rcount; /* Rx internal byte count */
  83. unsigned long rtemp; /* Rx temp */
  84. unsigned long tstate; /* Tx internal state */
  85. unsigned long tptr; /* Tx internal data pointer */
  86. unsigned short tbptr; /* Tx BD pointer */
  87. unsigned short tcount; /* Tx byte count */
  88. unsigned long ttemp; /* Tx temp */
  89. unsigned long rcrc; /* temp receive CRC */
  90. unsigned long tcrc; /* temp transmit CRC */
  91. /*
  92. * HDLC specific parameter RAM
  93. */
  94. unsigned char RESERVED1[4]; /* Reserved area */
  95. unsigned long c_mask; /* CRC constant */
  96. unsigned long c_pres; /* CRC preset */
  97. unsigned short disfc; /* discarded frame counter */
  98. unsigned short crcec; /* CRC error counter */
  99. unsigned short abtsc; /* abort sequence counter */
  100. unsigned short nmarc; /* nonmatching address rx cnt */
  101. unsigned short retrc; /* frame retransmission cnt */
  102. unsigned short mflr; /* maximum frame length reg */
  103. unsigned short max_cnt; /* maximum length counter */
  104. unsigned short rfthr; /* received frames threshold */
  105. unsigned short rfcnt; /* received frames count */
  106. unsigned short hmask; /* user defined frm addr mask */
  107. unsigned short haddr1; /* user defined frm address 1 */
  108. unsigned short haddr2; /* user defined frm address 2 */
  109. unsigned short haddr3; /* user defined frm address 3 */
  110. unsigned short haddr4; /* user defined frm address 4 */
  111. unsigned short tmp; /* temp */
  112. unsigned short tmp_mb; /* temp */
  113. };
  114. /*****************************************************************
  115. UART parameter RAM
  116. *****************************************************************/
  117. /*
  118. * bits in uart control characters table
  119. */
  120. #define CC_INVALID 0x8000 /* control character is valid */
  121. #define CC_REJ 0x4000 /* don't store char in buffer */
  122. #define CC_CHAR 0x00ff /* control character */
  123. /* UART */
  124. struct uart_pram {
  125. /*
  126. * SCC parameter RAM
  127. */
  128. unsigned short rbase; /* RX BD base address */
  129. unsigned short tbase; /* TX BD base address */
  130. unsigned char rfcr; /* Rx function code */
  131. unsigned char tfcr; /* Tx function code */
  132. unsigned short mrblr; /* Rx buffer length */
  133. unsigned long rstate; /* Rx internal state */
  134. unsigned long rptr; /* Rx internal data pointer */
  135. unsigned short rbptr; /* rb BD Pointer */
  136. unsigned short rcount; /* Rx internal byte count */
  137. unsigned long rx_temp; /* Rx temp */
  138. unsigned long tstate; /* Tx internal state */
  139. unsigned long tptr; /* Tx internal data pointer */
  140. unsigned short tbptr; /* Tx BD pointer */
  141. unsigned short tcount; /* Tx byte count */
  142. unsigned long ttemp; /* Tx temp */
  143. unsigned long rcrc; /* temp receive CRC */
  144. unsigned long tcrc; /* temp transmit CRC */
  145. /*
  146. * UART specific parameter RAM
  147. */
  148. unsigned char RESERVED1[8]; /* Reserved area */
  149. unsigned short max_idl; /* maximum idle characters */
  150. unsigned short idlc; /* rx idle counter (internal) */
  151. unsigned short brkcr; /* break count register */
  152. unsigned short parec; /* Rx parity error counter */
  153. unsigned short frmer; /* Rx framing error counter */
  154. unsigned short nosec; /* Rx noise counter */
  155. unsigned short brkec; /* Rx break character counter */
  156. unsigned short brkln; /* Reaceive break length */
  157. unsigned short uaddr1; /* address character 1 */
  158. unsigned short uaddr2; /* address character 2 */
  159. unsigned short rtemp; /* temp storage */
  160. unsigned short toseq; /* Tx out of sequence char */
  161. unsigned short cc[8]; /* Rx control characters */
  162. unsigned short rccm; /* Rx control char mask */
  163. unsigned short rccr; /* Rx control char register */
  164. unsigned short rlbc; /* Receive last break char */
  165. };
  166. /*****************************************************************
  167. BISYNC parameter RAM
  168. *****************************************************************/
  169. struct bisync_pram {
  170. /*
  171. * SCC parameter RAM
  172. */
  173. unsigned short rbase; /* RX BD base address */
  174. unsigned short tbase; /* TX BD base address */
  175. unsigned char rfcr; /* Rx function code */
  176. unsigned char tfcr; /* Tx function code */
  177. unsigned short mrblr; /* Rx buffer length */
  178. unsigned long rstate; /* Rx internal state */
  179. unsigned long rptr; /* Rx internal data pointer */
  180. unsigned short rbptr; /* rb BD Pointer */
  181. unsigned short rcount; /* Rx internal byte count */
  182. unsigned long rtemp; /* Rx temp */
  183. unsigned long tstate; /* Tx internal state */
  184. unsigned long tptr; /* Tx internal data pointer */
  185. unsigned short tbptr; /* Tx BD pointer */
  186. unsigned short tcount; /* Tx byte count */
  187. unsigned long ttemp; /* Tx temp */
  188. unsigned long rcrc; /* temp receive CRC */
  189. unsigned long tcrc; /* temp transmit CRC */
  190. /*
  191. * BISYNC specific parameter RAM
  192. */
  193. unsigned char RESERVED1[4]; /* Reserved area */
  194. unsigned long crcc; /* CRC Constant Temp Value */
  195. unsigned short prcrc; /* Preset Receiver CRC-16/LRC */
  196. unsigned short ptcrc; /* Preset Transmitter CRC-16/LRC */
  197. unsigned short parec; /* Receive Parity Error Counter */
  198. unsigned short bsync; /* BISYNC SYNC Character */
  199. unsigned short bdle; /* BISYNC DLE Character */
  200. unsigned short cc[8]; /* Rx control characters */
  201. unsigned short rccm; /* Receive Control Character Mask */
  202. };
  203. /*****************************************************************
  204. IOM2 parameter RAM
  205. (overlaid on tx bd[5] of SCC channel[2])
  206. *****************************************************************/
  207. struct iom2_pram {
  208. unsigned short ci_data; /* ci data */
  209. unsigned short monitor_data; /* monitor data */
  210. unsigned short tstate; /* transmitter state */
  211. unsigned short rstate; /* receiver state */
  212. };
  213. /*****************************************************************
  214. SPI/SMC parameter RAM
  215. (overlaid on tx bd[6,7] of SCC channel[2])
  216. *****************************************************************/
  217. #define SPI_R 0x8000 /* Ready bit in BD */
  218. struct spi_pram {
  219. unsigned short rbase; /* Rx BD Base Address */
  220. unsigned short tbase; /* Tx BD Base Address */
  221. unsigned char rfcr; /* Rx function code */
  222. unsigned char tfcr; /* Tx function code */
  223. unsigned short mrblr; /* Rx buffer length */
  224. unsigned long rstate; /* Rx internal state */
  225. unsigned long rptr; /* Rx internal data pointer */
  226. unsigned short rbptr; /* rb BD Pointer */
  227. unsigned short rcount; /* Rx internal byte count */
  228. unsigned long rtemp; /* Rx temp */
  229. unsigned long tstate; /* Tx internal state */
  230. unsigned long tptr; /* Tx internal data pointer */
  231. unsigned short tbptr; /* Tx BD pointer */
  232. unsigned short tcount; /* Tx byte count */
  233. unsigned long ttemp; /* Tx temp */
  234. };
  235. struct smc_uart_pram {
  236. unsigned short rbase; /* Rx BD Base Address */
  237. unsigned short tbase; /* Tx BD Base Address */
  238. unsigned char rfcr; /* Rx function code */
  239. unsigned char tfcr; /* Tx function code */
  240. unsigned short mrblr; /* Rx buffer length */
  241. unsigned long rstate; /* Rx internal state */
  242. unsigned long rptr; /* Rx internal data pointer */
  243. unsigned short rbptr; /* rb BD Pointer */
  244. unsigned short rcount; /* Rx internal byte count */
  245. unsigned long rtemp; /* Rx temp */
  246. unsigned long tstate; /* Tx internal state */
  247. unsigned long tptr; /* Tx internal data pointer */
  248. unsigned short tbptr; /* Tx BD pointer */
  249. unsigned short tcount; /* Tx byte count */
  250. unsigned long ttemp; /* Tx temp */
  251. unsigned short max_idl; /* Maximum IDLE Characters */
  252. unsigned short idlc; /* Temporary IDLE Counter */
  253. unsigned short brkln; /* Last Rx Break Length */
  254. unsigned short brkec; /* Rx Break Condition Counter */
  255. unsigned short brkcr; /* Break Count Register (Tx) */
  256. unsigned short r_mask; /* Temporary bit mask */
  257. };
  258. struct smc_trnsp_pram {
  259. unsigned short rbase; /* rx BD Base Address */
  260. unsigned short tbase; /* Tx BD Base Address */
  261. unsigned char rfcr; /* Rx function code */
  262. unsigned char tfcr; /* Tx function code */
  263. unsigned short mrblr; /* Rx buffer length */
  264. unsigned long rstate; /* Rx internal state */
  265. unsigned long rptr; /* Rx internal data pointer */
  266. unsigned short rbptr; /* rb BD Pointer */
  267. unsigned short rcount; /* Rx internal byte count */
  268. unsigned long rtemp; /* Rx temp */
  269. unsigned long tstate; /* Tx internal state */
  270. unsigned long tptr; /* Tx internal data pointer */
  271. unsigned short tbptr; /* Tx BD pointer */
  272. unsigned short tcount; /* Tx byte count */
  273. unsigned long ttemp; /* Tx temp */
  274. unsigned short reserved[5]; /* Reserved */
  275. };
  276. struct idma_pram {
  277. unsigned short ibase; /* IDMA BD Base Address */
  278. unsigned short ibptr; /* IDMA buffer descriptor pointer */
  279. unsigned long istate; /* IDMA internal state */
  280. unsigned long itemp; /* IDMA temp */
  281. };
  282. struct ethernet_pram {
  283. /*
  284. * SCC parameter RAM
  285. */
  286. unsigned short rbase; /* RX BD base address */
  287. unsigned short tbase; /* TX BD base address */
  288. unsigned char rfcr; /* Rx function code */
  289. unsigned char tfcr; /* Tx function code */
  290. unsigned short mrblr; /* Rx buffer length */
  291. unsigned long rstate; /* Rx internal state */
  292. unsigned long rptr; /* Rx internal data pointer */
  293. unsigned short rbptr; /* rb BD Pointer */
  294. unsigned short rcount; /* Rx internal byte count */
  295. unsigned long rtemp; /* Rx temp */
  296. unsigned long tstate; /* Tx internal state */
  297. unsigned long tptr; /* Tx internal data pointer */
  298. unsigned short tbptr; /* Tx BD pointer */
  299. unsigned short tcount; /* Tx byte count */
  300. unsigned long ttemp; /* Tx temp */
  301. unsigned long rcrc; /* temp receive CRC */
  302. unsigned long tcrc; /* temp transmit CRC */
  303. /*
  304. * ETHERNET specific parameter RAM
  305. */
  306. unsigned long c_pres; /* preset CRC */
  307. unsigned long c_mask; /* constant mask for CRC */
  308. unsigned long crcec; /* CRC error counter */
  309. unsigned long alec; /* alighnment error counter */
  310. unsigned long disfc; /* discard frame counter */
  311. unsigned short pads; /* short frame PAD characters */
  312. unsigned short ret_lim; /* retry limit threshold */
  313. unsigned short ret_cnt; /* retry limit counter */
  314. unsigned short mflr; /* maximum frame length reg */
  315. unsigned short minflr; /* minimum frame length reg */
  316. unsigned short maxd1; /* maximum DMA1 length reg */
  317. unsigned short maxd2; /* maximum DMA2 length reg */
  318. unsigned short maxd; /* rx max DMA */
  319. unsigned short dma_cnt; /* rx dma counter */
  320. unsigned short max_b; /* max bd byte count */
  321. unsigned short gaddr1; /* group address filter 1 */
  322. unsigned short gaddr2; /* group address filter 2 */
  323. unsigned short gaddr3; /* group address filter 3 */
  324. unsigned short gaddr4; /* group address filter 4 */
  325. unsigned long tbuf0_data0; /* save area 0 - current frm */
  326. unsigned long tbuf0_data1; /* save area 1 - current frm */
  327. unsigned long tbuf0_rba0;
  328. unsigned long tbuf0_crc;
  329. unsigned short tbuf0_bcnt;
  330. union {
  331. unsigned char b[6];
  332. struct {
  333. unsigned short high;
  334. unsigned short middl;
  335. unsigned short low;
  336. } w;
  337. } paddr;
  338. unsigned short p_per; /* persistence */
  339. unsigned short rfbd_ptr; /* rx first bd pointer */
  340. unsigned short tfbd_ptr; /* tx first bd pointer */
  341. unsigned short tlbd_ptr; /* tx last bd pointer */
  342. unsigned long tbuf1_data0; /* save area 0 - next frame */
  343. unsigned long tbuf1_data1; /* save area 1 - next frame */
  344. unsigned long tbuf1_rba0;
  345. unsigned long tbuf1_crc;
  346. unsigned short tbuf1_bcnt;
  347. unsigned short tx_len; /* tx frame length counter */
  348. unsigned short iaddr1; /* individual address filter 1*/
  349. unsigned short iaddr2; /* individual address filter 2*/
  350. unsigned short iaddr3; /* individual address filter 3*/
  351. unsigned short iaddr4; /* individual address filter 4*/
  352. unsigned short boff_cnt; /* back-off counter */
  353. unsigned short taddr_h; /* temp address (MSB) */
  354. unsigned short taddr_m; /* temp address */
  355. unsigned short taddr_l; /* temp address (LSB) */
  356. };
  357. struct transparent_pram {
  358. /*
  359. * SCC parameter RAM
  360. */
  361. unsigned short rbase; /* RX BD base address */
  362. unsigned short tbase; /* TX BD base address */
  363. unsigned char rfcr; /* Rx function code */
  364. unsigned char tfcr; /* Tx function code */
  365. unsigned short mrblr; /* Rx buffer length */
  366. unsigned long rstate; /* Rx internal state */
  367. unsigned long rptr; /* Rx internal data pointer */
  368. unsigned short rbptr; /* rb BD Pointer */
  369. unsigned short rcount; /* Rx internal byte count */
  370. unsigned long rtemp; /* Rx temp */
  371. unsigned long tstate; /* Tx internal state */
  372. unsigned long tptr; /* Tx internal data pointer */
  373. unsigned short tbptr; /* Tx BD pointer */
  374. unsigned short tcount; /* Tx byte count */
  375. unsigned long ttemp; /* Tx temp */
  376. unsigned long rcrc; /* temp receive CRC */
  377. unsigned long tcrc; /* temp transmit CRC */
  378. /*
  379. * TRANSPARENT specific parameter RAM
  380. */
  381. unsigned long crc_p; /* CRC Preset */
  382. unsigned long crc_c; /* CRC constant */
  383. };
  384. struct timer_pram {
  385. /*
  386. * RISC timers parameter RAM
  387. */
  388. unsigned short tm_base; /* RISC timer table base adr */
  389. unsigned short tm_ptr; /* RISC timer table pointer */
  390. unsigned short r_tmr; /* RISC timer mode register */
  391. unsigned short r_tmv; /* RISC timer valid register */
  392. unsigned long tm_cmd; /* RISC timer cmd register */
  393. unsigned long tm_cnt; /* RISC timer internal cnt */
  394. };
  395. #endif