cm_bf561.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445
  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2006
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  36. #include <linux/usb/isp1362.h>
  37. #endif
  38. #include <linux/ata_platform.h>
  39. #include <linux/irq.h>
  40. #include <asm/dma.h>
  41. #include <asm/bfin5xx_spi.h>
  42. #include <asm/portmux.h>
  43. #include <asm/dpmc.h>
  44. /*
  45. * Name the Board for the /proc/cpuinfo
  46. */
  47. const char bfin_board_name[] = "Bluetechnix CM BF561";
  48. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  49. /* all SPI peripherals info goes here */
  50. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  51. static struct mtd_partition bfin_spi_flash_partitions[] = {
  52. {
  53. .name = "bootloader(spi)",
  54. .size = 0x00020000,
  55. .offset = 0,
  56. .mask_flags = MTD_CAP_ROM
  57. }, {
  58. .name = "linux kernel(spi)",
  59. .size = 0xe0000,
  60. .offset = 0x20000
  61. }, {
  62. .name = "file system(spi)",
  63. .size = 0x700000,
  64. .offset = 0x00100000,
  65. }
  66. };
  67. static struct flash_platform_data bfin_spi_flash_data = {
  68. .name = "m25p80",
  69. .parts = bfin_spi_flash_partitions,
  70. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  71. .type = "m25p64",
  72. };
  73. /* SPI flash chip (m25p64) */
  74. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  75. .enable_dma = 0, /* use dma transfer with this chip*/
  76. .bits_per_word = 8,
  77. };
  78. #endif
  79. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  80. /* SPI ADC chip */
  81. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  82. .enable_dma = 1, /* use dma transfer with this chip*/
  83. .bits_per_word = 16,
  84. };
  85. #endif
  86. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  87. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  88. .enable_dma = 0,
  89. .bits_per_word = 16,
  90. };
  91. #endif
  92. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  93. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  94. .enable_dma = 0,
  95. .bits_per_word = 16,
  96. };
  97. #endif
  98. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  99. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  100. .enable_dma = 0,
  101. .bits_per_word = 8,
  102. };
  103. #endif
  104. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  105. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  106. {
  107. /* the modalias must be the same as spi device driver name */
  108. .modalias = "m25p80", /* Name of spi_driver for this device */
  109. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  110. .bus_num = 0, /* Framework bus number */
  111. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  112. .platform_data = &bfin_spi_flash_data,
  113. .controller_data = &spi_flash_chip_info,
  114. .mode = SPI_MODE_3,
  115. },
  116. #endif
  117. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  118. {
  119. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  120. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  121. .bus_num = 0, /* Framework bus number */
  122. .chip_select = 1, /* Framework chip select. */
  123. .platform_data = NULL, /* No spi_driver specific config */
  124. .controller_data = &spi_adc_chip_info,
  125. },
  126. #endif
  127. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  128. {
  129. .modalias = "ad1836-spi",
  130. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  131. .bus_num = 0,
  132. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  133. .controller_data = &ad1836_spi_chip_info,
  134. },
  135. #endif
  136. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  137. {
  138. .modalias = "ad9960-spi",
  139. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  140. .bus_num = 0,
  141. .chip_select = 1,
  142. .controller_data = &ad9960_spi_chip_info,
  143. },
  144. #endif
  145. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  146. {
  147. .modalias = "mmc_spi",
  148. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  149. .bus_num = 0,
  150. .chip_select = 5,
  151. .controller_data = &mmc_spi_chip_info,
  152. .mode = SPI_MODE_3,
  153. },
  154. #endif
  155. };
  156. /* SPI (0) */
  157. static struct resource bfin_spi0_resource[] = {
  158. [0] = {
  159. .start = SPI0_REGBASE,
  160. .end = SPI0_REGBASE + 0xFF,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. [1] = {
  164. .start = CH_SPI,
  165. .end = CH_SPI,
  166. .flags = IORESOURCE_IRQ,
  167. }
  168. };
  169. /* SPI controller data */
  170. static struct bfin5xx_spi_master bfin_spi0_info = {
  171. .num_chipselect = 8,
  172. .enable_dma = 1, /* master has the ability to do dma transfer */
  173. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  174. };
  175. static struct platform_device bfin_spi0_device = {
  176. .name = "bfin-spi",
  177. .id = 0, /* Bus number */
  178. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  179. .resource = bfin_spi0_resource,
  180. .dev = {
  181. .platform_data = &bfin_spi0_info, /* Passed to driver */
  182. },
  183. };
  184. #endif /* spi master and devices */
  185. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  186. static struct platform_device hitachi_fb_device = {
  187. .name = "hitachi-tx09",
  188. };
  189. #endif
  190. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  191. static struct resource smc91x_resources[] = {
  192. {
  193. .name = "smc91x-regs",
  194. .start = 0x28000300,
  195. .end = 0x28000300 + 16,
  196. .flags = IORESOURCE_MEM,
  197. }, {
  198. .start = IRQ_PF0,
  199. .end = IRQ_PF0,
  200. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  201. },
  202. };
  203. static struct platform_device smc91x_device = {
  204. .name = "smc91x",
  205. .id = 0,
  206. .num_resources = ARRAY_SIZE(smc91x_resources),
  207. .resource = smc91x_resources,
  208. };
  209. #endif
  210. static struct resource bfin_gpios_resources = {
  211. .start = 0,
  212. .end = MAX_BLACKFIN_GPIOS - 1,
  213. .flags = IORESOURCE_IRQ,
  214. };
  215. static struct platform_device bfin_gpios_device = {
  216. .name = "simple-gpio",
  217. .id = -1,
  218. .num_resources = 1,
  219. .resource = &bfin_gpios_resources,
  220. };
  221. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  222. static struct resource isp1362_hcd_resources[] = {
  223. {
  224. .start = 0x24008000,
  225. .end = 0x24008000,
  226. .flags = IORESOURCE_MEM,
  227. }, {
  228. .start = 0x24008004,
  229. .end = 0x24008004,
  230. .flags = IORESOURCE_MEM,
  231. }, {
  232. .start = IRQ_PF47,
  233. .end = IRQ_PF47,
  234. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  235. },
  236. };
  237. static struct isp1362_platform_data isp1362_priv = {
  238. .sel15Kres = 1,
  239. .clknotstop = 0,
  240. .oc_enable = 0,
  241. .int_act_high = 0,
  242. .int_edge_triggered = 0,
  243. .remote_wakeup_connected = 0,
  244. .no_power_switching = 1,
  245. .power_switching_mode = 0,
  246. };
  247. static struct platform_device isp1362_hcd_device = {
  248. .name = "isp1362-hcd",
  249. .id = 0,
  250. .dev = {
  251. .platform_data = &isp1362_priv,
  252. },
  253. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  254. .resource = isp1362_hcd_resources,
  255. };
  256. #endif
  257. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  258. static struct resource bfin_uart_resources[] = {
  259. {
  260. .start = 0xFFC00400,
  261. .end = 0xFFC004FF,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. };
  265. static struct platform_device bfin_uart_device = {
  266. .name = "bfin-uart",
  267. .id = 1,
  268. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  269. .resource = bfin_uart_resources,
  270. };
  271. #endif
  272. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  273. #ifdef CONFIG_BFIN_SIR0
  274. static struct resource bfin_sir0_resources[] = {
  275. {
  276. .start = 0xFFC00400,
  277. .end = 0xFFC004FF,
  278. .flags = IORESOURCE_MEM,
  279. },
  280. {
  281. .start = IRQ_UART0_RX,
  282. .end = IRQ_UART0_RX+1,
  283. .flags = IORESOURCE_IRQ,
  284. },
  285. {
  286. .start = CH_UART0_RX,
  287. .end = CH_UART0_RX+1,
  288. .flags = IORESOURCE_DMA,
  289. },
  290. };
  291. static struct platform_device bfin_sir0_device = {
  292. .name = "bfin_sir",
  293. .id = 0,
  294. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  295. .resource = bfin_sir0_resources,
  296. };
  297. #endif
  298. #endif
  299. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  300. #define PATA_INT IRQ_PF46
  301. static struct pata_platform_info bfin_pata_platform_data = {
  302. .ioport_shift = 2,
  303. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  304. };
  305. static struct resource bfin_pata_resources[] = {
  306. {
  307. .start = 0x2400C000,
  308. .end = 0x2400C001F,
  309. .flags = IORESOURCE_MEM,
  310. },
  311. {
  312. .start = 0x2400D018,
  313. .end = 0x2400D01B,
  314. .flags = IORESOURCE_MEM,
  315. },
  316. {
  317. .start = PATA_INT,
  318. .end = PATA_INT,
  319. .flags = IORESOURCE_IRQ,
  320. },
  321. };
  322. static struct platform_device bfin_pata_device = {
  323. .name = "pata_platform",
  324. .id = -1,
  325. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  326. .resource = bfin_pata_resources,
  327. .dev = {
  328. .platform_data = &bfin_pata_platform_data,
  329. }
  330. };
  331. #endif
  332. static const unsigned int cclk_vlev_datasheet[] =
  333. {
  334. VRPAIR(VLEV_085, 250000000),
  335. VRPAIR(VLEV_090, 300000000),
  336. VRPAIR(VLEV_095, 313000000),
  337. VRPAIR(VLEV_100, 350000000),
  338. VRPAIR(VLEV_105, 400000000),
  339. VRPAIR(VLEV_110, 444000000),
  340. VRPAIR(VLEV_115, 450000000),
  341. VRPAIR(VLEV_120, 475000000),
  342. VRPAIR(VLEV_125, 500000000),
  343. VRPAIR(VLEV_130, 600000000),
  344. };
  345. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  346. .tuple_tab = cclk_vlev_datasheet,
  347. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  348. .vr_settling_time = 25 /* us */,
  349. };
  350. static struct platform_device bfin_dpmc = {
  351. .name = "bfin dpmc",
  352. .dev = {
  353. .platform_data = &bfin_dmpc_vreg_data,
  354. },
  355. };
  356. static struct platform_device *cm_bf561_devices[] __initdata = {
  357. &bfin_dpmc,
  358. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  359. &hitachi_fb_device,
  360. #endif
  361. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  362. &bfin_uart_device,
  363. #endif
  364. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  365. #ifdef CONFIG_BFIN_SIR0
  366. &bfin_sir0_device,
  367. #endif
  368. #endif
  369. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  370. &isp1362_hcd_device,
  371. #endif
  372. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  373. &smc91x_device,
  374. #endif
  375. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  376. &bfin_spi0_device,
  377. #endif
  378. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  379. &bfin_pata_device,
  380. #endif
  381. &bfin_gpios_device,
  382. };
  383. static int __init cm_bf561_init(void)
  384. {
  385. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  386. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  387. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  388. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  389. #endif
  390. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  391. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  392. #endif
  393. return 0;
  394. }
  395. arch_initcall(cm_bf561_init);