ezkit.c 15 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf538/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #include <linux/irq.h>
  37. #include <linux/interrupt.h>
  38. #include <asm/bfin5xx_spi.h>
  39. #include <asm/dma.h>
  40. #include <asm/gpio.h>
  41. #include <asm/nand.h>
  42. #include <asm/portmux.h>
  43. #include <asm/dpmc.h>
  44. #include <linux/input.h>
  45. /*
  46. * Name the Board for the /proc/cpuinfo
  47. */
  48. const char bfin_board_name[] = "ADI BF538-EZKIT";
  49. /*
  50. * Driver needs to know address, irq and flag pin.
  51. */
  52. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  53. static struct platform_device rtc_device = {
  54. .name = "rtc-bfin",
  55. .id = -1,
  56. };
  57. #endif
  58. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  59. static struct resource bfin_uart_resources[] = {
  60. #ifdef CONFIG_SERIAL_BFIN_UART0
  61. {
  62. .start = 0xFFC00400,
  63. .end = 0xFFC004FF,
  64. .flags = IORESOURCE_MEM,
  65. },
  66. #endif
  67. #ifdef CONFIG_SERIAL_BFIN_UART1
  68. {
  69. .start = 0xFFC02000,
  70. .end = 0xFFC020FF,
  71. .flags = IORESOURCE_MEM,
  72. },
  73. #endif
  74. #ifdef CONFIG_SERIAL_BFIN_UART2
  75. {
  76. .start = 0xFFC02100,
  77. .end = 0xFFC021FF,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. #endif
  81. };
  82. static struct platform_device bfin_uart_device = {
  83. .name = "bfin-uart",
  84. .id = 1,
  85. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  86. .resource = bfin_uart_resources,
  87. };
  88. #endif
  89. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  90. #ifdef CONFIG_BFIN_SIR0
  91. static struct resource bfin_sir0_resources[] = {
  92. {
  93. .start = 0xFFC00400,
  94. .end = 0xFFC004FF,
  95. .flags = IORESOURCE_MEM,
  96. },
  97. {
  98. .start = IRQ_UART0_RX,
  99. .end = IRQ_UART0_RX+1,
  100. .flags = IORESOURCE_IRQ,
  101. },
  102. {
  103. .start = CH_UART0_RX,
  104. .end = CH_UART0_RX+1,
  105. .flags = IORESOURCE_DMA,
  106. },
  107. };
  108. static struct platform_device bfin_sir0_device = {
  109. .name = "bfin_sir",
  110. .id = 0,
  111. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  112. .resource = bfin_sir0_resources,
  113. };
  114. #endif
  115. #ifdef CONFIG_BFIN_SIR1
  116. static struct resource bfin_sir1_resources[] = {
  117. {
  118. .start = 0xFFC02000,
  119. .end = 0xFFC020FF,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. {
  123. .start = IRQ_UART1_RX,
  124. .end = IRQ_UART1_RX+1,
  125. .flags = IORESOURCE_IRQ,
  126. },
  127. {
  128. .start = CH_UART1_RX,
  129. .end = CH_UART1_RX+1,
  130. .flags = IORESOURCE_DMA,
  131. },
  132. };
  133. static struct platform_device bfin_sir1_device = {
  134. .name = "bfin_sir",
  135. .id = 1,
  136. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  137. .resource = bfin_sir1_resources,
  138. };
  139. #endif
  140. #ifdef CONFIG_BFIN_SIR2
  141. static struct resource bfin_sir2_resources[] = {
  142. {
  143. .start = 0xFFC02100,
  144. .end = 0xFFC021FF,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. {
  148. .start = IRQ_UART2_RX,
  149. .end = IRQ_UART2_RX+1,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. {
  153. .start = CH_UART2_RX,
  154. .end = CH_UART2_RX+1,
  155. .flags = IORESOURCE_DMA,
  156. },
  157. };
  158. static struct platform_device bfin_sir2_device = {
  159. .name = "bfin_sir",
  160. .id = 2,
  161. .num_resources = ARRAY_SIZE(bfin_sir2_resources),
  162. .resource = bfin_sir2_resources,
  163. };
  164. #endif
  165. #endif
  166. /*
  167. * USB-LAN EzExtender board
  168. * Driver needs to know address, irq and flag pin.
  169. */
  170. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  171. static struct resource smc91x_resources[] = {
  172. {
  173. .name = "smc91x-regs",
  174. .start = 0x20310300,
  175. .end = 0x20310300 + 16,
  176. .flags = IORESOURCE_MEM,
  177. }, {
  178. .start = IRQ_PF0,
  179. .end = IRQ_PF0,
  180. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  181. },
  182. };
  183. static struct platform_device smc91x_device = {
  184. .name = "smc91x",
  185. .id = 0,
  186. .num_resources = ARRAY_SIZE(smc91x_resources),
  187. .resource = smc91x_resources,
  188. };
  189. #endif
  190. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  191. /* all SPI peripherals info goes here */
  192. #if defined(CONFIG_MTD_M25P80) \
  193. || defined(CONFIG_MTD_M25P80_MODULE)
  194. /* SPI flash chip (m25p16) */
  195. static struct mtd_partition bfin_spi_flash_partitions[] = {
  196. {
  197. .name = "bootloader(spi)",
  198. .size = 0x00040000,
  199. .offset = 0,
  200. .mask_flags = MTD_CAP_ROM
  201. }, {
  202. .name = "linux kernel(spi)",
  203. .size = 0x1c0000,
  204. .offset = 0x40000
  205. }
  206. };
  207. static struct flash_platform_data bfin_spi_flash_data = {
  208. .name = "m25p80",
  209. .parts = bfin_spi_flash_partitions,
  210. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  211. .type = "m25p16",
  212. };
  213. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  214. .enable_dma = 0, /* use dma transfer with this chip*/
  215. .bits_per_word = 8,
  216. .cs_change_per_word = 0,
  217. };
  218. #endif
  219. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  220. #include <linux/spi/ad7879.h>
  221. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  222. .model = 7879, /* Model = AD7879 */
  223. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  224. .pressure_max = 10000,
  225. .pressure_min = 0,
  226. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  227. .acquisition_time = 1, /* 4us acquisition time per sample */
  228. .median = 2, /* do 8 measurements */
  229. .averaging = 1, /* take the average of 4 middle samples */
  230. .pen_down_acc_interval = 255, /* 9.4 ms */
  231. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  232. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  233. };
  234. #endif
  235. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  236. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  237. .enable_dma = 0,
  238. .bits_per_word = 16,
  239. };
  240. #endif
  241. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  242. #include <asm/bfin-lq035q1.h>
  243. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  244. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  245. .use_bl = 0, /* let something else control the LCD Blacklight */
  246. .gpio_bl = GPIO_PF7,
  247. };
  248. static struct resource bfin_lq035q1_resources[] = {
  249. {
  250. .start = IRQ_PPI_ERROR,
  251. .end = IRQ_PPI_ERROR,
  252. .flags = IORESOURCE_IRQ,
  253. },
  254. };
  255. static struct platform_device bfin_lq035q1_device = {
  256. .name = "bfin-lq035q1",
  257. .id = -1,
  258. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  259. .resource = bfin_lq035q1_resources,
  260. .dev = {
  261. .platform_data = &bfin_lq035q1_data,
  262. },
  263. };
  264. #endif
  265. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  266. static struct bfin5xx_spi_chip spidev_chip_info = {
  267. .enable_dma = 0,
  268. .bits_per_word = 8,
  269. };
  270. #endif
  271. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  272. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  273. .enable_dma = 0,
  274. .bits_per_word = 8,
  275. };
  276. #endif
  277. static struct spi_board_info bf538_spi_board_info[] __initdata = {
  278. #if defined(CONFIG_MTD_M25P80) \
  279. || defined(CONFIG_MTD_M25P80_MODULE)
  280. {
  281. /* the modalias must be the same as spi device driver name */
  282. .modalias = "m25p80", /* Name of spi_driver for this device */
  283. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  284. .bus_num = 0, /* Framework bus number */
  285. .chip_select = 1, /* SPI_SSEL1*/
  286. .platform_data = &bfin_spi_flash_data,
  287. .controller_data = &spi_flash_chip_info,
  288. .mode = SPI_MODE_3,
  289. },
  290. #endif
  291. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  292. {
  293. .modalias = "ad7879",
  294. .platform_data = &bfin_ad7879_ts_info,
  295. .irq = IRQ_PF3,
  296. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  297. .bus_num = 0,
  298. .chip_select = 1,
  299. .controller_data = &spi_ad7879_chip_info,
  300. .mode = SPI_CPHA | SPI_CPOL,
  301. },
  302. #endif
  303. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  304. {
  305. .modalias = "bfin-lq035q1-spi",
  306. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  307. .bus_num = 0,
  308. .chip_select = 2,
  309. .controller_data = &lq035q1_spi_chip_info,
  310. .mode = SPI_CPHA | SPI_CPOL,
  311. },
  312. #endif
  313. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  314. {
  315. .modalias = "spidev",
  316. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  317. .bus_num = 0,
  318. .chip_select = 1,
  319. .controller_data = &spidev_chip_info,
  320. },
  321. #endif
  322. };
  323. /* SPI (0) */
  324. static struct resource bfin_spi0_resource[] = {
  325. [0] = {
  326. .start = SPI0_REGBASE,
  327. .end = SPI0_REGBASE + 0xFF,
  328. .flags = IORESOURCE_MEM,
  329. },
  330. [1] = {
  331. .start = CH_SPI0,
  332. .end = CH_SPI0,
  333. .flags = IORESOURCE_IRQ,
  334. }
  335. };
  336. /* SPI (1) */
  337. static struct resource bfin_spi1_resource[] = {
  338. [0] = {
  339. .start = SPI1_REGBASE,
  340. .end = SPI1_REGBASE + 0xFF,
  341. .flags = IORESOURCE_MEM,
  342. },
  343. [1] = {
  344. .start = CH_SPI1,
  345. .end = CH_SPI1,
  346. .flags = IORESOURCE_IRQ,
  347. }
  348. };
  349. /* SPI (2) */
  350. static struct resource bfin_spi2_resource[] = {
  351. [0] = {
  352. .start = SPI2_REGBASE,
  353. .end = SPI2_REGBASE + 0xFF,
  354. .flags = IORESOURCE_MEM,
  355. },
  356. [1] = {
  357. .start = CH_SPI2,
  358. .end = CH_SPI2,
  359. .flags = IORESOURCE_IRQ,
  360. }
  361. };
  362. /* SPI controller data */
  363. static struct bfin5xx_spi_master bf538_spi_master_info0 = {
  364. .num_chipselect = 8,
  365. .enable_dma = 1, /* master has the ability to do dma transfer */
  366. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  367. };
  368. static struct platform_device bf538_spi_master0 = {
  369. .name = "bfin-spi",
  370. .id = 0, /* Bus number */
  371. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  372. .resource = bfin_spi0_resource,
  373. .dev = {
  374. .platform_data = &bf538_spi_master_info0, /* Passed to driver */
  375. },
  376. };
  377. static struct bfin5xx_spi_master bf538_spi_master_info1 = {
  378. .num_chipselect = 8,
  379. .enable_dma = 1, /* master has the ability to do dma transfer */
  380. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  381. };
  382. static struct platform_device bf538_spi_master1 = {
  383. .name = "bfin-spi",
  384. .id = 1, /* Bus number */
  385. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  386. .resource = bfin_spi1_resource,
  387. .dev = {
  388. .platform_data = &bf538_spi_master_info1, /* Passed to driver */
  389. },
  390. };
  391. static struct bfin5xx_spi_master bf538_spi_master_info2 = {
  392. .num_chipselect = 8,
  393. .enable_dma = 1, /* master has the ability to do dma transfer */
  394. .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
  395. };
  396. static struct platform_device bf538_spi_master2 = {
  397. .name = "bfin-spi",
  398. .id = 2, /* Bus number */
  399. .num_resources = ARRAY_SIZE(bfin_spi2_resource),
  400. .resource = bfin_spi2_resource,
  401. .dev = {
  402. .platform_data = &bf538_spi_master_info2, /* Passed to driver */
  403. },
  404. };
  405. #endif /* spi master and devices */
  406. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  407. static struct resource bfin_twi0_resource[] = {
  408. [0] = {
  409. .start = TWI0_REGBASE,
  410. .end = TWI0_REGBASE + 0xFF,
  411. .flags = IORESOURCE_MEM,
  412. },
  413. [1] = {
  414. .start = IRQ_TWI0,
  415. .end = IRQ_TWI0,
  416. .flags = IORESOURCE_IRQ,
  417. },
  418. };
  419. static struct platform_device i2c_bfin_twi0_device = {
  420. .name = "i2c-bfin-twi",
  421. .id = 0,
  422. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  423. .resource = bfin_twi0_resource,
  424. };
  425. #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
  426. static struct resource bfin_twi1_resource[] = {
  427. [0] = {
  428. .start = TWI1_REGBASE,
  429. .end = TWI1_REGBASE + 0xFF,
  430. .flags = IORESOURCE_MEM,
  431. },
  432. [1] = {
  433. .start = IRQ_TWI1,
  434. .end = IRQ_TWI1,
  435. .flags = IORESOURCE_IRQ,
  436. },
  437. };
  438. static struct platform_device i2c_bfin_twi1_device = {
  439. .name = "i2c-bfin-twi",
  440. .id = 1,
  441. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  442. .resource = bfin_twi1_resource,
  443. };
  444. #endif
  445. #endif
  446. static struct resource bfin_gpios_resources = {
  447. .start = 0,
  448. .end = MAX_BLACKFIN_GPIOS - 1,
  449. .flags = IORESOURCE_IRQ,
  450. };
  451. static struct platform_device bfin_gpios_device = {
  452. .name = "simple-gpio",
  453. .id = -1,
  454. .num_resources = 1,
  455. .resource = &bfin_gpios_resources,
  456. };
  457. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  458. #include <linux/gpio_keys.h>
  459. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  460. {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
  461. };
  462. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  463. .buttons = bfin_gpio_keys_table,
  464. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  465. };
  466. static struct platform_device bfin_device_gpiokeys = {
  467. .name = "gpio-keys",
  468. .dev = {
  469. .platform_data = &bfin_gpio_keys_data,
  470. },
  471. };
  472. #endif
  473. static const unsigned int cclk_vlev_datasheet[] =
  474. {
  475. /*
  476. * Internal VLEV BF538SBBC1533
  477. ****temporarily using these values until data sheet is updated
  478. */
  479. VRPAIR(VLEV_100, 150000000),
  480. VRPAIR(VLEV_100, 250000000),
  481. VRPAIR(VLEV_110, 276000000),
  482. VRPAIR(VLEV_115, 301000000),
  483. VRPAIR(VLEV_120, 525000000),
  484. VRPAIR(VLEV_125, 550000000),
  485. VRPAIR(VLEV_130, 600000000),
  486. };
  487. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  488. .tuple_tab = cclk_vlev_datasheet,
  489. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  490. .vr_settling_time = 25 /* us */,
  491. };
  492. static struct platform_device bfin_dpmc = {
  493. .name = "bfin dpmc",
  494. .dev = {
  495. .platform_data = &bfin_dmpc_vreg_data,
  496. },
  497. };
  498. static struct platform_device *cm_bf538_devices[] __initdata = {
  499. &bfin_dpmc,
  500. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  501. &rtc_device,
  502. #endif
  503. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  504. &bfin_uart_device,
  505. #endif
  506. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  507. &bf538_spi_master0,
  508. &bf538_spi_master1,
  509. &bf538_spi_master2,
  510. #endif
  511. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  512. &i2c_bfin_twi0_device,
  513. &i2c_bfin_twi1_device,
  514. #endif
  515. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  516. #ifdef CONFIG_BFIN_SIR0
  517. &bfin_sir0_device,
  518. #endif
  519. #ifdef CONFIG_BFIN_SIR1
  520. &bfin_sir1_device,
  521. #endif
  522. #ifdef CONFIG_BFIN_SIR2
  523. &bfin_sir2_device,
  524. #endif
  525. #endif
  526. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  527. &smc91x_device,
  528. #endif
  529. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  530. &bfin_lq035q1_device,
  531. #endif
  532. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  533. &bfin_device_gpiokeys,
  534. #endif
  535. &bfin_gpios_device,
  536. };
  537. static int __init ezkit_init(void)
  538. {
  539. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  540. platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
  541. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  542. spi_register_board_info(bf538_spi_board_info,
  543. ARRAY_SIZE(bf538_spi_board_info));
  544. #endif
  545. return 0;
  546. }
  547. arch_initcall(ezkit_init);