smc37c93x.c 6.2 KB

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  1. /*
  2. * SMC 37C93X initialization code
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/slab.h>
  6. #include <linux/mm.h>
  7. #include <linux/init.h>
  8. #include <linux/delay.h>
  9. #include <asm/hwrpb.h>
  10. #include <asm/io.h>
  11. #include <asm/segment.h>
  12. #define SMC_DEBUG 0
  13. #if SMC_DEBUG
  14. # define DBG_DEVS(args) printk args
  15. #else
  16. # define DBG_DEVS(args)
  17. #endif
  18. #define KB 1024
  19. #define MB (1024*KB)
  20. #define GB (1024*MB)
  21. /* device "activate" register contents */
  22. #define DEVICE_ON 1
  23. #define DEVICE_OFF 0
  24. /* configuration on/off keys */
  25. #define CONFIG_ON_KEY 0x55
  26. #define CONFIG_OFF_KEY 0xaa
  27. /* configuration space device definitions */
  28. #define FDC 0
  29. #define IDE1 1
  30. #define IDE2 2
  31. #define PARP 3
  32. #define SER1 4
  33. #define SER2 5
  34. #define RTCL 6
  35. #define KYBD 7
  36. #define AUXIO 8
  37. /* Chip register offsets from base */
  38. #define CONFIG_CONTROL 0x02
  39. #define INDEX_ADDRESS 0x03
  40. #define LOGICAL_DEVICE_NUMBER 0x07
  41. #define DEVICE_ID 0x20
  42. #define DEVICE_REV 0x21
  43. #define POWER_CONTROL 0x22
  44. #define POWER_MGMT 0x23
  45. #define OSC 0x24
  46. #define ACTIVATE 0x30
  47. #define ADDR_HI 0x60
  48. #define ADDR_LO 0x61
  49. #define INTERRUPT_SEL 0x70
  50. #define INTERRUPT_SEL_2 0x72 /* KYBD/MOUS only */
  51. #define DMA_CHANNEL_SEL 0x74 /* FDC/PARP only */
  52. #define FDD_MODE_REGISTER 0x90
  53. #define FDD_OPTION_REGISTER 0x91
  54. /* values that we read back that are expected ... */
  55. #define VALID_DEVICE_ID 2
  56. /* default device addresses */
  57. #define KYBD_INTERRUPT 1
  58. #define MOUS_INTERRUPT 12
  59. #define COM2_BASE 0x2f8
  60. #define COM2_INTERRUPT 3
  61. #define COM1_BASE 0x3f8
  62. #define COM1_INTERRUPT 4
  63. #define PARP_BASE 0x3bc
  64. #define PARP_INTERRUPT 7
  65. static unsigned long __init SMCConfigState(unsigned long baseAddr)
  66. {
  67. unsigned char devId;
  68. unsigned char devRev;
  69. unsigned long configPort;
  70. unsigned long indexPort;
  71. unsigned long dataPort;
  72. int i;
  73. configPort = indexPort = baseAddr;
  74. dataPort = configPort + 1;
  75. #define NUM_RETRIES 5
  76. for (i = 0; i < NUM_RETRIES; i++)
  77. {
  78. outb(CONFIG_ON_KEY, configPort);
  79. outb(CONFIG_ON_KEY, configPort);
  80. outb(DEVICE_ID, indexPort);
  81. devId = inb(dataPort);
  82. if (devId == VALID_DEVICE_ID) {
  83. outb(DEVICE_REV, indexPort);
  84. devRev = inb(dataPort);
  85. break;
  86. }
  87. else
  88. udelay(100);
  89. }
  90. return (i != NUM_RETRIES) ? baseAddr : 0L;
  91. }
  92. static void __init SMCRunState(unsigned long baseAddr)
  93. {
  94. outb(CONFIG_OFF_KEY, baseAddr);
  95. }
  96. static unsigned long __init SMCDetectUltraIO(void)
  97. {
  98. unsigned long baseAddr;
  99. baseAddr = 0x3F0;
  100. if ( ( baseAddr = SMCConfigState( baseAddr ) ) == 0x3F0 ) {
  101. return( baseAddr );
  102. }
  103. baseAddr = 0x370;
  104. if ( ( baseAddr = SMCConfigState( baseAddr ) ) == 0x370 ) {
  105. return( baseAddr );
  106. }
  107. return( ( unsigned long )0 );
  108. }
  109. static void __init SMCEnableDevice(unsigned long baseAddr,
  110. unsigned long device,
  111. unsigned long portaddr,
  112. unsigned long interrupt)
  113. {
  114. unsigned long indexPort;
  115. unsigned long dataPort;
  116. indexPort = baseAddr;
  117. dataPort = baseAddr + 1;
  118. outb(LOGICAL_DEVICE_NUMBER, indexPort);
  119. outb(device, dataPort);
  120. outb(ADDR_LO, indexPort);
  121. outb(( portaddr & 0xFF ), dataPort);
  122. outb(ADDR_HI, indexPort);
  123. outb((portaddr >> 8) & 0xFF, dataPort);
  124. outb(INTERRUPT_SEL, indexPort);
  125. outb(interrupt, dataPort);
  126. outb(ACTIVATE, indexPort);
  127. outb(DEVICE_ON, dataPort);
  128. }
  129. static void __init SMCEnableKYBD(unsigned long baseAddr)
  130. {
  131. unsigned long indexPort;
  132. unsigned long dataPort;
  133. indexPort = baseAddr;
  134. dataPort = baseAddr + 1;
  135. outb(LOGICAL_DEVICE_NUMBER, indexPort);
  136. outb(KYBD, dataPort);
  137. outb(INTERRUPT_SEL, indexPort); /* Primary interrupt select */
  138. outb(KYBD_INTERRUPT, dataPort);
  139. outb(INTERRUPT_SEL_2, indexPort); /* Secondary interrupt select */
  140. outb(MOUS_INTERRUPT, dataPort);
  141. outb(ACTIVATE, indexPort);
  142. outb(DEVICE_ON, dataPort);
  143. }
  144. static void __init SMCEnableFDC(unsigned long baseAddr)
  145. {
  146. unsigned long indexPort;
  147. unsigned long dataPort;
  148. unsigned char oldValue;
  149. indexPort = baseAddr;
  150. dataPort = baseAddr + 1;
  151. outb(LOGICAL_DEVICE_NUMBER, indexPort);
  152. outb(FDC, dataPort);
  153. outb(FDD_MODE_REGISTER, indexPort);
  154. oldValue = inb(dataPort);
  155. oldValue |= 0x0E; /* Enable burst mode */
  156. outb(oldValue, dataPort);
  157. outb(INTERRUPT_SEL, indexPort); /* Primary interrupt select */
  158. outb(0x06, dataPort );
  159. outb(DMA_CHANNEL_SEL, indexPort); /* DMA channel select */
  160. outb(0x02, dataPort);
  161. outb(ACTIVATE, indexPort);
  162. outb(DEVICE_ON, dataPort);
  163. }
  164. #if SMC_DEBUG
  165. static void __init SMCReportDeviceStatus(unsigned long baseAddr)
  166. {
  167. unsigned long indexPort;
  168. unsigned long dataPort;
  169. unsigned char currentControl;
  170. indexPort = baseAddr;
  171. dataPort = baseAddr + 1;
  172. outb(POWER_CONTROL, indexPort);
  173. currentControl = inb(dataPort);
  174. printk(currentControl & (1 << FDC)
  175. ? "\t+FDC Enabled\n" : "\t-FDC Disabled\n");
  176. printk(currentControl & (1 << IDE1)
  177. ? "\t+IDE1 Enabled\n" : "\t-IDE1 Disabled\n");
  178. printk(currentControl & (1 << IDE2)
  179. ? "\t+IDE2 Enabled\n" : "\t-IDE2 Disabled\n");
  180. printk(currentControl & (1 << PARP)
  181. ? "\t+PARP Enabled\n" : "\t-PARP Disabled\n");
  182. printk(currentControl & (1 << SER1)
  183. ? "\t+SER1 Enabled\n" : "\t-SER1 Disabled\n");
  184. printk(currentControl & (1 << SER2)
  185. ? "\t+SER2 Enabled\n" : "\t-SER2 Disabled\n");
  186. printk( "\n" );
  187. }
  188. #endif
  189. int __init SMC93x_Init(void)
  190. {
  191. unsigned long SMCUltraBase;
  192. unsigned long flags;
  193. local_irq_save(flags);
  194. if ((SMCUltraBase = SMCDetectUltraIO()) != 0UL) {
  195. #if SMC_DEBUG
  196. SMCReportDeviceStatus(SMCUltraBase);
  197. #endif
  198. SMCEnableDevice(SMCUltraBase, SER1, COM1_BASE, COM1_INTERRUPT);
  199. DBG_DEVS(("SMC FDC37C93X: SER1 done\n"));
  200. SMCEnableDevice(SMCUltraBase, SER2, COM2_BASE, COM2_INTERRUPT);
  201. DBG_DEVS(("SMC FDC37C93X: SER2 done\n"));
  202. SMCEnableDevice(SMCUltraBase, PARP, PARP_BASE, PARP_INTERRUPT);
  203. DBG_DEVS(("SMC FDC37C93X: PARP done\n"));
  204. /* On PC164, IDE on the SMC is not enabled;
  205. CMD646 (PCI) on MB */
  206. SMCEnableKYBD(SMCUltraBase);
  207. DBG_DEVS(("SMC FDC37C93X: KYB done\n"));
  208. SMCEnableFDC(SMCUltraBase);
  209. DBG_DEVS(("SMC FDC37C93X: FDC done\n"));
  210. #if SMC_DEBUG
  211. SMCReportDeviceStatus(SMCUltraBase);
  212. #endif
  213. SMCRunState(SMCUltraBase);
  214. local_irq_restore(flags);
  215. printk("SMC FDC37C93X Ultra I/O Controller found @ 0x%lx\n",
  216. SMCUltraBase);
  217. return 1;
  218. }
  219. else {
  220. local_irq_restore(flags);
  221. DBG_DEVS(("No SMC FDC37C93X Ultra I/O Controller found\n"));
  222. return 0;
  223. }
  224. }