iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /**
  85. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  86. * @priv: eeprom and antenna fields are used to determine antenna flags
  87. *
  88. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  89. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  90. *
  91. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  92. * IWL_ANTENNA_MAIN - Force MAIN antenna
  93. * IWL_ANTENNA_AUX - Force AUX antenna
  94. */
  95. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  96. {
  97. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  98. switch (iwl3945_mod_params.antenna) {
  99. case IWL_ANTENNA_DIVERSITY:
  100. return 0;
  101. case IWL_ANTENNA_MAIN:
  102. if (eeprom->antenna_switch_type)
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  105. case IWL_ANTENNA_AUX:
  106. if (eeprom->antenna_switch_type)
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  109. }
  110. /* bad antenna selector value */
  111. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  112. iwl3945_mod_params.antenna);
  113. return 0; /* "diversity" is default if error */
  114. }
  115. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  116. struct ieee80211_key_conf *keyconf,
  117. u8 sta_id)
  118. {
  119. unsigned long flags;
  120. __le16 key_flags = 0;
  121. int ret;
  122. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  123. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  124. if (sta_id == priv->hw_params.bcast_sta_id)
  125. key_flags |= STA_KEY_MULTICAST_MSK;
  126. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  127. keyconf->hw_key_idx = keyconf->keyidx;
  128. key_flags &= ~STA_KEY_FLG_INVALID;
  129. spin_lock_irqsave(&priv->sta_lock, flags);
  130. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  131. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  132. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  133. keyconf->keylen);
  134. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  135. keyconf->keylen);
  136. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  137. == STA_KEY_FLG_NO_ENC)
  138. priv->stations[sta_id].sta.key.key_offset =
  139. iwl_get_free_ucode_key_index(priv);
  140. /* else, we are overriding an existing key => no need to allocated room
  141. * in uCode. */
  142. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  143. "no space for a new key");
  144. priv->stations[sta_id].sta.key.key_flags = key_flags;
  145. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  146. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  147. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  148. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  149. spin_unlock_irqrestore(&priv->sta_lock, flags);
  150. return ret;
  151. }
  152. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  153. struct ieee80211_key_conf *keyconf,
  154. u8 sta_id)
  155. {
  156. return -EOPNOTSUPP;
  157. }
  158. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  159. struct ieee80211_key_conf *keyconf,
  160. u8 sta_id)
  161. {
  162. return -EOPNOTSUPP;
  163. }
  164. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  165. {
  166. unsigned long flags;
  167. spin_lock_irqsave(&priv->sta_lock, flags);
  168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  169. memset(&priv->stations[sta_id].sta.key, 0,
  170. sizeof(struct iwl4965_keyinfo));
  171. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  175. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  176. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  177. return 0;
  178. }
  179. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  180. struct ieee80211_key_conf *keyconf, u8 sta_id)
  181. {
  182. int ret = 0;
  183. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  184. switch (keyconf->alg) {
  185. case ALG_CCMP:
  186. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  187. break;
  188. case ALG_TKIP:
  189. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  190. break;
  191. case ALG_WEP:
  192. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  193. break;
  194. default:
  195. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  196. ret = -EINVAL;
  197. }
  198. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  200. sta_id, ret);
  201. return ret;
  202. }
  203. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int iwl3945_set_static_key(struct iwl_priv *priv,
  209. struct ieee80211_key_conf *key)
  210. {
  211. if (key->alg == ALG_WEP)
  212. return -EOPNOTSUPP;
  213. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  214. return -EINVAL;
  215. }
  216. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  217. {
  218. struct list_head *element;
  219. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  220. priv->frames_count);
  221. while (!list_empty(&priv->free_frames)) {
  222. element = priv->free_frames.next;
  223. list_del(element);
  224. kfree(list_entry(element, struct iwl3945_frame, list));
  225. priv->frames_count--;
  226. }
  227. if (priv->frames_count) {
  228. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  229. priv->frames_count);
  230. priv->frames_count = 0;
  231. }
  232. }
  233. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  234. {
  235. struct iwl3945_frame *frame;
  236. struct list_head *element;
  237. if (list_empty(&priv->free_frames)) {
  238. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  239. if (!frame) {
  240. IWL_ERR(priv, "Could not allocate frame!\n");
  241. return NULL;
  242. }
  243. priv->frames_count++;
  244. return frame;
  245. }
  246. element = priv->free_frames.next;
  247. list_del(element);
  248. return list_entry(element, struct iwl3945_frame, list);
  249. }
  250. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  251. {
  252. memset(frame, 0, sizeof(*frame));
  253. list_add(&frame->list, &priv->free_frames);
  254. }
  255. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  256. struct ieee80211_hdr *hdr,
  257. int left)
  258. {
  259. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  260. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  261. (priv->iw_mode != NL80211_IFTYPE_AP)))
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->shared_virt)
  290. pci_free_consistent(priv->pci_dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->shared_virt,
  293. priv->shared_phys);
  294. }
  295. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  296. struct ieee80211_tx_info *info,
  297. struct iwl_cmd *cmd,
  298. struct sk_buff *skb_frag,
  299. int sta_id)
  300. {
  301. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  302. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  303. switch (keyinfo->alg) {
  304. case ALG_CCMP:
  305. tx->sec_ctl = TX_CMD_SEC_CCM;
  306. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  307. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  308. break;
  309. case ALG_TKIP:
  310. break;
  311. case ALG_WEP:
  312. tx->sec_ctl = TX_CMD_SEC_WEP |
  313. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  314. if (keyinfo->keylen == 13)
  315. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  316. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  317. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  318. "with key %d\n", info->control.hw_key->hw_key_idx);
  319. break;
  320. default:
  321. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  322. break;
  323. }
  324. }
  325. /*
  326. * handle build REPLY_TX command notification.
  327. */
  328. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  329. struct iwl_cmd *cmd,
  330. struct ieee80211_tx_info *info,
  331. struct ieee80211_hdr *hdr, u8 std_id)
  332. {
  333. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  334. __le32 tx_flags = tx->tx_flags;
  335. __le16 fc = hdr->frame_control;
  336. u8 rc_flags = info->control.rates[0].flags;
  337. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  338. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  339. tx_flags |= TX_CMD_FLG_ACK_MSK;
  340. if (ieee80211_is_mgmt(fc))
  341. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  342. if (ieee80211_is_probe_resp(fc) &&
  343. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  344. tx_flags |= TX_CMD_FLG_TSF_MSK;
  345. } else {
  346. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  347. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  348. }
  349. tx->sta_id = std_id;
  350. if (ieee80211_has_morefrags(fc))
  351. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  352. if (ieee80211_is_data_qos(fc)) {
  353. u8 *qc = ieee80211_get_qos_ctl(hdr);
  354. tx->tid_tspec = qc[0] & 0xf;
  355. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  356. } else {
  357. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  358. }
  359. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  360. tx_flags |= TX_CMD_FLG_RTS_MSK;
  361. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  362. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  363. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  364. tx_flags |= TX_CMD_FLG_CTS_MSK;
  365. }
  366. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  367. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  368. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  369. if (ieee80211_is_mgmt(fc)) {
  370. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  371. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  372. else
  373. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  374. } else {
  375. tx->timeout.pm_frame_timeout = 0;
  376. #ifdef CONFIG_IWLWIFI_LEDS
  377. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  378. #endif
  379. }
  380. tx->driver_txop = 0;
  381. tx->tx_flags = tx_flags;
  382. tx->next_frame_len = 0;
  383. }
  384. /*
  385. * start REPLY_TX command process
  386. */
  387. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  388. {
  389. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  390. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  391. struct iwl3945_tx_cmd *tx;
  392. struct iwl_tx_queue *txq = NULL;
  393. struct iwl_queue *q = NULL;
  394. struct iwl_cmd *out_cmd = NULL;
  395. dma_addr_t phys_addr;
  396. dma_addr_t txcmd_phys;
  397. int txq_id = skb_get_queue_mapping(skb);
  398. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  399. u8 id;
  400. u8 unicast;
  401. u8 sta_id;
  402. u8 tid = 0;
  403. u16 seq_number = 0;
  404. __le16 fc;
  405. u8 wait_write_ptr = 0;
  406. u8 *qc = NULL;
  407. unsigned long flags;
  408. int rc;
  409. spin_lock_irqsave(&priv->lock, flags);
  410. if (iwl_is_rfkill(priv)) {
  411. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  412. goto drop_unlock;
  413. }
  414. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  415. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  416. goto drop_unlock;
  417. }
  418. unicast = !is_multicast_ether_addr(hdr->addr1);
  419. id = 0;
  420. fc = hdr->frame_control;
  421. #ifdef CONFIG_IWLWIFI_DEBUG
  422. if (ieee80211_is_auth(fc))
  423. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  424. else if (ieee80211_is_assoc_req(fc))
  425. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  426. else if (ieee80211_is_reassoc_req(fc))
  427. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  428. #endif
  429. /* drop all data frame if we are not associated */
  430. if (ieee80211_is_data(fc) &&
  431. (!iwl_is_monitor_mode(priv)) && /* packet injection */
  432. (!iwl_is_associated(priv) ||
  433. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  434. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  435. goto drop_unlock;
  436. }
  437. spin_unlock_irqrestore(&priv->lock, flags);
  438. hdr_len = ieee80211_hdrlen(fc);
  439. /* Find (or create) index into station table for destination station */
  440. sta_id = iwl_get_sta_id(priv, hdr);
  441. if (sta_id == IWL_INVALID_STATION) {
  442. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  443. hdr->addr1);
  444. goto drop;
  445. }
  446. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  447. if (ieee80211_is_data_qos(fc)) {
  448. qc = ieee80211_get_qos_ctl(hdr);
  449. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  450. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  451. IEEE80211_SCTL_SEQ;
  452. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  453. (hdr->seq_ctrl &
  454. cpu_to_le16(IEEE80211_SCTL_FRAG));
  455. seq_number += 0x10;
  456. }
  457. /* Descriptor for chosen Tx queue */
  458. txq = &priv->txq[txq_id];
  459. q = &txq->q;
  460. spin_lock_irqsave(&priv->lock, flags);
  461. idx = get_cmd_index(q, q->write_ptr, 0);
  462. /* Set up driver data for this TFD */
  463. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  464. txq->txb[q->write_ptr].skb[0] = skb;
  465. /* Init first empty entry in queue's array of Tx/cmd buffers */
  466. out_cmd = txq->cmd[idx];
  467. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  468. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  469. memset(tx, 0, sizeof(*tx));
  470. /*
  471. * Set up the Tx-command (not MAC!) header.
  472. * Store the chosen Tx queue and TFD index within the sequence field;
  473. * after Tx, uCode's Tx response will return this value so driver can
  474. * locate the frame within the tx queue and do post-tx processing.
  475. */
  476. out_cmd->hdr.cmd = REPLY_TX;
  477. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  478. INDEX_TO_SEQ(q->write_ptr)));
  479. /* Copy MAC header from skb into command buffer */
  480. memcpy(tx->hdr, hdr, hdr_len);
  481. if (info->control.hw_key)
  482. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  483. /* TODO need this for burst mode later on */
  484. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  485. /* set is_hcca to 0; it probably will never be implemented */
  486. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  487. /* Total # bytes to be transmitted */
  488. len = (u16)skb->len;
  489. tx->len = cpu_to_le16(len);
  490. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  491. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  492. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  493. txq->need_update = 1;
  494. if (qc)
  495. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  496. } else {
  497. wait_write_ptr = 1;
  498. txq->need_update = 0;
  499. }
  500. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  501. le16_to_cpu(out_cmd->hdr.sequence));
  502. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  503. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  504. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  505. ieee80211_hdrlen(fc));
  506. /*
  507. * Use the first empty entry in this queue's command buffer array
  508. * to contain the Tx command and MAC header concatenated together
  509. * (payload data will be in another buffer).
  510. * Size of this varies, due to varying MAC header length.
  511. * If end is not dword aligned, we'll have 2 extra bytes at the end
  512. * of the MAC header (device reads on dword boundaries).
  513. * We'll tell device about this padding later.
  514. */
  515. len = sizeof(struct iwl3945_tx_cmd) +
  516. sizeof(struct iwl_cmd_header) + hdr_len;
  517. len_org = len;
  518. len = (len + 3) & ~3;
  519. if (len_org != len)
  520. len_org = 1;
  521. else
  522. len_org = 0;
  523. /* Physical address of this Tx command's header (not MAC header!),
  524. * within command buffer array. */
  525. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  526. len, PCI_DMA_TODEVICE);
  527. /* we do not map meta data ... so we can safely access address to
  528. * provide to unmap command*/
  529. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  530. pci_unmap_len_set(&out_cmd->meta, len, len);
  531. /* Add buffer containing Tx command and MAC(!) header to TFD's
  532. * first entry */
  533. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  534. txcmd_phys, len, 1, 0);
  535. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  536. * if any (802.11 null frames have no payload). */
  537. len = skb->len - hdr_len;
  538. if (len) {
  539. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  540. len, PCI_DMA_TODEVICE);
  541. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  542. phys_addr, len,
  543. 0, U32_PAD(len));
  544. }
  545. /* Tell device the write index *just past* this latest filled TFD */
  546. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  547. rc = iwl_txq_update_write_ptr(priv, txq);
  548. spin_unlock_irqrestore(&priv->lock, flags);
  549. if (rc)
  550. return rc;
  551. if ((iwl_queue_space(q) < q->high_mark)
  552. && priv->mac80211_registered) {
  553. if (wait_write_ptr) {
  554. spin_lock_irqsave(&priv->lock, flags);
  555. txq->need_update = 1;
  556. iwl_txq_update_write_ptr(priv, txq);
  557. spin_unlock_irqrestore(&priv->lock, flags);
  558. }
  559. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  560. }
  561. return 0;
  562. drop_unlock:
  563. spin_unlock_irqrestore(&priv->lock, flags);
  564. drop:
  565. return -1;
  566. }
  567. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  568. #include "iwl-spectrum.h"
  569. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  570. #define BEACON_TIME_MASK_HIGH 0xFF000000
  571. #define TIME_UNIT 1024
  572. /*
  573. * extended beacon time format
  574. * time in usec will be changed into a 32-bit value in 8:24 format
  575. * the high 1 byte is the beacon counts
  576. * the lower 3 bytes is the time in usec within one beacon interval
  577. */
  578. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  579. {
  580. u32 quot;
  581. u32 rem;
  582. u32 interval = beacon_interval * 1024;
  583. if (!interval || !usec)
  584. return 0;
  585. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  586. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  587. return (quot << 24) + rem;
  588. }
  589. /* base is usually what we get from ucode with each received frame,
  590. * the same as HW timer counter counting down
  591. */
  592. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  593. {
  594. u32 base_low = base & BEACON_TIME_MASK_LOW;
  595. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  596. u32 interval = beacon_interval * TIME_UNIT;
  597. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  598. (addon & BEACON_TIME_MASK_HIGH);
  599. if (base_low > addon_low)
  600. res += base_low - addon_low;
  601. else if (base_low < addon_low) {
  602. res += interval + base_low - addon_low;
  603. res += (1 << 24);
  604. } else
  605. res += (1 << 24);
  606. return cpu_to_le32(res);
  607. }
  608. static int iwl3945_get_measurement(struct iwl_priv *priv,
  609. struct ieee80211_measurement_params *params,
  610. u8 type)
  611. {
  612. struct iwl_spectrum_cmd spectrum;
  613. struct iwl_rx_packet *res;
  614. struct iwl_host_cmd cmd = {
  615. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  616. .data = (void *)&spectrum,
  617. .meta.flags = CMD_WANT_SKB,
  618. };
  619. u32 add_time = le64_to_cpu(params->start_time);
  620. int rc;
  621. int spectrum_resp_status;
  622. int duration = le16_to_cpu(params->duration);
  623. if (iwl_is_associated(priv))
  624. add_time =
  625. iwl3945_usecs_to_beacons(
  626. le64_to_cpu(params->start_time) - priv->last_tsf,
  627. le16_to_cpu(priv->rxon_timing.beacon_interval));
  628. memset(&spectrum, 0, sizeof(spectrum));
  629. spectrum.channel_count = cpu_to_le16(1);
  630. spectrum.flags =
  631. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  632. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  633. cmd.len = sizeof(spectrum);
  634. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  635. if (iwl_is_associated(priv))
  636. spectrum.start_time =
  637. iwl3945_add_beacon_time(priv->last_beacon_time,
  638. add_time,
  639. le16_to_cpu(priv->rxon_timing.beacon_interval));
  640. else
  641. spectrum.start_time = 0;
  642. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  643. spectrum.channels[0].channel = params->channel;
  644. spectrum.channels[0].type = type;
  645. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  646. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  647. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  648. rc = iwl_send_cmd_sync(priv, &cmd);
  649. if (rc)
  650. return rc;
  651. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  652. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  653. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  654. rc = -EIO;
  655. }
  656. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  657. switch (spectrum_resp_status) {
  658. case 0: /* Command will be handled */
  659. if (res->u.spectrum.id != 0xff) {
  660. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  661. res->u.spectrum.id);
  662. priv->measurement_status &= ~MEASUREMENT_READY;
  663. }
  664. priv->measurement_status |= MEASUREMENT_ACTIVE;
  665. rc = 0;
  666. break;
  667. case 1: /* Command will not be handled */
  668. rc = -EAGAIN;
  669. break;
  670. }
  671. dev_kfree_skb_any(cmd.meta.u.skb);
  672. return rc;
  673. }
  674. #endif
  675. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  676. struct iwl_rx_mem_buffer *rxb)
  677. {
  678. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  679. struct iwl_alive_resp *palive;
  680. struct delayed_work *pwork;
  681. palive = &pkt->u.alive_frame;
  682. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  683. "0x%01X 0x%01X\n",
  684. palive->is_valid, palive->ver_type,
  685. palive->ver_subtype);
  686. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  687. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  688. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  689. sizeof(struct iwl_alive_resp));
  690. pwork = &priv->init_alive_start;
  691. } else {
  692. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  693. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  694. sizeof(struct iwl_alive_resp));
  695. pwork = &priv->alive_start;
  696. iwl3945_disable_events(priv);
  697. }
  698. /* We delay the ALIVE response by 5ms to
  699. * give the HW RF Kill time to activate... */
  700. if (palive->is_valid == UCODE_VALID_OK)
  701. queue_delayed_work(priv->workqueue, pwork,
  702. msecs_to_jiffies(5));
  703. else
  704. IWL_WARN(priv, "uCode did not respond OK.\n");
  705. }
  706. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  707. struct iwl_rx_mem_buffer *rxb)
  708. {
  709. #ifdef CONFIG_IWLWIFI_DEBUG
  710. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  711. #endif
  712. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  713. return;
  714. }
  715. static void iwl3945_bg_beacon_update(struct work_struct *work)
  716. {
  717. struct iwl_priv *priv =
  718. container_of(work, struct iwl_priv, beacon_update);
  719. struct sk_buff *beacon;
  720. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  721. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  722. if (!beacon) {
  723. IWL_ERR(priv, "update beacon failed\n");
  724. return;
  725. }
  726. mutex_lock(&priv->mutex);
  727. /* new beacon skb is allocated every time; dispose previous.*/
  728. if (priv->ibss_beacon)
  729. dev_kfree_skb(priv->ibss_beacon);
  730. priv->ibss_beacon = beacon;
  731. mutex_unlock(&priv->mutex);
  732. iwl3945_send_beacon_cmd(priv);
  733. }
  734. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  735. struct iwl_rx_mem_buffer *rxb)
  736. {
  737. #ifdef CONFIG_IWLWIFI_DEBUG
  738. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  739. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  740. u8 rate = beacon->beacon_notify_hdr.rate;
  741. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  742. "tsf %d %d rate %d\n",
  743. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  744. beacon->beacon_notify_hdr.failure_frame,
  745. le32_to_cpu(beacon->ibss_mgr_status),
  746. le32_to_cpu(beacon->high_tsf),
  747. le32_to_cpu(beacon->low_tsf), rate);
  748. #endif
  749. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  750. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  751. queue_work(priv->workqueue, &priv->beacon_update);
  752. }
  753. /* Handle notification from uCode that card's power state is changing
  754. * due to software, hardware, or critical temperature RFKILL */
  755. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  756. struct iwl_rx_mem_buffer *rxb)
  757. {
  758. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  759. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  760. unsigned long status = priv->status;
  761. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  762. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  763. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  764. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  765. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  766. if (flags & HW_CARD_DISABLED)
  767. set_bit(STATUS_RF_KILL_HW, &priv->status);
  768. else
  769. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  770. iwl_scan_cancel(priv);
  771. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  772. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  773. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  774. test_bit(STATUS_RF_KILL_HW, &priv->status));
  775. else
  776. wake_up_interruptible(&priv->wait_command_queue);
  777. }
  778. /**
  779. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  780. *
  781. * Setup the RX handlers for each of the reply types sent from the uCode
  782. * to the host.
  783. *
  784. * This function chains into the hardware specific files for them to setup
  785. * any hardware specific handlers as well.
  786. */
  787. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  788. {
  789. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  790. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  791. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  792. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  793. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  794. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  795. iwl_rx_pm_debug_statistics_notif;
  796. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  797. /*
  798. * The same handler is used for both the REPLY to a discrete
  799. * statistics request from the host as well as for the periodic
  800. * statistics notifications (after received beacons) from the uCode.
  801. */
  802. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  803. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  804. iwl_setup_spectrum_handlers(priv);
  805. iwl_setup_rx_scan_handlers(priv);
  806. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  807. /* Set up hardware specific Rx handlers */
  808. iwl3945_hw_rx_handler_setup(priv);
  809. }
  810. /************************** RX-FUNCTIONS ****************************/
  811. /*
  812. * Rx theory of operation
  813. *
  814. * The host allocates 32 DMA target addresses and passes the host address
  815. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  816. * 0 to 31
  817. *
  818. * Rx Queue Indexes
  819. * The host/firmware share two index registers for managing the Rx buffers.
  820. *
  821. * The READ index maps to the first position that the firmware may be writing
  822. * to -- the driver can read up to (but not including) this position and get
  823. * good data.
  824. * The READ index is managed by the firmware once the card is enabled.
  825. *
  826. * The WRITE index maps to the last position the driver has read from -- the
  827. * position preceding WRITE is the last slot the firmware can place a packet.
  828. *
  829. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  830. * WRITE = READ.
  831. *
  832. * During initialization, the host sets up the READ queue position to the first
  833. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  834. *
  835. * When the firmware places a packet in a buffer, it will advance the READ index
  836. * and fire the RX interrupt. The driver can then query the READ index and
  837. * process as many packets as possible, moving the WRITE index forward as it
  838. * resets the Rx queue buffers with new memory.
  839. *
  840. * The management in the driver is as follows:
  841. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  842. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  843. * to replenish the iwl->rxq->rx_free.
  844. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  845. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  846. * 'processed' and 'read' driver indexes as well)
  847. * + A received packet is processed and handed to the kernel network stack,
  848. * detached from the iwl->rxq. The driver 'processed' index is updated.
  849. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  850. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  851. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  852. * were enough free buffers and RX_STALLED is set it is cleared.
  853. *
  854. *
  855. * Driver sequence:
  856. *
  857. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  858. * iwl3945_rx_queue_restock
  859. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  860. * queue, updates firmware pointers, and updates
  861. * the WRITE index. If insufficient rx_free buffers
  862. * are available, schedules iwl3945_rx_replenish
  863. *
  864. * -- enable interrupts --
  865. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  866. * READ INDEX, detaching the SKB from the pool.
  867. * Moves the packet buffer from queue to rx_used.
  868. * Calls iwl3945_rx_queue_restock to refill any empty
  869. * slots.
  870. * ...
  871. *
  872. */
  873. /**
  874. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  875. */
  876. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  877. dma_addr_t dma_addr)
  878. {
  879. return cpu_to_le32((u32)dma_addr);
  880. }
  881. /**
  882. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  883. *
  884. * If there are slots in the RX queue that need to be restocked,
  885. * and we have free pre-allocated buffers, fill the ranks as much
  886. * as we can, pulling from rx_free.
  887. *
  888. * This moves the 'write' index forward to catch up with 'processed', and
  889. * also updates the memory address in the firmware to reference the new
  890. * target buffer.
  891. */
  892. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  893. {
  894. struct iwl_rx_queue *rxq = &priv->rxq;
  895. struct list_head *element;
  896. struct iwl_rx_mem_buffer *rxb;
  897. unsigned long flags;
  898. int write, rc;
  899. spin_lock_irqsave(&rxq->lock, flags);
  900. write = rxq->write & ~0x7;
  901. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  902. /* Get next free Rx buffer, remove from free list */
  903. element = rxq->rx_free.next;
  904. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  905. list_del(element);
  906. /* Point to Rx buffer via next RBD in circular buffer */
  907. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  908. rxq->queue[rxq->write] = rxb;
  909. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  910. rxq->free_count--;
  911. }
  912. spin_unlock_irqrestore(&rxq->lock, flags);
  913. /* If the pre-allocated buffer pool is dropping low, schedule to
  914. * refill it */
  915. if (rxq->free_count <= RX_LOW_WATERMARK)
  916. queue_work(priv->workqueue, &priv->rx_replenish);
  917. /* If we've added more space for the firmware to place data, tell it.
  918. * Increment device's write pointer in multiples of 8. */
  919. if ((rxq->write_actual != (rxq->write & ~0x7))
  920. || (abs(rxq->write - rxq->read) > 7)) {
  921. spin_lock_irqsave(&rxq->lock, flags);
  922. rxq->need_update = 1;
  923. spin_unlock_irqrestore(&rxq->lock, flags);
  924. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  925. if (rc)
  926. return rc;
  927. }
  928. return 0;
  929. }
  930. /**
  931. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  932. *
  933. * When moving to rx_free an SKB is allocated for the slot.
  934. *
  935. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  936. * This is called as a scheduled work item (except for during initialization)
  937. */
  938. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  939. {
  940. struct iwl_rx_queue *rxq = &priv->rxq;
  941. struct list_head *element;
  942. struct iwl_rx_mem_buffer *rxb;
  943. unsigned long flags;
  944. while (1) {
  945. spin_lock_irqsave(&rxq->lock, flags);
  946. if (list_empty(&rxq->rx_used)) {
  947. spin_unlock_irqrestore(&rxq->lock, flags);
  948. return;
  949. }
  950. element = rxq->rx_used.next;
  951. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  952. list_del(element);
  953. spin_unlock_irqrestore(&rxq->lock, flags);
  954. /* Alloc a new receive buffer */
  955. rxb->skb =
  956. alloc_skb(priv->hw_params.rx_buf_size,
  957. priority);
  958. if (!rxb->skb) {
  959. if (net_ratelimit())
  960. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  961. /* We don't reschedule replenish work here -- we will
  962. * call the restock method and if it still needs
  963. * more buffers it will schedule replenish */
  964. break;
  965. }
  966. /* If radiotap head is required, reserve some headroom here.
  967. * The physical head count is a variable rx_stats->phy_count.
  968. * We reserve 4 bytes here. Plus these extra bytes, the
  969. * headroom of the physical head should be enough for the
  970. * radiotap head that iwl3945 supported. See iwl3945_rt.
  971. */
  972. skb_reserve(rxb->skb, 4);
  973. /* Get physical address of RB/SKB */
  974. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  975. rxb->skb->data,
  976. priv->hw_params.rx_buf_size,
  977. PCI_DMA_FROMDEVICE);
  978. spin_lock_irqsave(&rxq->lock, flags);
  979. list_add_tail(&rxb->list, &rxq->rx_free);
  980. priv->alloc_rxb_skb++;
  981. rxq->free_count++;
  982. spin_unlock_irqrestore(&rxq->lock, flags);
  983. }
  984. }
  985. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  986. {
  987. unsigned long flags;
  988. int i;
  989. spin_lock_irqsave(&rxq->lock, flags);
  990. INIT_LIST_HEAD(&rxq->rx_free);
  991. INIT_LIST_HEAD(&rxq->rx_used);
  992. /* Fill the rx_used queue with _all_ of the Rx buffers */
  993. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  994. /* In the reset function, these buffers may have been allocated
  995. * to an SKB, so we need to unmap and free potential storage */
  996. if (rxq->pool[i].skb != NULL) {
  997. pci_unmap_single(priv->pci_dev,
  998. rxq->pool[i].real_dma_addr,
  999. priv->hw_params.rx_buf_size,
  1000. PCI_DMA_FROMDEVICE);
  1001. priv->alloc_rxb_skb--;
  1002. dev_kfree_skb(rxq->pool[i].skb);
  1003. rxq->pool[i].skb = NULL;
  1004. }
  1005. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1006. }
  1007. /* Set us so that we have processed and used all buffers, but have
  1008. * not restocked the Rx queue with fresh buffers */
  1009. rxq->read = rxq->write = 0;
  1010. rxq->free_count = 0;
  1011. rxq->write_actual = 0;
  1012. spin_unlock_irqrestore(&rxq->lock, flags);
  1013. }
  1014. void iwl3945_rx_replenish(void *data)
  1015. {
  1016. struct iwl_priv *priv = data;
  1017. unsigned long flags;
  1018. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1019. spin_lock_irqsave(&priv->lock, flags);
  1020. iwl3945_rx_queue_restock(priv);
  1021. spin_unlock_irqrestore(&priv->lock, flags);
  1022. }
  1023. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1024. {
  1025. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1026. iwl3945_rx_queue_restock(priv);
  1027. }
  1028. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1029. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1030. * This free routine walks the list of POOL entries and if SKB is set to
  1031. * non NULL it is unmapped and freed
  1032. */
  1033. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1034. {
  1035. int i;
  1036. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1037. if (rxq->pool[i].skb != NULL) {
  1038. pci_unmap_single(priv->pci_dev,
  1039. rxq->pool[i].real_dma_addr,
  1040. priv->hw_params.rx_buf_size,
  1041. PCI_DMA_FROMDEVICE);
  1042. dev_kfree_skb(rxq->pool[i].skb);
  1043. }
  1044. }
  1045. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1046. rxq->dma_addr);
  1047. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1048. rxq->rb_stts, rxq->rb_stts_dma);
  1049. rxq->bd = NULL;
  1050. rxq->rb_stts = NULL;
  1051. }
  1052. /* Convert linear signal-to-noise ratio into dB */
  1053. static u8 ratio2dB[100] = {
  1054. /* 0 1 2 3 4 5 6 7 8 9 */
  1055. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1056. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1057. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1058. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1059. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1060. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1061. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1062. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1063. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1064. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1065. };
  1066. /* Calculates a relative dB value from a ratio of linear
  1067. * (i.e. not dB) signal levels.
  1068. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1069. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1070. {
  1071. /* 1000:1 or higher just report as 60 dB */
  1072. if (sig_ratio >= 1000)
  1073. return 60;
  1074. /* 100:1 or higher, divide by 10 and use table,
  1075. * add 20 dB to make up for divide by 10 */
  1076. if (sig_ratio >= 100)
  1077. return 20 + (int)ratio2dB[sig_ratio/10];
  1078. /* We shouldn't see this */
  1079. if (sig_ratio < 1)
  1080. return 0;
  1081. /* Use table for ratios 1:1 - 99:1 */
  1082. return (int)ratio2dB[sig_ratio];
  1083. }
  1084. #define PERFECT_RSSI (-20) /* dBm */
  1085. #define WORST_RSSI (-95) /* dBm */
  1086. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1087. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1088. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1089. * about formulas used below. */
  1090. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1091. {
  1092. int sig_qual;
  1093. int degradation = PERFECT_RSSI - rssi_dbm;
  1094. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1095. * as indicator; formula is (signal dbm - noise dbm).
  1096. * SNR at or above 40 is a great signal (100%).
  1097. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1098. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1099. if (noise_dbm) {
  1100. if (rssi_dbm - noise_dbm >= 40)
  1101. return 100;
  1102. else if (rssi_dbm < noise_dbm)
  1103. return 0;
  1104. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1105. /* Else use just the signal level.
  1106. * This formula is a least squares fit of data points collected and
  1107. * compared with a reference system that had a percentage (%) display
  1108. * for signal quality. */
  1109. } else
  1110. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1111. (15 * RSSI_RANGE + 62 * degradation)) /
  1112. (RSSI_RANGE * RSSI_RANGE);
  1113. if (sig_qual > 100)
  1114. sig_qual = 100;
  1115. else if (sig_qual < 1)
  1116. sig_qual = 0;
  1117. return sig_qual;
  1118. }
  1119. /**
  1120. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1121. *
  1122. * Uses the priv->rx_handlers callback function array to invoke
  1123. * the appropriate handlers, including command responses,
  1124. * frame-received notifications, and other notifications.
  1125. */
  1126. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1127. {
  1128. struct iwl_rx_mem_buffer *rxb;
  1129. struct iwl_rx_packet *pkt;
  1130. struct iwl_rx_queue *rxq = &priv->rxq;
  1131. u32 r, i;
  1132. int reclaim;
  1133. unsigned long flags;
  1134. u8 fill_rx = 0;
  1135. u32 count = 8;
  1136. int total_empty = 0;
  1137. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1138. * buffer that the driver may process (last buffer filled by ucode). */
  1139. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1140. i = rxq->read;
  1141. /* calculate total frames need to be restock after handling RX */
  1142. total_empty = r - priv->rxq.write_actual;
  1143. if (total_empty < 0)
  1144. total_empty += RX_QUEUE_SIZE;
  1145. if (total_empty > (RX_QUEUE_SIZE / 2))
  1146. fill_rx = 1;
  1147. /* Rx interrupt, but nothing sent from uCode */
  1148. if (i == r)
  1149. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1150. while (i != r) {
  1151. rxb = rxq->queue[i];
  1152. /* If an RXB doesn't have a Rx queue slot associated with it,
  1153. * then a bug has been introduced in the queue refilling
  1154. * routines -- catch it here */
  1155. BUG_ON(rxb == NULL);
  1156. rxq->queue[i] = NULL;
  1157. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1158. priv->hw_params.rx_buf_size,
  1159. PCI_DMA_FROMDEVICE);
  1160. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1161. /* Reclaim a command buffer only if this packet is a response
  1162. * to a (driver-originated) command.
  1163. * If the packet (e.g. Rx frame) originated from uCode,
  1164. * there is no command buffer to reclaim.
  1165. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1166. * but apparently a few don't get set; catch them here. */
  1167. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1168. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1169. (pkt->hdr.cmd != REPLY_TX);
  1170. /* Based on type of command response or notification,
  1171. * handle those that need handling via function in
  1172. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1173. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1174. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1175. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1176. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1177. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1178. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1179. } else {
  1180. /* No handling needed */
  1181. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1182. "r %d i %d No handler needed for %s, 0x%02x\n",
  1183. r, i, get_cmd_string(pkt->hdr.cmd),
  1184. pkt->hdr.cmd);
  1185. }
  1186. if (reclaim) {
  1187. /* Invoke any callbacks, transfer the skb to caller, and
  1188. * fire off the (possibly) blocking iwl_send_cmd()
  1189. * as we reclaim the driver command queue */
  1190. if (rxb && rxb->skb)
  1191. iwl_tx_cmd_complete(priv, rxb);
  1192. else
  1193. IWL_WARN(priv, "Claim null rxb?\n");
  1194. }
  1195. /* For now we just don't re-use anything. We can tweak this
  1196. * later to try and re-use notification packets and SKBs that
  1197. * fail to Rx correctly */
  1198. if (rxb->skb != NULL) {
  1199. priv->alloc_rxb_skb--;
  1200. dev_kfree_skb_any(rxb->skb);
  1201. rxb->skb = NULL;
  1202. }
  1203. spin_lock_irqsave(&rxq->lock, flags);
  1204. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1205. spin_unlock_irqrestore(&rxq->lock, flags);
  1206. i = (i + 1) & RX_QUEUE_MASK;
  1207. /* If there are a lot of unused frames,
  1208. * restock the Rx queue so ucode won't assert. */
  1209. if (fill_rx) {
  1210. count++;
  1211. if (count >= 8) {
  1212. priv->rxq.read = i;
  1213. iwl3945_rx_replenish_now(priv);
  1214. count = 0;
  1215. }
  1216. }
  1217. }
  1218. /* Backtrack one entry */
  1219. priv->rxq.read = i;
  1220. if (fill_rx)
  1221. iwl3945_rx_replenish_now(priv);
  1222. else
  1223. iwl3945_rx_queue_restock(priv);
  1224. }
  1225. /* call this function to flush any scheduled tasklet */
  1226. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1227. {
  1228. /* wait to make sure we flush pending tasklet*/
  1229. synchronize_irq(priv->pci_dev->irq);
  1230. tasklet_kill(&priv->irq_tasklet);
  1231. }
  1232. static const char *desc_lookup(int i)
  1233. {
  1234. switch (i) {
  1235. case 1:
  1236. return "FAIL";
  1237. case 2:
  1238. return "BAD_PARAM";
  1239. case 3:
  1240. return "BAD_CHECKSUM";
  1241. case 4:
  1242. return "NMI_INTERRUPT";
  1243. case 5:
  1244. return "SYSASSERT";
  1245. case 6:
  1246. return "FATAL_ERROR";
  1247. }
  1248. return "UNKNOWN";
  1249. }
  1250. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1251. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1252. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1253. {
  1254. u32 i;
  1255. u32 desc, time, count, base, data1;
  1256. u32 blink1, blink2, ilink1, ilink2;
  1257. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1258. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1259. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1260. return;
  1261. }
  1262. count = iwl_read_targ_mem(priv, base);
  1263. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1264. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1265. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1266. priv->status, count);
  1267. }
  1268. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1269. "ilink1 nmiPC Line\n");
  1270. for (i = ERROR_START_OFFSET;
  1271. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1272. i += ERROR_ELEM_SIZE) {
  1273. desc = iwl_read_targ_mem(priv, base + i);
  1274. time =
  1275. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1276. blink1 =
  1277. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1278. blink2 =
  1279. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1280. ilink1 =
  1281. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1282. ilink2 =
  1283. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1284. data1 =
  1285. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1286. IWL_ERR(priv,
  1287. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1288. desc_lookup(desc), desc, time, blink1, blink2,
  1289. ilink1, ilink2, data1);
  1290. }
  1291. }
  1292. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1293. /**
  1294. * iwl3945_print_event_log - Dump error event log to syslog
  1295. *
  1296. */
  1297. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1298. u32 num_events, u32 mode)
  1299. {
  1300. u32 i;
  1301. u32 base; /* SRAM byte address of event log header */
  1302. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1303. u32 ptr; /* SRAM byte address of log data */
  1304. u32 ev, time, data; /* event log data */
  1305. if (num_events == 0)
  1306. return;
  1307. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1308. if (mode == 0)
  1309. event_size = 2 * sizeof(u32);
  1310. else
  1311. event_size = 3 * sizeof(u32);
  1312. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1313. /* "time" is actually "data" for mode 0 (no timestamp).
  1314. * place event id # at far right for easier visual parsing. */
  1315. for (i = 0; i < num_events; i++) {
  1316. ev = iwl_read_targ_mem(priv, ptr);
  1317. ptr += sizeof(u32);
  1318. time = iwl_read_targ_mem(priv, ptr);
  1319. ptr += sizeof(u32);
  1320. if (mode == 0) {
  1321. /* data, ev */
  1322. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1323. } else {
  1324. data = iwl_read_targ_mem(priv, ptr);
  1325. ptr += sizeof(u32);
  1326. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1327. }
  1328. }
  1329. }
  1330. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1331. {
  1332. u32 base; /* SRAM byte address of event log header */
  1333. u32 capacity; /* event log capacity in # entries */
  1334. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1335. u32 num_wraps; /* # times uCode wrapped to top of log */
  1336. u32 next_entry; /* index of next entry to be written by uCode */
  1337. u32 size; /* # entries that we'll print */
  1338. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1339. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1340. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1341. return;
  1342. }
  1343. /* event log header */
  1344. capacity = iwl_read_targ_mem(priv, base);
  1345. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1346. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1347. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1348. size = num_wraps ? capacity : next_entry;
  1349. /* bail out if nothing in log */
  1350. if (size == 0) {
  1351. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1352. return;
  1353. }
  1354. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1355. size, num_wraps);
  1356. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1357. * i.e the next one that uCode would fill. */
  1358. if (num_wraps)
  1359. iwl3945_print_event_log(priv, next_entry,
  1360. capacity - next_entry, mode);
  1361. /* (then/else) start at top of log */
  1362. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1363. }
  1364. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1365. {
  1366. u32 inta, handled = 0;
  1367. u32 inta_fh;
  1368. unsigned long flags;
  1369. #ifdef CONFIG_IWLWIFI_DEBUG
  1370. u32 inta_mask;
  1371. #endif
  1372. spin_lock_irqsave(&priv->lock, flags);
  1373. /* Ack/clear/reset pending uCode interrupts.
  1374. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1375. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1376. inta = iwl_read32(priv, CSR_INT);
  1377. iwl_write32(priv, CSR_INT, inta);
  1378. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1379. * Any new interrupts that happen after this, either while we're
  1380. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1381. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1382. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1383. #ifdef CONFIG_IWLWIFI_DEBUG
  1384. if (priv->debug_level & IWL_DL_ISR) {
  1385. /* just for debug */
  1386. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1387. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1388. inta, inta_mask, inta_fh);
  1389. }
  1390. #endif
  1391. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1392. * atomic, make sure that inta covers all the interrupts that
  1393. * we've discovered, even if FH interrupt came in just after
  1394. * reading CSR_INT. */
  1395. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1396. inta |= CSR_INT_BIT_FH_RX;
  1397. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1398. inta |= CSR_INT_BIT_FH_TX;
  1399. /* Now service all interrupt bits discovered above. */
  1400. if (inta & CSR_INT_BIT_HW_ERR) {
  1401. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1402. /* Tell the device to stop sending interrupts */
  1403. iwl_disable_interrupts(priv);
  1404. priv->isr_stats.hw++;
  1405. iwl_irq_handle_error(priv);
  1406. handled |= CSR_INT_BIT_HW_ERR;
  1407. spin_unlock_irqrestore(&priv->lock, flags);
  1408. return;
  1409. }
  1410. #ifdef CONFIG_IWLWIFI_DEBUG
  1411. if (priv->debug_level & (IWL_DL_ISR)) {
  1412. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1413. if (inta & CSR_INT_BIT_SCD) {
  1414. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1415. "the frame/frames.\n");
  1416. priv->isr_stats.sch++;
  1417. }
  1418. /* Alive notification via Rx interrupt will do the real work */
  1419. if (inta & CSR_INT_BIT_ALIVE) {
  1420. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1421. priv->isr_stats.alive++;
  1422. }
  1423. }
  1424. #endif
  1425. /* Safely ignore these bits for debug checks below */
  1426. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1427. /* Error detected by uCode */
  1428. if (inta & CSR_INT_BIT_SW_ERR) {
  1429. IWL_ERR(priv, "Microcode SW error detected. "
  1430. "Restarting 0x%X.\n", inta);
  1431. priv->isr_stats.sw++;
  1432. priv->isr_stats.sw_err = inta;
  1433. iwl_irq_handle_error(priv);
  1434. handled |= CSR_INT_BIT_SW_ERR;
  1435. }
  1436. /* uCode wakes up after power-down sleep */
  1437. if (inta & CSR_INT_BIT_WAKEUP) {
  1438. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1439. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1440. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1441. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1442. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1443. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1444. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1445. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1446. priv->isr_stats.wakeup++;
  1447. handled |= CSR_INT_BIT_WAKEUP;
  1448. }
  1449. /* All uCode command responses, including Tx command responses,
  1450. * Rx "responses" (frame-received notification), and other
  1451. * notifications from uCode come through here*/
  1452. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1453. iwl3945_rx_handle(priv);
  1454. priv->isr_stats.rx++;
  1455. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1456. }
  1457. if (inta & CSR_INT_BIT_FH_TX) {
  1458. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1459. priv->isr_stats.tx++;
  1460. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1461. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1462. (FH39_SRVC_CHNL), 0x0);
  1463. handled |= CSR_INT_BIT_FH_TX;
  1464. }
  1465. if (inta & ~handled) {
  1466. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1467. priv->isr_stats.unhandled++;
  1468. }
  1469. if (inta & ~priv->inta_mask) {
  1470. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1471. inta & ~priv->inta_mask);
  1472. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1473. }
  1474. /* Re-enable all interrupts */
  1475. /* only Re-enable if disabled by irq */
  1476. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1477. iwl_enable_interrupts(priv);
  1478. #ifdef CONFIG_IWLWIFI_DEBUG
  1479. if (priv->debug_level & (IWL_DL_ISR)) {
  1480. inta = iwl_read32(priv, CSR_INT);
  1481. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1482. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1483. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1484. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1485. }
  1486. #endif
  1487. spin_unlock_irqrestore(&priv->lock, flags);
  1488. }
  1489. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1490. enum ieee80211_band band,
  1491. u8 is_active, u8 n_probes,
  1492. struct iwl3945_scan_channel *scan_ch)
  1493. {
  1494. struct ieee80211_channel *chan;
  1495. const struct ieee80211_supported_band *sband;
  1496. const struct iwl_channel_info *ch_info;
  1497. u16 passive_dwell = 0;
  1498. u16 active_dwell = 0;
  1499. int added, i;
  1500. sband = iwl_get_hw_mode(priv, band);
  1501. if (!sband)
  1502. return 0;
  1503. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1504. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1505. if (passive_dwell <= active_dwell)
  1506. passive_dwell = active_dwell + 1;
  1507. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1508. chan = priv->scan_request->channels[i];
  1509. if (chan->band != band)
  1510. continue;
  1511. scan_ch->channel = chan->hw_value;
  1512. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1513. if (!is_channel_valid(ch_info)) {
  1514. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1515. scan_ch->channel);
  1516. continue;
  1517. }
  1518. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1519. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1520. /* If passive , set up for auto-switch
  1521. * and use long active_dwell time.
  1522. */
  1523. if (!is_active || is_channel_passive(ch_info) ||
  1524. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1525. scan_ch->type = 0; /* passive */
  1526. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1527. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1528. } else {
  1529. scan_ch->type = 1; /* active */
  1530. }
  1531. /* Set direct probe bits. These may be used both for active
  1532. * scan channels (probes gets sent right away),
  1533. * or for passive channels (probes get se sent only after
  1534. * hearing clear Rx packet).*/
  1535. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1536. if (n_probes)
  1537. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1538. } else {
  1539. /* uCode v1 does not allow setting direct probe bits on
  1540. * passive channel. */
  1541. if ((scan_ch->type & 1) && n_probes)
  1542. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1543. }
  1544. /* Set txpower levels to defaults */
  1545. scan_ch->tpc.dsp_atten = 110;
  1546. /* scan_pwr_info->tpc.dsp_atten; */
  1547. /*scan_pwr_info->tpc.tx_gain; */
  1548. if (band == IEEE80211_BAND_5GHZ)
  1549. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1550. else {
  1551. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1552. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1553. * power level:
  1554. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1555. */
  1556. }
  1557. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1558. scan_ch->channel,
  1559. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1560. (scan_ch->type & 1) ?
  1561. active_dwell : passive_dwell);
  1562. scan_ch++;
  1563. added++;
  1564. }
  1565. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1566. return added;
  1567. }
  1568. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1569. struct ieee80211_rate *rates)
  1570. {
  1571. int i;
  1572. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1573. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1574. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1575. rates[i].hw_value_short = i;
  1576. rates[i].flags = 0;
  1577. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1578. /*
  1579. * If CCK != 1M then set short preamble rate flag.
  1580. */
  1581. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1582. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1583. }
  1584. }
  1585. }
  1586. /******************************************************************************
  1587. *
  1588. * uCode download functions
  1589. *
  1590. ******************************************************************************/
  1591. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1592. {
  1593. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1594. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1595. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1596. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1597. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1598. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1599. }
  1600. /**
  1601. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1602. * looking at all data.
  1603. */
  1604. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1605. {
  1606. u32 val;
  1607. u32 save_len = len;
  1608. int rc = 0;
  1609. u32 errcnt;
  1610. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1611. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1612. IWL39_RTC_INST_LOWER_BOUND);
  1613. errcnt = 0;
  1614. for (; len > 0; len -= sizeof(u32), image++) {
  1615. /* read data comes through single port, auto-incr addr */
  1616. /* NOTE: Use the debugless read so we don't flood kernel log
  1617. * if IWL_DL_IO is set */
  1618. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1619. if (val != le32_to_cpu(*image)) {
  1620. IWL_ERR(priv, "uCode INST section is invalid at "
  1621. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1622. save_len - len, val, le32_to_cpu(*image));
  1623. rc = -EIO;
  1624. errcnt++;
  1625. if (errcnt >= 20)
  1626. break;
  1627. }
  1628. }
  1629. if (!errcnt)
  1630. IWL_DEBUG_INFO(priv,
  1631. "ucode image in INSTRUCTION memory is good\n");
  1632. return rc;
  1633. }
  1634. /**
  1635. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1636. * using sample data 100 bytes apart. If these sample points are good,
  1637. * it's a pretty good bet that everything between them is good, too.
  1638. */
  1639. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1640. {
  1641. u32 val;
  1642. int rc = 0;
  1643. u32 errcnt = 0;
  1644. u32 i;
  1645. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1646. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1647. /* read data comes through single port, auto-incr addr */
  1648. /* NOTE: Use the debugless read so we don't flood kernel log
  1649. * if IWL_DL_IO is set */
  1650. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1651. i + IWL39_RTC_INST_LOWER_BOUND);
  1652. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1653. if (val != le32_to_cpu(*image)) {
  1654. #if 0 /* Enable this if you want to see details */
  1655. IWL_ERR(priv, "uCode INST section is invalid at "
  1656. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1657. i, val, *image);
  1658. #endif
  1659. rc = -EIO;
  1660. errcnt++;
  1661. if (errcnt >= 3)
  1662. break;
  1663. }
  1664. }
  1665. return rc;
  1666. }
  1667. /**
  1668. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1669. * and verify its contents
  1670. */
  1671. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1672. {
  1673. __le32 *image;
  1674. u32 len;
  1675. int rc = 0;
  1676. /* Try bootstrap */
  1677. image = (__le32 *)priv->ucode_boot.v_addr;
  1678. len = priv->ucode_boot.len;
  1679. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1680. if (rc == 0) {
  1681. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1682. return 0;
  1683. }
  1684. /* Try initialize */
  1685. image = (__le32 *)priv->ucode_init.v_addr;
  1686. len = priv->ucode_init.len;
  1687. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1688. if (rc == 0) {
  1689. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1690. return 0;
  1691. }
  1692. /* Try runtime/protocol */
  1693. image = (__le32 *)priv->ucode_code.v_addr;
  1694. len = priv->ucode_code.len;
  1695. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1696. if (rc == 0) {
  1697. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1698. return 0;
  1699. }
  1700. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1701. /* Since nothing seems to match, show first several data entries in
  1702. * instruction SRAM, so maybe visual inspection will give a clue.
  1703. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1704. image = (__le32 *)priv->ucode_boot.v_addr;
  1705. len = priv->ucode_boot.len;
  1706. rc = iwl3945_verify_inst_full(priv, image, len);
  1707. return rc;
  1708. }
  1709. static void iwl3945_nic_start(struct iwl_priv *priv)
  1710. {
  1711. /* Remove all resets to allow NIC to operate */
  1712. iwl_write32(priv, CSR_RESET, 0);
  1713. }
  1714. /**
  1715. * iwl3945_read_ucode - Read uCode images from disk file.
  1716. *
  1717. * Copy into buffers for card to fetch via bus-mastering
  1718. */
  1719. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1720. {
  1721. struct iwl_ucode *ucode;
  1722. int ret = -EINVAL, index;
  1723. const struct firmware *ucode_raw;
  1724. /* firmware file name contains uCode/driver compatibility version */
  1725. const char *name_pre = priv->cfg->fw_name_pre;
  1726. const unsigned int api_max = priv->cfg->ucode_api_max;
  1727. const unsigned int api_min = priv->cfg->ucode_api_min;
  1728. char buf[25];
  1729. u8 *src;
  1730. size_t len;
  1731. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1732. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1733. * request_firmware() is synchronous, file is in memory on return. */
  1734. for (index = api_max; index >= api_min; index--) {
  1735. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1736. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1737. if (ret < 0) {
  1738. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1739. buf, ret);
  1740. if (ret == -ENOENT)
  1741. continue;
  1742. else
  1743. goto error;
  1744. } else {
  1745. if (index < api_max)
  1746. IWL_ERR(priv, "Loaded firmware %s, "
  1747. "which is deprecated. "
  1748. " Please use API v%u instead.\n",
  1749. buf, api_max);
  1750. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1751. "(%zd bytes) from disk\n",
  1752. buf, ucode_raw->size);
  1753. break;
  1754. }
  1755. }
  1756. if (ret < 0)
  1757. goto error;
  1758. /* Make sure that we got at least our header! */
  1759. if (ucode_raw->size < sizeof(*ucode)) {
  1760. IWL_ERR(priv, "File size way too small!\n");
  1761. ret = -EINVAL;
  1762. goto err_release;
  1763. }
  1764. /* Data from ucode file: header followed by uCode images */
  1765. ucode = (void *)ucode_raw->data;
  1766. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1767. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1768. inst_size = le32_to_cpu(ucode->inst_size);
  1769. data_size = le32_to_cpu(ucode->data_size);
  1770. init_size = le32_to_cpu(ucode->init_size);
  1771. init_data_size = le32_to_cpu(ucode->init_data_size);
  1772. boot_size = le32_to_cpu(ucode->boot_size);
  1773. /* api_ver should match the api version forming part of the
  1774. * firmware filename ... but we don't check for that and only rely
  1775. * on the API version read from firmware header from here on forward */
  1776. if (api_ver < api_min || api_ver > api_max) {
  1777. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1778. "Driver supports v%u, firmware is v%u.\n",
  1779. api_max, api_ver);
  1780. priv->ucode_ver = 0;
  1781. ret = -EINVAL;
  1782. goto err_release;
  1783. }
  1784. if (api_ver != api_max)
  1785. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1786. "got %u. New firmware can be obtained "
  1787. "from http://www.intellinuxwireless.org.\n",
  1788. api_max, api_ver);
  1789. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1790. IWL_UCODE_MAJOR(priv->ucode_ver),
  1791. IWL_UCODE_MINOR(priv->ucode_ver),
  1792. IWL_UCODE_API(priv->ucode_ver),
  1793. IWL_UCODE_SERIAL(priv->ucode_ver));
  1794. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1795. priv->ucode_ver);
  1796. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1797. inst_size);
  1798. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1799. data_size);
  1800. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1801. init_size);
  1802. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1803. init_data_size);
  1804. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1805. boot_size);
  1806. /* Verify size of file vs. image size info in file's header */
  1807. if (ucode_raw->size < sizeof(*ucode) +
  1808. inst_size + data_size + init_size +
  1809. init_data_size + boot_size) {
  1810. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  1811. ucode_raw->size);
  1812. ret = -EINVAL;
  1813. goto err_release;
  1814. }
  1815. /* Verify that uCode images will fit in card's SRAM */
  1816. if (inst_size > IWL39_MAX_INST_SIZE) {
  1817. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1818. inst_size);
  1819. ret = -EINVAL;
  1820. goto err_release;
  1821. }
  1822. if (data_size > IWL39_MAX_DATA_SIZE) {
  1823. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1824. data_size);
  1825. ret = -EINVAL;
  1826. goto err_release;
  1827. }
  1828. if (init_size > IWL39_MAX_INST_SIZE) {
  1829. IWL_DEBUG_INFO(priv,
  1830. "uCode init instr len %d too large to fit in\n",
  1831. init_size);
  1832. ret = -EINVAL;
  1833. goto err_release;
  1834. }
  1835. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1836. IWL_DEBUG_INFO(priv,
  1837. "uCode init data len %d too large to fit in\n",
  1838. init_data_size);
  1839. ret = -EINVAL;
  1840. goto err_release;
  1841. }
  1842. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1843. IWL_DEBUG_INFO(priv,
  1844. "uCode boot instr len %d too large to fit in\n",
  1845. boot_size);
  1846. ret = -EINVAL;
  1847. goto err_release;
  1848. }
  1849. /* Allocate ucode buffers for card's bus-master loading ... */
  1850. /* Runtime instructions and 2 copies of data:
  1851. * 1) unmodified from disk
  1852. * 2) backup cache for save/restore during power-downs */
  1853. priv->ucode_code.len = inst_size;
  1854. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1855. priv->ucode_data.len = data_size;
  1856. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1857. priv->ucode_data_backup.len = data_size;
  1858. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1859. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1860. !priv->ucode_data_backup.v_addr)
  1861. goto err_pci_alloc;
  1862. /* Initialization instructions and data */
  1863. if (init_size && init_data_size) {
  1864. priv->ucode_init.len = init_size;
  1865. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1866. priv->ucode_init_data.len = init_data_size;
  1867. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1868. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1869. goto err_pci_alloc;
  1870. }
  1871. /* Bootstrap (instructions only, no data) */
  1872. if (boot_size) {
  1873. priv->ucode_boot.len = boot_size;
  1874. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1875. if (!priv->ucode_boot.v_addr)
  1876. goto err_pci_alloc;
  1877. }
  1878. /* Copy images into buffers for card's bus-master reads ... */
  1879. /* Runtime instructions (first block of data in file) */
  1880. src = &ucode->data[0];
  1881. len = priv->ucode_code.len;
  1882. IWL_DEBUG_INFO(priv,
  1883. "Copying (but not loading) uCode instr len %zd\n", len);
  1884. memcpy(priv->ucode_code.v_addr, src, len);
  1885. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1886. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1887. /* Runtime data (2nd block)
  1888. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1889. src = &ucode->data[inst_size];
  1890. len = priv->ucode_data.len;
  1891. IWL_DEBUG_INFO(priv,
  1892. "Copying (but not loading) uCode data len %zd\n", len);
  1893. memcpy(priv->ucode_data.v_addr, src, len);
  1894. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1895. /* Initialization instructions (3rd block) */
  1896. if (init_size) {
  1897. src = &ucode->data[inst_size + data_size];
  1898. len = priv->ucode_init.len;
  1899. IWL_DEBUG_INFO(priv,
  1900. "Copying (but not loading) init instr len %zd\n", len);
  1901. memcpy(priv->ucode_init.v_addr, src, len);
  1902. }
  1903. /* Initialization data (4th block) */
  1904. if (init_data_size) {
  1905. src = &ucode->data[inst_size + data_size + init_size];
  1906. len = priv->ucode_init_data.len;
  1907. IWL_DEBUG_INFO(priv,
  1908. "Copying (but not loading) init data len %zd\n", len);
  1909. memcpy(priv->ucode_init_data.v_addr, src, len);
  1910. }
  1911. /* Bootstrap instructions (5th block) */
  1912. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  1913. len = priv->ucode_boot.len;
  1914. IWL_DEBUG_INFO(priv,
  1915. "Copying (but not loading) boot instr len %zd\n", len);
  1916. memcpy(priv->ucode_boot.v_addr, src, len);
  1917. /* We have our copies now, allow OS release its copies */
  1918. release_firmware(ucode_raw);
  1919. return 0;
  1920. err_pci_alloc:
  1921. IWL_ERR(priv, "failed to allocate pci memory\n");
  1922. ret = -ENOMEM;
  1923. iwl3945_dealloc_ucode_pci(priv);
  1924. err_release:
  1925. release_firmware(ucode_raw);
  1926. error:
  1927. return ret;
  1928. }
  1929. /**
  1930. * iwl3945_set_ucode_ptrs - Set uCode address location
  1931. *
  1932. * Tell initialization uCode where to find runtime uCode.
  1933. *
  1934. * BSM registers initially contain pointers to initialization uCode.
  1935. * We need to replace them to load runtime uCode inst and data,
  1936. * and to save runtime data when powering down.
  1937. */
  1938. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1939. {
  1940. dma_addr_t pinst;
  1941. dma_addr_t pdata;
  1942. /* bits 31:0 for 3945 */
  1943. pinst = priv->ucode_code.p_addr;
  1944. pdata = priv->ucode_data_backup.p_addr;
  1945. /* Tell bootstrap uCode where to find image to load */
  1946. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1947. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1948. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1949. priv->ucode_data.len);
  1950. /* Inst byte count must be last to set up, bit 31 signals uCode
  1951. * that all new ptr/size info is in place */
  1952. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1953. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1954. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1955. return 0;
  1956. }
  1957. /**
  1958. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1959. *
  1960. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1961. *
  1962. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1963. */
  1964. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1965. {
  1966. /* Check alive response for "valid" sign from uCode */
  1967. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  1968. /* We had an error bringing up the hardware, so take it
  1969. * all the way back down so we can try again */
  1970. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  1971. goto restart;
  1972. }
  1973. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1974. * This is a paranoid check, because we would not have gotten the
  1975. * "initialize" alive if code weren't properly loaded. */
  1976. if (iwl3945_verify_ucode(priv)) {
  1977. /* Runtime instruction load was bad;
  1978. * take it all the way back down so we can try again */
  1979. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  1980. goto restart;
  1981. }
  1982. /* Send pointers to protocol/runtime uCode image ... init code will
  1983. * load and launch runtime uCode, which will send us another "Alive"
  1984. * notification. */
  1985. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  1986. if (iwl3945_set_ucode_ptrs(priv)) {
  1987. /* Runtime instruction load won't happen;
  1988. * take it all the way back down so we can try again */
  1989. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  1990. goto restart;
  1991. }
  1992. return;
  1993. restart:
  1994. queue_work(priv->workqueue, &priv->restart);
  1995. }
  1996. /**
  1997. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  1998. * from protocol/runtime uCode (initialization uCode's
  1999. * Alive gets handled by iwl3945_init_alive_start()).
  2000. */
  2001. static void iwl3945_alive_start(struct iwl_priv *priv)
  2002. {
  2003. int thermal_spin = 0;
  2004. u32 rfkill;
  2005. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2006. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2007. /* We had an error bringing up the hardware, so take it
  2008. * all the way back down so we can try again */
  2009. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2010. goto restart;
  2011. }
  2012. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2013. * This is a paranoid check, because we would not have gotten the
  2014. * "runtime" alive if code weren't properly loaded. */
  2015. if (iwl3945_verify_ucode(priv)) {
  2016. /* Runtime instruction load was bad;
  2017. * take it all the way back down so we can try again */
  2018. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2019. goto restart;
  2020. }
  2021. iwl_clear_stations_table(priv);
  2022. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2023. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2024. if (rfkill & 0x1) {
  2025. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2026. /* if RFKILL is not on, then wait for thermal
  2027. * sensor in adapter to kick in */
  2028. while (iwl3945_hw_get_temperature(priv) == 0) {
  2029. thermal_spin++;
  2030. udelay(10);
  2031. }
  2032. if (thermal_spin)
  2033. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2034. thermal_spin * 10);
  2035. } else
  2036. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2037. /* After the ALIVE response, we can send commands to 3945 uCode */
  2038. set_bit(STATUS_ALIVE, &priv->status);
  2039. if (iwl_is_rfkill(priv))
  2040. return;
  2041. ieee80211_wake_queues(priv->hw);
  2042. priv->active_rate = priv->rates_mask;
  2043. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2044. iwl_power_update_mode(priv, false);
  2045. if (iwl_is_associated(priv)) {
  2046. struct iwl3945_rxon_cmd *active_rxon =
  2047. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2048. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2049. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2050. } else {
  2051. /* Initialize our rx_config data */
  2052. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2053. }
  2054. /* Configure Bluetooth device coexistence support */
  2055. iwl_send_bt_config(priv);
  2056. /* Configure the adapter for unassociated operation */
  2057. iwlcore_commit_rxon(priv);
  2058. iwl3945_reg_txpower_periodic(priv);
  2059. iwl3945_led_register(priv);
  2060. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2061. set_bit(STATUS_READY, &priv->status);
  2062. wake_up_interruptible(&priv->wait_command_queue);
  2063. /* reassociate for ADHOC mode */
  2064. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2065. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2066. priv->vif);
  2067. if (beacon)
  2068. iwl_mac_beacon_update(priv->hw, beacon);
  2069. }
  2070. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2071. iwl_set_mode(priv, priv->iw_mode);
  2072. return;
  2073. restart:
  2074. queue_work(priv->workqueue, &priv->restart);
  2075. }
  2076. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2077. static void __iwl3945_down(struct iwl_priv *priv)
  2078. {
  2079. unsigned long flags;
  2080. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2081. struct ieee80211_conf *conf = NULL;
  2082. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2083. conf = ieee80211_get_hw_conf(priv->hw);
  2084. if (!exit_pending)
  2085. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2086. iwl3945_led_unregister(priv);
  2087. iwl_clear_stations_table(priv);
  2088. /* Unblock any waiting calls */
  2089. wake_up_interruptible_all(&priv->wait_command_queue);
  2090. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2091. * exiting the module */
  2092. if (!exit_pending)
  2093. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2094. /* stop and reset the on-board processor */
  2095. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2096. /* tell the device to stop sending interrupts */
  2097. spin_lock_irqsave(&priv->lock, flags);
  2098. iwl_disable_interrupts(priv);
  2099. spin_unlock_irqrestore(&priv->lock, flags);
  2100. iwl_synchronize_irq(priv);
  2101. if (priv->mac80211_registered)
  2102. ieee80211_stop_queues(priv->hw);
  2103. /* If we have not previously called iwl3945_init() then
  2104. * clear all bits but the RF Kill bits and return */
  2105. if (!iwl_is_init(priv)) {
  2106. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2107. STATUS_RF_KILL_HW |
  2108. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2109. STATUS_GEO_CONFIGURED |
  2110. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2111. STATUS_EXIT_PENDING;
  2112. goto exit;
  2113. }
  2114. /* ...otherwise clear out all the status bits but the RF Kill
  2115. * bit and continue taking the NIC down. */
  2116. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2117. STATUS_RF_KILL_HW |
  2118. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2119. STATUS_GEO_CONFIGURED |
  2120. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2121. STATUS_FW_ERROR |
  2122. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2123. STATUS_EXIT_PENDING;
  2124. priv->cfg->ops->lib->apm_ops.reset(priv);
  2125. spin_lock_irqsave(&priv->lock, flags);
  2126. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2127. spin_unlock_irqrestore(&priv->lock, flags);
  2128. iwl3945_hw_txq_ctx_stop(priv);
  2129. iwl3945_hw_rxq_stop(priv);
  2130. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2131. APMG_CLK_VAL_DMA_CLK_RQT);
  2132. udelay(5);
  2133. if (exit_pending)
  2134. priv->cfg->ops->lib->apm_ops.stop(priv);
  2135. else
  2136. priv->cfg->ops->lib->apm_ops.reset(priv);
  2137. exit:
  2138. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2139. if (priv->ibss_beacon)
  2140. dev_kfree_skb(priv->ibss_beacon);
  2141. priv->ibss_beacon = NULL;
  2142. /* clear out any free frames */
  2143. iwl3945_clear_free_frames(priv);
  2144. }
  2145. static void iwl3945_down(struct iwl_priv *priv)
  2146. {
  2147. mutex_lock(&priv->mutex);
  2148. __iwl3945_down(priv);
  2149. mutex_unlock(&priv->mutex);
  2150. iwl3945_cancel_deferred_work(priv);
  2151. }
  2152. #define MAX_HW_RESTARTS 5
  2153. static int __iwl3945_up(struct iwl_priv *priv)
  2154. {
  2155. int rc, i;
  2156. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2157. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2158. return -EIO;
  2159. }
  2160. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2161. IWL_ERR(priv, "ucode not available for device bring up\n");
  2162. return -EIO;
  2163. }
  2164. /* If platform's RF_KILL switch is NOT set to KILL */
  2165. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2166. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2167. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2168. else {
  2169. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2170. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2171. return -ENODEV;
  2172. }
  2173. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2174. rc = iwl3945_hw_nic_init(priv);
  2175. if (rc) {
  2176. IWL_ERR(priv, "Unable to int nic\n");
  2177. return rc;
  2178. }
  2179. /* make sure rfkill handshake bits are cleared */
  2180. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2181. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2182. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2183. /* clear (again), then enable host interrupts */
  2184. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2185. iwl_enable_interrupts(priv);
  2186. /* really make sure rfkill handshake bits are cleared */
  2187. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2188. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2189. /* Copy original ucode data image from disk into backup cache.
  2190. * This will be used to initialize the on-board processor's
  2191. * data SRAM for a clean start when the runtime program first loads. */
  2192. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2193. priv->ucode_data.len);
  2194. /* We return success when we resume from suspend and rf_kill is on. */
  2195. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2196. return 0;
  2197. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2198. iwl_clear_stations_table(priv);
  2199. /* load bootstrap state machine,
  2200. * load bootstrap program into processor's memory,
  2201. * prepare to load the "initialize" uCode */
  2202. priv->cfg->ops->lib->load_ucode(priv);
  2203. if (rc) {
  2204. IWL_ERR(priv,
  2205. "Unable to set up bootstrap uCode: %d\n", rc);
  2206. continue;
  2207. }
  2208. /* start card; "initialize" will load runtime ucode */
  2209. iwl3945_nic_start(priv);
  2210. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2211. return 0;
  2212. }
  2213. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2214. __iwl3945_down(priv);
  2215. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2216. /* tried to restart and config the device for as long as our
  2217. * patience could withstand */
  2218. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2219. return -EIO;
  2220. }
  2221. /*****************************************************************************
  2222. *
  2223. * Workqueue callbacks
  2224. *
  2225. *****************************************************************************/
  2226. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2227. {
  2228. struct iwl_priv *priv =
  2229. container_of(data, struct iwl_priv, init_alive_start.work);
  2230. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2231. return;
  2232. mutex_lock(&priv->mutex);
  2233. iwl3945_init_alive_start(priv);
  2234. mutex_unlock(&priv->mutex);
  2235. }
  2236. static void iwl3945_bg_alive_start(struct work_struct *data)
  2237. {
  2238. struct iwl_priv *priv =
  2239. container_of(data, struct iwl_priv, alive_start.work);
  2240. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2241. return;
  2242. mutex_lock(&priv->mutex);
  2243. iwl3945_alive_start(priv);
  2244. mutex_unlock(&priv->mutex);
  2245. }
  2246. static void iwl3945_rfkill_poll(struct work_struct *data)
  2247. {
  2248. struct iwl_priv *priv =
  2249. container_of(data, struct iwl_priv, rfkill_poll.work);
  2250. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2251. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2252. else
  2253. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2254. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  2255. test_bit(STATUS_RF_KILL_HW, &priv->status));
  2256. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2257. round_jiffies_relative(2 * HZ));
  2258. }
  2259. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2260. static void iwl3945_bg_request_scan(struct work_struct *data)
  2261. {
  2262. struct iwl_priv *priv =
  2263. container_of(data, struct iwl_priv, request_scan);
  2264. struct iwl_host_cmd cmd = {
  2265. .id = REPLY_SCAN_CMD,
  2266. .len = sizeof(struct iwl3945_scan_cmd),
  2267. .meta.flags = CMD_SIZE_HUGE,
  2268. };
  2269. int rc = 0;
  2270. struct iwl3945_scan_cmd *scan;
  2271. struct ieee80211_conf *conf = NULL;
  2272. u8 n_probes = 0;
  2273. enum ieee80211_band band;
  2274. bool is_active = false;
  2275. conf = ieee80211_get_hw_conf(priv->hw);
  2276. mutex_lock(&priv->mutex);
  2277. cancel_delayed_work(&priv->scan_check);
  2278. if (!iwl_is_ready(priv)) {
  2279. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2280. goto done;
  2281. }
  2282. /* Make sure the scan wasn't canceled before this queued work
  2283. * was given the chance to run... */
  2284. if (!test_bit(STATUS_SCANNING, &priv->status))
  2285. goto done;
  2286. /* This should never be called or scheduled if there is currently
  2287. * a scan active in the hardware. */
  2288. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2289. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2290. "Ignoring second request.\n");
  2291. rc = -EIO;
  2292. goto done;
  2293. }
  2294. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2295. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2296. goto done;
  2297. }
  2298. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2299. IWL_DEBUG_HC(priv,
  2300. "Scan request while abort pending. Queuing.\n");
  2301. goto done;
  2302. }
  2303. if (iwl_is_rfkill(priv)) {
  2304. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2305. goto done;
  2306. }
  2307. if (!test_bit(STATUS_READY, &priv->status)) {
  2308. IWL_DEBUG_HC(priv,
  2309. "Scan request while uninitialized. Queuing.\n");
  2310. goto done;
  2311. }
  2312. if (!priv->scan_bands) {
  2313. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2314. goto done;
  2315. }
  2316. if (!priv->scan) {
  2317. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2318. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2319. if (!priv->scan) {
  2320. rc = -ENOMEM;
  2321. goto done;
  2322. }
  2323. }
  2324. scan = priv->scan;
  2325. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2326. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2327. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2328. if (iwl_is_associated(priv)) {
  2329. u16 interval = 0;
  2330. u32 extra;
  2331. u32 suspend_time = 100;
  2332. u32 scan_suspend_time = 100;
  2333. unsigned long flags;
  2334. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2335. spin_lock_irqsave(&priv->lock, flags);
  2336. interval = priv->beacon_int;
  2337. spin_unlock_irqrestore(&priv->lock, flags);
  2338. scan->suspend_time = 0;
  2339. scan->max_out_time = cpu_to_le32(200 * 1024);
  2340. if (!interval)
  2341. interval = suspend_time;
  2342. /*
  2343. * suspend time format:
  2344. * 0-19: beacon interval in usec (time before exec.)
  2345. * 20-23: 0
  2346. * 24-31: number of beacons (suspend between channels)
  2347. */
  2348. extra = (suspend_time / interval) << 24;
  2349. scan_suspend_time = 0xFF0FFFFF &
  2350. (extra | ((suspend_time % interval) * 1024));
  2351. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2352. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2353. scan_suspend_time, interval);
  2354. }
  2355. if (priv->scan_request->n_ssids) {
  2356. int i, p = 0;
  2357. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2358. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2359. /* always does wildcard anyway */
  2360. if (!priv->scan_request->ssids[i].ssid_len)
  2361. continue;
  2362. scan->direct_scan[p].id = WLAN_EID_SSID;
  2363. scan->direct_scan[p].len =
  2364. priv->scan_request->ssids[i].ssid_len;
  2365. memcpy(scan->direct_scan[p].ssid,
  2366. priv->scan_request->ssids[i].ssid,
  2367. priv->scan_request->ssids[i].ssid_len);
  2368. n_probes++;
  2369. p++;
  2370. }
  2371. is_active = true;
  2372. } else
  2373. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2374. /* We don't build a direct scan probe request; the uCode will do
  2375. * that based on the direct_mask added to each channel entry */
  2376. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2377. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2378. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2379. /* flags + rate selection */
  2380. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2381. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2382. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2383. scan->good_CRC_th = 0;
  2384. band = IEEE80211_BAND_2GHZ;
  2385. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2386. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2387. /*
  2388. * If active scaning is requested but a certain channel
  2389. * is marked passive, we can do active scanning if we
  2390. * detect transmissions.
  2391. */
  2392. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2393. band = IEEE80211_BAND_5GHZ;
  2394. } else {
  2395. IWL_WARN(priv, "Invalid scan band count\n");
  2396. goto done;
  2397. }
  2398. scan->tx_cmd.len = cpu_to_le16(
  2399. iwl_fill_probe_req(priv,
  2400. (struct ieee80211_mgmt *)scan->data,
  2401. priv->scan_request->ie,
  2402. priv->scan_request->ie_len,
  2403. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2404. /* select Rx antennas */
  2405. scan->flags |= iwl3945_get_antenna_flags(priv);
  2406. if (iwl_is_monitor_mode(priv))
  2407. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2408. scan->channel_count =
  2409. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2410. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2411. if (scan->channel_count == 0) {
  2412. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2413. goto done;
  2414. }
  2415. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2416. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2417. cmd.data = scan;
  2418. scan->len = cpu_to_le16(cmd.len);
  2419. set_bit(STATUS_SCAN_HW, &priv->status);
  2420. rc = iwl_send_cmd_sync(priv, &cmd);
  2421. if (rc)
  2422. goto done;
  2423. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2424. IWL_SCAN_CHECK_WATCHDOG);
  2425. mutex_unlock(&priv->mutex);
  2426. return;
  2427. done:
  2428. /* can not perform scan make sure we clear scanning
  2429. * bits from status so next scan request can be performed.
  2430. * if we dont clear scanning status bit here all next scan
  2431. * will fail
  2432. */
  2433. clear_bit(STATUS_SCAN_HW, &priv->status);
  2434. clear_bit(STATUS_SCANNING, &priv->status);
  2435. /* inform mac80211 scan aborted */
  2436. queue_work(priv->workqueue, &priv->scan_completed);
  2437. mutex_unlock(&priv->mutex);
  2438. }
  2439. static void iwl3945_bg_up(struct work_struct *data)
  2440. {
  2441. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2442. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2443. return;
  2444. mutex_lock(&priv->mutex);
  2445. __iwl3945_up(priv);
  2446. mutex_unlock(&priv->mutex);
  2447. }
  2448. static void iwl3945_bg_restart(struct work_struct *data)
  2449. {
  2450. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2451. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2452. return;
  2453. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2454. mutex_lock(&priv->mutex);
  2455. priv->vif = NULL;
  2456. priv->is_open = 0;
  2457. mutex_unlock(&priv->mutex);
  2458. iwl3945_down(priv);
  2459. ieee80211_restart_hw(priv->hw);
  2460. } else {
  2461. iwl3945_down(priv);
  2462. queue_work(priv->workqueue, &priv->up);
  2463. }
  2464. }
  2465. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2466. {
  2467. struct iwl_priv *priv =
  2468. container_of(data, struct iwl_priv, rx_replenish);
  2469. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2470. return;
  2471. mutex_lock(&priv->mutex);
  2472. iwl3945_rx_replenish(priv);
  2473. mutex_unlock(&priv->mutex);
  2474. }
  2475. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2476. void iwl3945_post_associate(struct iwl_priv *priv)
  2477. {
  2478. int rc = 0;
  2479. struct ieee80211_conf *conf = NULL;
  2480. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2481. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2482. return;
  2483. }
  2484. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2485. priv->assoc_id, priv->active_rxon.bssid_addr);
  2486. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2487. return;
  2488. if (!priv->vif || !priv->is_open)
  2489. return;
  2490. iwl_scan_cancel_timeout(priv, 200);
  2491. conf = ieee80211_get_hw_conf(priv->hw);
  2492. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2493. iwlcore_commit_rxon(priv);
  2494. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2495. iwl_setup_rxon_timing(priv);
  2496. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2497. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2498. if (rc)
  2499. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2500. "Attempting to continue.\n");
  2501. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2502. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2503. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2504. priv->assoc_id, priv->beacon_int);
  2505. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2506. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2507. else
  2508. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2509. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2510. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2511. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2512. else
  2513. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2514. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2515. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2516. }
  2517. iwlcore_commit_rxon(priv);
  2518. switch (priv->iw_mode) {
  2519. case NL80211_IFTYPE_STATION:
  2520. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2521. break;
  2522. case NL80211_IFTYPE_ADHOC:
  2523. priv->assoc_id = 1;
  2524. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2525. iwl3945_sync_sta(priv, IWL_STA_ID,
  2526. (priv->band == IEEE80211_BAND_5GHZ) ?
  2527. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2528. CMD_ASYNC);
  2529. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2530. iwl3945_send_beacon_cmd(priv);
  2531. break;
  2532. default:
  2533. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2534. __func__, priv->iw_mode);
  2535. break;
  2536. }
  2537. iwl_activate_qos(priv, 0);
  2538. /* we have just associated, don't start scan too early */
  2539. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2540. }
  2541. /*****************************************************************************
  2542. *
  2543. * mac80211 entry point functions
  2544. *
  2545. *****************************************************************************/
  2546. #define UCODE_READY_TIMEOUT (2 * HZ)
  2547. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2548. {
  2549. struct iwl_priv *priv = hw->priv;
  2550. int ret;
  2551. IWL_DEBUG_MAC80211(priv, "enter\n");
  2552. /* we should be verifying the device is ready to be opened */
  2553. mutex_lock(&priv->mutex);
  2554. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2555. * ucode filename and max sizes are card-specific. */
  2556. if (!priv->ucode_code.len) {
  2557. ret = iwl3945_read_ucode(priv);
  2558. if (ret) {
  2559. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2560. mutex_unlock(&priv->mutex);
  2561. goto out_release_irq;
  2562. }
  2563. }
  2564. ret = __iwl3945_up(priv);
  2565. mutex_unlock(&priv->mutex);
  2566. if (ret)
  2567. goto out_release_irq;
  2568. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2569. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2570. * mac80211 will not be run successfully. */
  2571. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2572. test_bit(STATUS_READY, &priv->status),
  2573. UCODE_READY_TIMEOUT);
  2574. if (!ret) {
  2575. if (!test_bit(STATUS_READY, &priv->status)) {
  2576. IWL_ERR(priv,
  2577. "Wait for START_ALIVE timeout after %dms.\n",
  2578. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2579. ret = -ETIMEDOUT;
  2580. goto out_release_irq;
  2581. }
  2582. }
  2583. /* ucode is running and will send rfkill notifications,
  2584. * no need to poll the killswitch state anymore */
  2585. cancel_delayed_work(&priv->rfkill_poll);
  2586. priv->is_open = 1;
  2587. IWL_DEBUG_MAC80211(priv, "leave\n");
  2588. return 0;
  2589. out_release_irq:
  2590. priv->is_open = 0;
  2591. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2592. return ret;
  2593. }
  2594. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2595. {
  2596. struct iwl_priv *priv = hw->priv;
  2597. IWL_DEBUG_MAC80211(priv, "enter\n");
  2598. if (!priv->is_open) {
  2599. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2600. return;
  2601. }
  2602. priv->is_open = 0;
  2603. if (iwl_is_ready_rf(priv)) {
  2604. /* stop mac, cancel any scan request and clear
  2605. * RXON_FILTER_ASSOC_MSK BIT
  2606. */
  2607. mutex_lock(&priv->mutex);
  2608. iwl_scan_cancel_timeout(priv, 100);
  2609. mutex_unlock(&priv->mutex);
  2610. }
  2611. iwl3945_down(priv);
  2612. flush_workqueue(priv->workqueue);
  2613. /* start polling the killswitch state again */
  2614. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2615. round_jiffies_relative(2 * HZ));
  2616. IWL_DEBUG_MAC80211(priv, "leave\n");
  2617. }
  2618. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2619. {
  2620. struct iwl_priv *priv = hw->priv;
  2621. IWL_DEBUG_MAC80211(priv, "enter\n");
  2622. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2623. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2624. if (iwl3945_tx_skb(priv, skb))
  2625. dev_kfree_skb_any(skb);
  2626. IWL_DEBUG_MAC80211(priv, "leave\n");
  2627. return NETDEV_TX_OK;
  2628. }
  2629. void iwl3945_config_ap(struct iwl_priv *priv)
  2630. {
  2631. int rc = 0;
  2632. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2633. return;
  2634. /* The following should be done only at AP bring up */
  2635. if (!(iwl_is_associated(priv))) {
  2636. /* RXON - unassoc (to set timing command) */
  2637. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2638. iwlcore_commit_rxon(priv);
  2639. /* RXON Timing */
  2640. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2641. iwl_setup_rxon_timing(priv);
  2642. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2643. sizeof(priv->rxon_timing),
  2644. &priv->rxon_timing);
  2645. if (rc)
  2646. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2647. "Attempting to continue.\n");
  2648. /* FIXME: what should be the assoc_id for AP? */
  2649. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2650. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2651. priv->staging_rxon.flags |=
  2652. RXON_FLG_SHORT_PREAMBLE_MSK;
  2653. else
  2654. priv->staging_rxon.flags &=
  2655. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2656. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2657. if (priv->assoc_capability &
  2658. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2659. priv->staging_rxon.flags |=
  2660. RXON_FLG_SHORT_SLOT_MSK;
  2661. else
  2662. priv->staging_rxon.flags &=
  2663. ~RXON_FLG_SHORT_SLOT_MSK;
  2664. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2665. priv->staging_rxon.flags &=
  2666. ~RXON_FLG_SHORT_SLOT_MSK;
  2667. }
  2668. /* restore RXON assoc */
  2669. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2670. iwlcore_commit_rxon(priv);
  2671. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2672. }
  2673. iwl3945_send_beacon_cmd(priv);
  2674. /* FIXME - we need to add code here to detect a totally new
  2675. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2676. * clear sta table, add BCAST sta... */
  2677. }
  2678. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2679. struct ieee80211_vif *vif,
  2680. struct ieee80211_sta *sta,
  2681. struct ieee80211_key_conf *key)
  2682. {
  2683. struct iwl_priv *priv = hw->priv;
  2684. const u8 *addr;
  2685. int ret = 0;
  2686. u8 sta_id = IWL_INVALID_STATION;
  2687. u8 static_key;
  2688. IWL_DEBUG_MAC80211(priv, "enter\n");
  2689. if (iwl3945_mod_params.sw_crypto) {
  2690. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2691. return -EOPNOTSUPP;
  2692. }
  2693. addr = sta ? sta->addr : iwl_bcast_addr;
  2694. static_key = !iwl_is_associated(priv);
  2695. if (!static_key) {
  2696. sta_id = iwl_find_station(priv, addr);
  2697. if (sta_id == IWL_INVALID_STATION) {
  2698. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2699. addr);
  2700. return -EINVAL;
  2701. }
  2702. }
  2703. mutex_lock(&priv->mutex);
  2704. iwl_scan_cancel_timeout(priv, 100);
  2705. mutex_unlock(&priv->mutex);
  2706. switch (cmd) {
  2707. case SET_KEY:
  2708. if (static_key)
  2709. ret = iwl3945_set_static_key(priv, key);
  2710. else
  2711. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2712. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2713. break;
  2714. case DISABLE_KEY:
  2715. if (static_key)
  2716. ret = iwl3945_remove_static_key(priv);
  2717. else
  2718. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2719. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2720. break;
  2721. default:
  2722. ret = -EINVAL;
  2723. }
  2724. IWL_DEBUG_MAC80211(priv, "leave\n");
  2725. return ret;
  2726. }
  2727. /*****************************************************************************
  2728. *
  2729. * sysfs attributes
  2730. *
  2731. *****************************************************************************/
  2732. #ifdef CONFIG_IWLWIFI_DEBUG
  2733. /*
  2734. * The following adds a new attribute to the sysfs representation
  2735. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2736. * used for controlling the debug level.
  2737. *
  2738. * See the level definitions in iwl for details.
  2739. */
  2740. static ssize_t show_debug_level(struct device *d,
  2741. struct device_attribute *attr, char *buf)
  2742. {
  2743. struct iwl_priv *priv = dev_get_drvdata(d);
  2744. return sprintf(buf, "0x%08X\n", priv->debug_level);
  2745. }
  2746. static ssize_t store_debug_level(struct device *d,
  2747. struct device_attribute *attr,
  2748. const char *buf, size_t count)
  2749. {
  2750. struct iwl_priv *priv = dev_get_drvdata(d);
  2751. unsigned long val;
  2752. int ret;
  2753. ret = strict_strtoul(buf, 0, &val);
  2754. if (ret)
  2755. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2756. else
  2757. priv->debug_level = val;
  2758. return strnlen(buf, count);
  2759. }
  2760. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2761. show_debug_level, store_debug_level);
  2762. #endif /* CONFIG_IWLWIFI_DEBUG */
  2763. static ssize_t show_temperature(struct device *d,
  2764. struct device_attribute *attr, char *buf)
  2765. {
  2766. struct iwl_priv *priv = dev_get_drvdata(d);
  2767. if (!iwl_is_alive(priv))
  2768. return -EAGAIN;
  2769. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2770. }
  2771. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2772. static ssize_t show_tx_power(struct device *d,
  2773. struct device_attribute *attr, char *buf)
  2774. {
  2775. struct iwl_priv *priv = dev_get_drvdata(d);
  2776. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2777. }
  2778. static ssize_t store_tx_power(struct device *d,
  2779. struct device_attribute *attr,
  2780. const char *buf, size_t count)
  2781. {
  2782. struct iwl_priv *priv = dev_get_drvdata(d);
  2783. char *p = (char *)buf;
  2784. u32 val;
  2785. val = simple_strtoul(p, &p, 10);
  2786. if (p == buf)
  2787. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2788. else
  2789. iwl3945_hw_reg_set_txpower(priv, val);
  2790. return count;
  2791. }
  2792. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2793. static ssize_t show_flags(struct device *d,
  2794. struct device_attribute *attr, char *buf)
  2795. {
  2796. struct iwl_priv *priv = dev_get_drvdata(d);
  2797. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2798. }
  2799. static ssize_t store_flags(struct device *d,
  2800. struct device_attribute *attr,
  2801. const char *buf, size_t count)
  2802. {
  2803. struct iwl_priv *priv = dev_get_drvdata(d);
  2804. u32 flags = simple_strtoul(buf, NULL, 0);
  2805. mutex_lock(&priv->mutex);
  2806. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2807. /* Cancel any currently running scans... */
  2808. if (iwl_scan_cancel_timeout(priv, 100))
  2809. IWL_WARN(priv, "Could not cancel scan.\n");
  2810. else {
  2811. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2812. flags);
  2813. priv->staging_rxon.flags = cpu_to_le32(flags);
  2814. iwlcore_commit_rxon(priv);
  2815. }
  2816. }
  2817. mutex_unlock(&priv->mutex);
  2818. return count;
  2819. }
  2820. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2821. static ssize_t show_filter_flags(struct device *d,
  2822. struct device_attribute *attr, char *buf)
  2823. {
  2824. struct iwl_priv *priv = dev_get_drvdata(d);
  2825. return sprintf(buf, "0x%04X\n",
  2826. le32_to_cpu(priv->active_rxon.filter_flags));
  2827. }
  2828. static ssize_t store_filter_flags(struct device *d,
  2829. struct device_attribute *attr,
  2830. const char *buf, size_t count)
  2831. {
  2832. struct iwl_priv *priv = dev_get_drvdata(d);
  2833. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2834. mutex_lock(&priv->mutex);
  2835. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2836. /* Cancel any currently running scans... */
  2837. if (iwl_scan_cancel_timeout(priv, 100))
  2838. IWL_WARN(priv, "Could not cancel scan.\n");
  2839. else {
  2840. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2841. "0x%04X\n", filter_flags);
  2842. priv->staging_rxon.filter_flags =
  2843. cpu_to_le32(filter_flags);
  2844. iwlcore_commit_rxon(priv);
  2845. }
  2846. }
  2847. mutex_unlock(&priv->mutex);
  2848. return count;
  2849. }
  2850. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2851. store_filter_flags);
  2852. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2853. static ssize_t show_measurement(struct device *d,
  2854. struct device_attribute *attr, char *buf)
  2855. {
  2856. struct iwl_priv *priv = dev_get_drvdata(d);
  2857. struct iwl_spectrum_notification measure_report;
  2858. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2859. u8 *data = (u8 *)&measure_report;
  2860. unsigned long flags;
  2861. spin_lock_irqsave(&priv->lock, flags);
  2862. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2863. spin_unlock_irqrestore(&priv->lock, flags);
  2864. return 0;
  2865. }
  2866. memcpy(&measure_report, &priv->measure_report, size);
  2867. priv->measurement_status = 0;
  2868. spin_unlock_irqrestore(&priv->lock, flags);
  2869. while (size && (PAGE_SIZE - len)) {
  2870. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2871. PAGE_SIZE - len, 1);
  2872. len = strlen(buf);
  2873. if (PAGE_SIZE - len)
  2874. buf[len++] = '\n';
  2875. ofs += 16;
  2876. size -= min(size, 16U);
  2877. }
  2878. return len;
  2879. }
  2880. static ssize_t store_measurement(struct device *d,
  2881. struct device_attribute *attr,
  2882. const char *buf, size_t count)
  2883. {
  2884. struct iwl_priv *priv = dev_get_drvdata(d);
  2885. struct ieee80211_measurement_params params = {
  2886. .channel = le16_to_cpu(priv->active_rxon.channel),
  2887. .start_time = cpu_to_le64(priv->last_tsf),
  2888. .duration = cpu_to_le16(1),
  2889. };
  2890. u8 type = IWL_MEASURE_BASIC;
  2891. u8 buffer[32];
  2892. u8 channel;
  2893. if (count) {
  2894. char *p = buffer;
  2895. strncpy(buffer, buf, min(sizeof(buffer), count));
  2896. channel = simple_strtoul(p, NULL, 0);
  2897. if (channel)
  2898. params.channel = channel;
  2899. p = buffer;
  2900. while (*p && *p != ' ')
  2901. p++;
  2902. if (*p)
  2903. type = simple_strtoul(p + 1, NULL, 0);
  2904. }
  2905. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2906. "channel %d (for '%s')\n", type, params.channel, buf);
  2907. iwl3945_get_measurement(priv, &params, type);
  2908. return count;
  2909. }
  2910. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2911. show_measurement, store_measurement);
  2912. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2913. static ssize_t store_retry_rate(struct device *d,
  2914. struct device_attribute *attr,
  2915. const char *buf, size_t count)
  2916. {
  2917. struct iwl_priv *priv = dev_get_drvdata(d);
  2918. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2919. if (priv->retry_rate <= 0)
  2920. priv->retry_rate = 1;
  2921. return count;
  2922. }
  2923. static ssize_t show_retry_rate(struct device *d,
  2924. struct device_attribute *attr, char *buf)
  2925. {
  2926. struct iwl_priv *priv = dev_get_drvdata(d);
  2927. return sprintf(buf, "%d", priv->retry_rate);
  2928. }
  2929. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2930. store_retry_rate);
  2931. static ssize_t store_power_level(struct device *d,
  2932. struct device_attribute *attr,
  2933. const char *buf, size_t count)
  2934. {
  2935. struct iwl_priv *priv = dev_get_drvdata(d);
  2936. int ret;
  2937. unsigned long mode;
  2938. mutex_lock(&priv->mutex);
  2939. ret = strict_strtoul(buf, 10, &mode);
  2940. if (ret)
  2941. goto out;
  2942. ret = iwl_power_set_user_mode(priv, mode);
  2943. if (ret) {
  2944. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  2945. goto out;
  2946. }
  2947. ret = count;
  2948. out:
  2949. mutex_unlock(&priv->mutex);
  2950. return ret;
  2951. }
  2952. static ssize_t show_power_level(struct device *d,
  2953. struct device_attribute *attr, char *buf)
  2954. {
  2955. struct iwl_priv *priv = dev_get_drvdata(d);
  2956. int mode = priv->power_data.user_power_setting;
  2957. int level = priv->power_data.power_mode;
  2958. char *p = buf;
  2959. p += sprintf(p, "INDEX:%d\t", level);
  2960. p += sprintf(p, "USER:%d\n", mode);
  2961. return p - buf + 1;
  2962. }
  2963. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  2964. show_power_level, store_power_level);
  2965. #define MAX_WX_STRING 80
  2966. /* Values are in microsecond */
  2967. static const s32 timeout_duration[] = {
  2968. 350000,
  2969. 250000,
  2970. 75000,
  2971. 37000,
  2972. 25000,
  2973. };
  2974. static const s32 period_duration[] = {
  2975. 400000,
  2976. 700000,
  2977. 1000000,
  2978. 1000000,
  2979. 1000000
  2980. };
  2981. static ssize_t show_channels(struct device *d,
  2982. struct device_attribute *attr, char *buf)
  2983. {
  2984. /* all this shit doesn't belong into sysfs anyway */
  2985. return 0;
  2986. }
  2987. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2988. static ssize_t show_statistics(struct device *d,
  2989. struct device_attribute *attr, char *buf)
  2990. {
  2991. struct iwl_priv *priv = dev_get_drvdata(d);
  2992. u32 size = sizeof(struct iwl3945_notif_statistics);
  2993. u32 len = 0, ofs = 0;
  2994. u8 *data = (u8 *)&priv->statistics_39;
  2995. int rc = 0;
  2996. if (!iwl_is_alive(priv))
  2997. return -EAGAIN;
  2998. mutex_lock(&priv->mutex);
  2999. rc = iwl_send_statistics_request(priv, 0);
  3000. mutex_unlock(&priv->mutex);
  3001. if (rc) {
  3002. len = sprintf(buf,
  3003. "Error sending statistics request: 0x%08X\n", rc);
  3004. return len;
  3005. }
  3006. while (size && (PAGE_SIZE - len)) {
  3007. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3008. PAGE_SIZE - len, 1);
  3009. len = strlen(buf);
  3010. if (PAGE_SIZE - len)
  3011. buf[len++] = '\n';
  3012. ofs += 16;
  3013. size -= min(size, 16U);
  3014. }
  3015. return len;
  3016. }
  3017. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3018. static ssize_t show_antenna(struct device *d,
  3019. struct device_attribute *attr, char *buf)
  3020. {
  3021. struct iwl_priv *priv = dev_get_drvdata(d);
  3022. if (!iwl_is_alive(priv))
  3023. return -EAGAIN;
  3024. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3025. }
  3026. static ssize_t store_antenna(struct device *d,
  3027. struct device_attribute *attr,
  3028. const char *buf, size_t count)
  3029. {
  3030. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3031. int ant;
  3032. if (count == 0)
  3033. return 0;
  3034. if (sscanf(buf, "%1i", &ant) != 1) {
  3035. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3036. return count;
  3037. }
  3038. if ((ant >= 0) && (ant <= 2)) {
  3039. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3040. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3041. } else
  3042. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3043. return count;
  3044. }
  3045. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3046. static ssize_t show_status(struct device *d,
  3047. struct device_attribute *attr, char *buf)
  3048. {
  3049. struct iwl_priv *priv = dev_get_drvdata(d);
  3050. if (!iwl_is_alive(priv))
  3051. return -EAGAIN;
  3052. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3053. }
  3054. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3055. static ssize_t dump_error_log(struct device *d,
  3056. struct device_attribute *attr,
  3057. const char *buf, size_t count)
  3058. {
  3059. struct iwl_priv *priv = dev_get_drvdata(d);
  3060. char *p = (char *)buf;
  3061. if (p[0] == '1')
  3062. iwl3945_dump_nic_error_log(priv);
  3063. return strnlen(buf, count);
  3064. }
  3065. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3066. static ssize_t dump_event_log(struct device *d,
  3067. struct device_attribute *attr,
  3068. const char *buf, size_t count)
  3069. {
  3070. struct iwl_priv *priv = dev_get_drvdata(d);
  3071. char *p = (char *)buf;
  3072. if (p[0] == '1')
  3073. iwl3945_dump_nic_event_log(priv);
  3074. return strnlen(buf, count);
  3075. }
  3076. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3077. /*****************************************************************************
  3078. *
  3079. * driver setup and tear down
  3080. *
  3081. *****************************************************************************/
  3082. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3083. {
  3084. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3085. init_waitqueue_head(&priv->wait_command_queue);
  3086. INIT_WORK(&priv->up, iwl3945_bg_up);
  3087. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3088. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3089. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3090. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3091. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3092. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3093. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3094. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3095. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3096. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3097. iwl3945_hw_setup_deferred_work(priv);
  3098. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3099. iwl3945_irq_tasklet, (unsigned long)priv);
  3100. }
  3101. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3102. {
  3103. iwl3945_hw_cancel_deferred_work(priv);
  3104. cancel_delayed_work_sync(&priv->init_alive_start);
  3105. cancel_delayed_work(&priv->scan_check);
  3106. cancel_delayed_work(&priv->alive_start);
  3107. cancel_work_sync(&priv->beacon_update);
  3108. }
  3109. static struct attribute *iwl3945_sysfs_entries[] = {
  3110. &dev_attr_antenna.attr,
  3111. &dev_attr_channels.attr,
  3112. &dev_attr_dump_errors.attr,
  3113. &dev_attr_dump_events.attr,
  3114. &dev_attr_flags.attr,
  3115. &dev_attr_filter_flags.attr,
  3116. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3117. &dev_attr_measurement.attr,
  3118. #endif
  3119. &dev_attr_power_level.attr,
  3120. &dev_attr_retry_rate.attr,
  3121. &dev_attr_statistics.attr,
  3122. &dev_attr_status.attr,
  3123. &dev_attr_temperature.attr,
  3124. &dev_attr_tx_power.attr,
  3125. #ifdef CONFIG_IWLWIFI_DEBUG
  3126. &dev_attr_debug_level.attr,
  3127. #endif
  3128. NULL
  3129. };
  3130. static struct attribute_group iwl3945_attribute_group = {
  3131. .name = NULL, /* put in device directory */
  3132. .attrs = iwl3945_sysfs_entries,
  3133. };
  3134. static struct ieee80211_ops iwl3945_hw_ops = {
  3135. .tx = iwl3945_mac_tx,
  3136. .start = iwl3945_mac_start,
  3137. .stop = iwl3945_mac_stop,
  3138. .add_interface = iwl_mac_add_interface,
  3139. .remove_interface = iwl_mac_remove_interface,
  3140. .config = iwl_mac_config,
  3141. .configure_filter = iwl_configure_filter,
  3142. .set_key = iwl3945_mac_set_key,
  3143. .get_tx_stats = iwl_mac_get_tx_stats,
  3144. .conf_tx = iwl_mac_conf_tx,
  3145. .reset_tsf = iwl_mac_reset_tsf,
  3146. .bss_info_changed = iwl_bss_info_changed,
  3147. .hw_scan = iwl_mac_hw_scan
  3148. };
  3149. static int iwl3945_init_drv(struct iwl_priv *priv)
  3150. {
  3151. int ret;
  3152. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3153. priv->retry_rate = 1;
  3154. priv->ibss_beacon = NULL;
  3155. spin_lock_init(&priv->lock);
  3156. spin_lock_init(&priv->sta_lock);
  3157. spin_lock_init(&priv->hcmd_lock);
  3158. INIT_LIST_HEAD(&priv->free_frames);
  3159. mutex_init(&priv->mutex);
  3160. /* Clear the driver's (not device's) station table */
  3161. iwl_clear_stations_table(priv);
  3162. priv->data_retry_limit = -1;
  3163. priv->ieee_channels = NULL;
  3164. priv->ieee_rates = NULL;
  3165. priv->band = IEEE80211_BAND_2GHZ;
  3166. priv->iw_mode = NL80211_IFTYPE_STATION;
  3167. iwl_reset_qos(priv);
  3168. priv->qos_data.qos_active = 0;
  3169. priv->qos_data.qos_cap.val = 0;
  3170. priv->rates_mask = IWL_RATES_MASK;
  3171. /* If power management is turned on, default to CAM mode */
  3172. priv->power_mode = IWL_POWER_MODE_CAM;
  3173. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3174. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3175. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3176. eeprom->version);
  3177. ret = -EINVAL;
  3178. goto err;
  3179. }
  3180. ret = iwl_init_channel_map(priv);
  3181. if (ret) {
  3182. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3183. goto err;
  3184. }
  3185. /* Set up txpower settings in driver for all channels */
  3186. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3187. ret = -EIO;
  3188. goto err_free_channel_map;
  3189. }
  3190. ret = iwlcore_init_geos(priv);
  3191. if (ret) {
  3192. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3193. goto err_free_channel_map;
  3194. }
  3195. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3196. return 0;
  3197. err_free_channel_map:
  3198. iwl_free_channel_map(priv);
  3199. err:
  3200. return ret;
  3201. }
  3202. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3203. {
  3204. int ret;
  3205. struct ieee80211_hw *hw = priv->hw;
  3206. hw->rate_control_algorithm = "iwl-3945-rs";
  3207. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3208. /* Tell mac80211 our characteristics */
  3209. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3210. IEEE80211_HW_NOISE_DBM |
  3211. IEEE80211_HW_SPECTRUM_MGMT;
  3212. hw->wiphy->interface_modes =
  3213. BIT(NL80211_IFTYPE_STATION) |
  3214. BIT(NL80211_IFTYPE_ADHOC);
  3215. hw->wiphy->custom_regulatory = true;
  3216. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3217. /* we create the 802.11 header and a zero-length SSID element */
  3218. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3219. /* Default value; 4 EDCA QOS priorities */
  3220. hw->queues = 4;
  3221. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3222. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3223. &priv->bands[IEEE80211_BAND_2GHZ];
  3224. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3225. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3226. &priv->bands[IEEE80211_BAND_5GHZ];
  3227. ret = ieee80211_register_hw(priv->hw);
  3228. if (ret) {
  3229. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3230. return ret;
  3231. }
  3232. priv->mac80211_registered = 1;
  3233. return 0;
  3234. }
  3235. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3236. {
  3237. int err = 0;
  3238. struct iwl_priv *priv;
  3239. struct ieee80211_hw *hw;
  3240. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3241. struct iwl3945_eeprom *eeprom;
  3242. unsigned long flags;
  3243. /***********************
  3244. * 1. Allocating HW data
  3245. * ********************/
  3246. /* mac80211 allocates memory for this device instance, including
  3247. * space for this driver's private structure */
  3248. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3249. if (hw == NULL) {
  3250. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3251. err = -ENOMEM;
  3252. goto out;
  3253. }
  3254. priv = hw->priv;
  3255. SET_IEEE80211_DEV(hw, &pdev->dev);
  3256. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  3257. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  3258. IWL_ERR(priv,
  3259. "invalid queues_num, should be between %d and %d\n",
  3260. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  3261. err = -EINVAL;
  3262. goto out_ieee80211_free_hw;
  3263. }
  3264. /*
  3265. * Disabling hardware scan means that mac80211 will perform scans
  3266. * "the hard way", rather than using device's scan.
  3267. */
  3268. if (iwl3945_mod_params.disable_hw_scan) {
  3269. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3270. iwl3945_hw_ops.hw_scan = NULL;
  3271. }
  3272. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3273. priv->cfg = cfg;
  3274. priv->pci_dev = pdev;
  3275. priv->inta_mask = CSR_INI_SET_MASK;
  3276. #ifdef CONFIG_IWLWIFI_DEBUG
  3277. priv->debug_level = iwl3945_mod_params.debug;
  3278. atomic_set(&priv->restrict_refcnt, 0);
  3279. #endif
  3280. /***************************
  3281. * 2. Initializing PCI bus
  3282. * *************************/
  3283. if (pci_enable_device(pdev)) {
  3284. err = -ENODEV;
  3285. goto out_ieee80211_free_hw;
  3286. }
  3287. pci_set_master(pdev);
  3288. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3289. if (!err)
  3290. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3291. if (err) {
  3292. IWL_WARN(priv, "No suitable DMA available.\n");
  3293. goto out_pci_disable_device;
  3294. }
  3295. pci_set_drvdata(pdev, priv);
  3296. err = pci_request_regions(pdev, DRV_NAME);
  3297. if (err)
  3298. goto out_pci_disable_device;
  3299. /***********************
  3300. * 3. Read REV Register
  3301. * ********************/
  3302. priv->hw_base = pci_iomap(pdev, 0, 0);
  3303. if (!priv->hw_base) {
  3304. err = -ENODEV;
  3305. goto out_pci_release_regions;
  3306. }
  3307. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3308. (unsigned long long) pci_resource_len(pdev, 0));
  3309. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3310. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3311. * PCI Tx retries from interfering with C3 CPU state */
  3312. pci_write_config_byte(pdev, 0x41, 0x00);
  3313. /* this spin lock will be used in apm_ops.init and EEPROM access
  3314. * we should init now
  3315. */
  3316. spin_lock_init(&priv->reg_lock);
  3317. /* amp init */
  3318. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3319. if (err < 0) {
  3320. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3321. goto out_iounmap;
  3322. }
  3323. /***********************
  3324. * 4. Read EEPROM
  3325. * ********************/
  3326. /* Read the EEPROM */
  3327. err = iwl_eeprom_init(priv);
  3328. if (err) {
  3329. IWL_ERR(priv, "Unable to init EEPROM\n");
  3330. goto out_iounmap;
  3331. }
  3332. /* MAC Address location in EEPROM same for 3945/4965 */
  3333. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3334. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3335. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3336. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3337. /***********************
  3338. * 5. Setup HW Constants
  3339. * ********************/
  3340. /* Device-specific setup */
  3341. if (iwl3945_hw_set_hw_params(priv)) {
  3342. IWL_ERR(priv, "failed to set hw settings\n");
  3343. goto out_eeprom_free;
  3344. }
  3345. /***********************
  3346. * 6. Setup priv
  3347. * ********************/
  3348. err = iwl3945_init_drv(priv);
  3349. if (err) {
  3350. IWL_ERR(priv, "initializing driver failed\n");
  3351. goto out_unset_hw_params;
  3352. }
  3353. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3354. priv->cfg->name);
  3355. /***********************
  3356. * 7. Setup Services
  3357. * ********************/
  3358. spin_lock_irqsave(&priv->lock, flags);
  3359. iwl_disable_interrupts(priv);
  3360. spin_unlock_irqrestore(&priv->lock, flags);
  3361. pci_enable_msi(priv->pci_dev);
  3362. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3363. IRQF_SHARED, DRV_NAME, priv);
  3364. if (err) {
  3365. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3366. goto out_disable_msi;
  3367. }
  3368. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3369. if (err) {
  3370. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3371. goto out_release_irq;
  3372. }
  3373. iwl_set_rxon_channel(priv,
  3374. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3375. iwl3945_setup_deferred_work(priv);
  3376. iwl3945_setup_rx_handlers(priv);
  3377. /*********************************
  3378. * 8. Setup and Register mac80211
  3379. * *******************************/
  3380. iwl_enable_interrupts(priv);
  3381. err = iwl3945_setup_mac(priv);
  3382. if (err)
  3383. goto out_remove_sysfs;
  3384. err = iwl_dbgfs_register(priv, DRV_NAME);
  3385. if (err)
  3386. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3387. /* Start monitoring the killswitch */
  3388. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3389. 2 * HZ);
  3390. return 0;
  3391. out_remove_sysfs:
  3392. destroy_workqueue(priv->workqueue);
  3393. priv->workqueue = NULL;
  3394. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3395. out_release_irq:
  3396. free_irq(priv->pci_dev->irq, priv);
  3397. out_disable_msi:
  3398. pci_disable_msi(priv->pci_dev);
  3399. iwlcore_free_geos(priv);
  3400. iwl_free_channel_map(priv);
  3401. out_unset_hw_params:
  3402. iwl3945_unset_hw_params(priv);
  3403. out_eeprom_free:
  3404. iwl_eeprom_free(priv);
  3405. out_iounmap:
  3406. pci_iounmap(pdev, priv->hw_base);
  3407. out_pci_release_regions:
  3408. pci_release_regions(pdev);
  3409. out_pci_disable_device:
  3410. pci_set_drvdata(pdev, NULL);
  3411. pci_disable_device(pdev);
  3412. out_ieee80211_free_hw:
  3413. ieee80211_free_hw(priv->hw);
  3414. out:
  3415. return err;
  3416. }
  3417. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3418. {
  3419. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3420. unsigned long flags;
  3421. if (!priv)
  3422. return;
  3423. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3424. iwl_dbgfs_unregister(priv);
  3425. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3426. if (priv->mac80211_registered) {
  3427. ieee80211_unregister_hw(priv->hw);
  3428. priv->mac80211_registered = 0;
  3429. } else {
  3430. iwl3945_down(priv);
  3431. }
  3432. /* make sure we flush any pending irq or
  3433. * tasklet for the driver
  3434. */
  3435. spin_lock_irqsave(&priv->lock, flags);
  3436. iwl_disable_interrupts(priv);
  3437. spin_unlock_irqrestore(&priv->lock, flags);
  3438. iwl_synchronize_irq(priv);
  3439. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3440. cancel_delayed_work_sync(&priv->rfkill_poll);
  3441. iwl3945_dealloc_ucode_pci(priv);
  3442. if (priv->rxq.bd)
  3443. iwl3945_rx_queue_free(priv, &priv->rxq);
  3444. iwl3945_hw_txq_ctx_free(priv);
  3445. iwl3945_unset_hw_params(priv);
  3446. iwl_clear_stations_table(priv);
  3447. /*netif_stop_queue(dev); */
  3448. flush_workqueue(priv->workqueue);
  3449. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3450. * priv->workqueue... so we can't take down the workqueue
  3451. * until now... */
  3452. destroy_workqueue(priv->workqueue);
  3453. priv->workqueue = NULL;
  3454. free_irq(pdev->irq, priv);
  3455. pci_disable_msi(pdev);
  3456. pci_iounmap(pdev, priv->hw_base);
  3457. pci_release_regions(pdev);
  3458. pci_disable_device(pdev);
  3459. pci_set_drvdata(pdev, NULL);
  3460. iwl_free_channel_map(priv);
  3461. iwlcore_free_geos(priv);
  3462. kfree(priv->scan);
  3463. if (priv->ibss_beacon)
  3464. dev_kfree_skb(priv->ibss_beacon);
  3465. ieee80211_free_hw(priv->hw);
  3466. }
  3467. /*****************************************************************************
  3468. *
  3469. * driver and module entry point
  3470. *
  3471. *****************************************************************************/
  3472. static struct pci_driver iwl3945_driver = {
  3473. .name = DRV_NAME,
  3474. .id_table = iwl3945_hw_card_ids,
  3475. .probe = iwl3945_pci_probe,
  3476. .remove = __devexit_p(iwl3945_pci_remove),
  3477. #ifdef CONFIG_PM
  3478. .suspend = iwl_pci_suspend,
  3479. .resume = iwl_pci_resume,
  3480. #endif
  3481. };
  3482. static int __init iwl3945_init(void)
  3483. {
  3484. int ret;
  3485. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3486. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3487. ret = iwl3945_rate_control_register();
  3488. if (ret) {
  3489. printk(KERN_ERR DRV_NAME
  3490. "Unable to register rate control algorithm: %d\n", ret);
  3491. return ret;
  3492. }
  3493. ret = pci_register_driver(&iwl3945_driver);
  3494. if (ret) {
  3495. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3496. goto error_register;
  3497. }
  3498. return ret;
  3499. error_register:
  3500. iwl3945_rate_control_unregister();
  3501. return ret;
  3502. }
  3503. static void __exit iwl3945_exit(void)
  3504. {
  3505. pci_unregister_driver(&iwl3945_driver);
  3506. iwl3945_rate_control_unregister();
  3507. }
  3508. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3509. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3510. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3511. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3512. MODULE_PARM_DESC(swcrypto,
  3513. "using software crypto (default 1 [software])\n");
  3514. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  3515. MODULE_PARM_DESC(debug, "debug output mask");
  3516. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3517. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3518. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  3519. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3520. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3521. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3522. module_exit(iwl3945_exit);
  3523. module_init(iwl3945_init);