realview_pb11mp.c 11 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_pb11mp.c
  3. *
  4. * Copyright (C) 2008 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/device.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/amba/pl022.h>
  28. #include <linux/io.h>
  29. #include <linux/platform_data/clk-realview.h>
  30. #include <mach/hardware.h>
  31. #include <asm/irq.h>
  32. #include <asm/leds.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/pmu.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/hardware/gic.h>
  37. #include <asm/hardware/cache-l2x0.h>
  38. #include <asm/smp_twd.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/flash.h>
  41. #include <asm/mach/map.h>
  42. #include <asm/mach/time.h>
  43. #include <mach/board-pb11mp.h>
  44. #include <mach/irqs.h>
  45. #include "core.h"
  46. static struct map_desc realview_pb11mp_io_desc[] __initdata = {
  47. {
  48. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  49. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  50. .length = SZ_4K,
  51. .type = MT_DEVICE,
  52. }, {
  53. .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
  54. .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
  55. .length = SZ_4K,
  56. .type = MT_DEVICE,
  57. }, {
  58. .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
  59. .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
  60. .length = SZ_4K,
  61. .type = MT_DEVICE,
  62. }, { /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */
  63. .virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE),
  64. .pfn = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE),
  65. .length = REALVIEW_TC11MP_PRIV_MEM_SIZE,
  66. .type = MT_DEVICE,
  67. }, {
  68. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  69. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  70. .length = SZ_4K,
  71. .type = MT_DEVICE,
  72. }, {
  73. .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
  74. .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
  75. .length = SZ_4K,
  76. .type = MT_DEVICE,
  77. }, {
  78. .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
  79. .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
  80. .length = SZ_4K,
  81. .type = MT_DEVICE,
  82. }, {
  83. .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
  84. .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
  85. .length = SZ_8K,
  86. .type = MT_DEVICE,
  87. },
  88. #ifdef CONFIG_DEBUG_LL
  89. {
  90. .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
  91. .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
  92. .length = SZ_4K,
  93. .type = MT_DEVICE,
  94. },
  95. #endif
  96. };
  97. static void __init realview_pb11mp_map_io(void)
  98. {
  99. iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
  100. }
  101. static struct pl061_platform_data gpio0_plat_data = {
  102. .gpio_base = 0,
  103. };
  104. static struct pl061_platform_data gpio1_plat_data = {
  105. .gpio_base = 8,
  106. };
  107. static struct pl061_platform_data gpio2_plat_data = {
  108. .gpio_base = 16,
  109. };
  110. static struct pl022_ssp_controller ssp0_plat_data = {
  111. .bus_id = 0,
  112. .enable_dma = 0,
  113. .num_chipselect = 1,
  114. };
  115. /*
  116. * RealView PB11MPCore AMBA devices
  117. */
  118. #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
  119. #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
  120. #define AACI_IRQ { IRQ_TC11MP_AACI }
  121. #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
  122. #define KMI0_IRQ { IRQ_TC11MP_KMI0 }
  123. #define KMI1_IRQ { IRQ_TC11MP_KMI1 }
  124. #define PB11MP_SMC_IRQ { }
  125. #define MPMC_IRQ { }
  126. #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
  127. #define DMAC_IRQ { IRQ_PB11MP_DMAC }
  128. #define SCTL_IRQ { }
  129. #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
  130. #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
  131. #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
  132. #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
  133. #define SCI_IRQ { IRQ_PB11MP_SCI }
  134. #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
  135. #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
  136. #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
  137. #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
  138. #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
  139. /* FPGA Primecells */
  140. APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  141. APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  142. APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  143. APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  144. APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
  145. /* DevChip Primecells */
  146. AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
  147. AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  148. APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
  149. APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
  150. APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  151. APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  152. APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
  153. APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
  154. APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
  155. APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
  156. APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
  157. APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
  158. /* Primecells on the NEC ISSP chip */
  159. AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
  160. AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
  161. static struct amba_device *amba_devs[] __initdata = {
  162. &dmac_device,
  163. &uart0_device,
  164. &uart1_device,
  165. &uart2_device,
  166. &uart3_device,
  167. &smc_device,
  168. &clcd_device,
  169. &sctl_device,
  170. &wdog_device,
  171. &gpio0_device,
  172. &gpio1_device,
  173. &gpio2_device,
  174. &rtc_device,
  175. &sci0_device,
  176. &ssp0_device,
  177. &aaci_device,
  178. &mmc0_device,
  179. &kmi0_device,
  180. &kmi1_device,
  181. };
  182. /*
  183. * RealView PB11MPCore platform devices
  184. */
  185. static struct resource realview_pb11mp_flash_resource[] = {
  186. [0] = {
  187. .start = REALVIEW_PB11MP_FLASH0_BASE,
  188. .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
  189. .flags = IORESOURCE_MEM,
  190. },
  191. [1] = {
  192. .start = REALVIEW_PB11MP_FLASH1_BASE,
  193. .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
  194. .flags = IORESOURCE_MEM,
  195. },
  196. };
  197. static struct resource realview_pb11mp_smsc911x_resources[] = {
  198. [0] = {
  199. .start = REALVIEW_PB11MP_ETH_BASE,
  200. .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
  201. .flags = IORESOURCE_MEM,
  202. },
  203. [1] = {
  204. .start = IRQ_TC11MP_ETH,
  205. .end = IRQ_TC11MP_ETH,
  206. .flags = IORESOURCE_IRQ,
  207. },
  208. };
  209. static struct resource realview_pb11mp_isp1761_resources[] = {
  210. [0] = {
  211. .start = REALVIEW_PB11MP_USB_BASE,
  212. .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
  213. .flags = IORESOURCE_MEM,
  214. },
  215. [1] = {
  216. .start = IRQ_TC11MP_USB,
  217. .end = IRQ_TC11MP_USB,
  218. .flags = IORESOURCE_IRQ,
  219. },
  220. };
  221. static struct resource pmu_resources[] = {
  222. [0] = {
  223. .start = IRQ_TC11MP_PMU_CPU0,
  224. .end = IRQ_TC11MP_PMU_CPU0,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. [1] = {
  228. .start = IRQ_TC11MP_PMU_CPU1,
  229. .end = IRQ_TC11MP_PMU_CPU1,
  230. .flags = IORESOURCE_IRQ,
  231. },
  232. [2] = {
  233. .start = IRQ_TC11MP_PMU_CPU2,
  234. .end = IRQ_TC11MP_PMU_CPU2,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. [3] = {
  238. .start = IRQ_TC11MP_PMU_CPU3,
  239. .end = IRQ_TC11MP_PMU_CPU3,
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. };
  243. static struct platform_device pmu_device = {
  244. .name = "arm-pmu",
  245. .id = ARM_PMU_DEVICE_CPU,
  246. .num_resources = ARRAY_SIZE(pmu_resources),
  247. .resource = pmu_resources,
  248. };
  249. static void __init gic_init_irq(void)
  250. {
  251. unsigned int pldctrl;
  252. /* new irq mode with no DCC */
  253. writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
  254. pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
  255. pldctrl |= 2 << 22;
  256. writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
  257. writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
  258. /* ARM11MPCore test chip GIC, primary */
  259. gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
  260. __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
  261. /* board GIC, secondary */
  262. gic_init(1, IRQ_PB11MP_GIC_START,
  263. __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
  264. __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
  265. gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
  266. }
  267. #ifdef CONFIG_HAVE_ARM_TWD
  268. static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
  269. REALVIEW_TC11MP_TWD_BASE,
  270. IRQ_LOCALTIMER);
  271. static void __init realview_pb11mp_twd_init(void)
  272. {
  273. int err = twd_local_timer_register(&twd_local_timer);
  274. if (err)
  275. pr_err("twd_local_timer_register failed %d\n", err);
  276. }
  277. #else
  278. #define realview_pb11mp_twd_init() do {} while(0)
  279. #endif
  280. static void __init realview_pb11mp_timer_init(void)
  281. {
  282. timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
  283. timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
  284. timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
  285. timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
  286. realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
  287. realview_timer_init(IRQ_TC11MP_TIMER0_1);
  288. realview_pb11mp_twd_init();
  289. }
  290. static struct sys_timer realview_pb11mp_timer = {
  291. .init = realview_pb11mp_timer_init,
  292. };
  293. static void realview_pb11mp_restart(char mode, const char *cmd)
  294. {
  295. void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
  296. void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
  297. /*
  298. * To reset, we hit the on-board reset register
  299. * in the system FPGA
  300. */
  301. __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
  302. __raw_writel(0x0000, reset_ctrl);
  303. __raw_writel(0x0004, reset_ctrl);
  304. dsb();
  305. }
  306. static void __init realview_pb11mp_init(void)
  307. {
  308. int i;
  309. #ifdef CONFIG_CACHE_L2X0
  310. /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
  311. * Bits: .... ...0 0111 1001 0000 .... .... .... */
  312. l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
  313. #endif
  314. realview_flash_register(realview_pb11mp_flash_resource,
  315. ARRAY_SIZE(realview_pb11mp_flash_resource));
  316. realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
  317. platform_device_register(&realview_i2c_device);
  318. platform_device_register(&realview_cf_device);
  319. realview_usb_register(realview_pb11mp_isp1761_resources);
  320. platform_device_register(&pmu_device);
  321. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  322. struct amba_device *d = amba_devs[i];
  323. amba_device_register(d, &iomem_resource);
  324. }
  325. #ifdef CONFIG_LEDS
  326. leds_event = realview_leds_event;
  327. #endif
  328. }
  329. MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
  330. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  331. .atag_offset = 0x100,
  332. .fixup = realview_fixup,
  333. .map_io = realview_pb11mp_map_io,
  334. .init_early = realview_init_early,
  335. .init_irq = gic_init_irq,
  336. .timer = &realview_pb11mp_timer,
  337. .handle_irq = gic_handle_irq,
  338. .init_machine = realview_pb11mp_init,
  339. #ifdef CONFIG_ZONE_DMA
  340. .dma_zone_size = SZ_256M,
  341. #endif
  342. .restart = realview_pb11mp_restart,
  343. MACHINE_END