dm9000.c 28 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/dm9000.h>
  66. #include <linux/delay.h>
  67. #include <linux/platform_device.h>
  68. #include <asm/delay.h>
  69. #include <asm/irq.h>
  70. #include <asm/io.h>
  71. #include "dm9000.h"
  72. /* Board/System/Debug information/definition ---------------- */
  73. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  74. #define CARDNAME "dm9000"
  75. #define PFX CARDNAME ": "
  76. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  77. #define DM9000_DEBUG 0
  78. #if DM9000_DEBUG > 2
  79. #define PRINTK3(args...) printk(CARDNAME ": " args)
  80. #else
  81. #define PRINTK3(args...) do { } while(0)
  82. #endif
  83. #if DM9000_DEBUG > 1
  84. #define PRINTK2(args...) printk(CARDNAME ": " args)
  85. #else
  86. #define PRINTK2(args...) do { } while(0)
  87. #endif
  88. #if DM9000_DEBUG > 0
  89. #define PRINTK1(args...) printk(CARDNAME ": " args)
  90. #define PRINTK(args...) printk(CARDNAME ": " args)
  91. #else
  92. #define PRINTK1(args...) do { } while(0)
  93. #define PRINTK(args...) printk(KERN_DEBUG args)
  94. #endif
  95. #ifdef CONFIG_BLACKFIN
  96. #define readsb insb
  97. #define readsw insw
  98. #define readsl insl
  99. #define writesb outsb
  100. #define writesw outsw
  101. #define writesl outsl
  102. #define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH)
  103. #else
  104. #define DM9000_IRQ_FLAGS IRQF_SHARED
  105. #endif
  106. /*
  107. * Transmit timeout, default 5 seconds.
  108. */
  109. static int watchdog = 5000;
  110. module_param(watchdog, int, 0400);
  111. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  112. /* Structure/enum declaration ------------------------------- */
  113. typedef struct board_info {
  114. void __iomem *io_addr; /* Register I/O base address */
  115. void __iomem *io_data; /* Data I/O address */
  116. u16 irq; /* IRQ */
  117. u16 tx_pkt_cnt;
  118. u16 queue_pkt_len;
  119. u16 queue_start_addr;
  120. u16 dbug_cnt;
  121. u8 io_mode; /* 0:word, 2:byte */
  122. u8 phy_addr;
  123. void (*inblk)(void __iomem *port, void *data, int length);
  124. void (*outblk)(void __iomem *port, void *data, int length);
  125. void (*dumpblk)(void __iomem *port, int length);
  126. struct resource *addr_res; /* resources found */
  127. struct resource *data_res;
  128. struct resource *addr_req; /* resources requested */
  129. struct resource *data_req;
  130. struct resource *irq_res;
  131. struct timer_list timer;
  132. struct net_device_stats stats;
  133. unsigned char srom[128];
  134. spinlock_t lock;
  135. struct mii_if_info mii;
  136. u32 msg_enable;
  137. } board_info_t;
  138. /* function declaration ------------------------------------- */
  139. static int dm9000_probe(struct platform_device *);
  140. static int dm9000_open(struct net_device *);
  141. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  142. static int dm9000_stop(struct net_device *);
  143. static void dm9000_timer(unsigned long);
  144. static void dm9000_init_dm9000(struct net_device *);
  145. static struct net_device_stats *dm9000_get_stats(struct net_device *);
  146. static irqreturn_t dm9000_interrupt(int, void *);
  147. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  148. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  149. int value);
  150. static u16 read_srom_word(board_info_t *, int);
  151. static void dm9000_rx(struct net_device *);
  152. static void dm9000_hash_table(struct net_device *);
  153. //#define DM9000_PROGRAM_EEPROM
  154. #ifdef DM9000_PROGRAM_EEPROM
  155. static void program_eeprom(board_info_t * db);
  156. #endif
  157. /* DM9000 network board routine ---------------------------- */
  158. static void
  159. dm9000_reset(board_info_t * db)
  160. {
  161. PRINTK1("dm9000x: resetting\n");
  162. /* RESET device */
  163. writeb(DM9000_NCR, db->io_addr);
  164. udelay(200);
  165. writeb(NCR_RST, db->io_data);
  166. udelay(200);
  167. }
  168. /*
  169. * Read a byte from I/O port
  170. */
  171. static u8
  172. ior(board_info_t * db, int reg)
  173. {
  174. writeb(reg, db->io_addr);
  175. return readb(db->io_data);
  176. }
  177. /*
  178. * Write a byte to I/O port
  179. */
  180. static void
  181. iow(board_info_t * db, int reg, int value)
  182. {
  183. writeb(reg, db->io_addr);
  184. writeb(value, db->io_data);
  185. }
  186. /* routines for sending block to chip */
  187. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  188. {
  189. writesb(reg, data, count);
  190. }
  191. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  192. {
  193. writesw(reg, data, (count+1) >> 1);
  194. }
  195. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  196. {
  197. writesl(reg, data, (count+3) >> 2);
  198. }
  199. /* input block from chip to memory */
  200. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  201. {
  202. readsb(reg, data, count);
  203. }
  204. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  205. {
  206. readsw(reg, data, (count+1) >> 1);
  207. }
  208. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  209. {
  210. readsl(reg, data, (count+3) >> 2);
  211. }
  212. /* dump block from chip to null */
  213. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  214. {
  215. int i;
  216. int tmp;
  217. for (i = 0; i < count; i++)
  218. tmp = readb(reg);
  219. }
  220. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  221. {
  222. int i;
  223. int tmp;
  224. count = (count + 1) >> 1;
  225. for (i = 0; i < count; i++)
  226. tmp = readw(reg);
  227. }
  228. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  229. {
  230. int i;
  231. int tmp;
  232. count = (count + 3) >> 2;
  233. for (i = 0; i < count; i++)
  234. tmp = readl(reg);
  235. }
  236. /* dm9000_set_io
  237. *
  238. * select the specified set of io routines to use with the
  239. * device
  240. */
  241. static void dm9000_set_io(struct board_info *db, int byte_width)
  242. {
  243. /* use the size of the data resource to work out what IO
  244. * routines we want to use
  245. */
  246. switch (byte_width) {
  247. case 1:
  248. db->dumpblk = dm9000_dumpblk_8bit;
  249. db->outblk = dm9000_outblk_8bit;
  250. db->inblk = dm9000_inblk_8bit;
  251. break;
  252. case 2:
  253. db->dumpblk = dm9000_dumpblk_16bit;
  254. db->outblk = dm9000_outblk_16bit;
  255. db->inblk = dm9000_inblk_16bit;
  256. break;
  257. case 3:
  258. printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
  259. db->dumpblk = dm9000_dumpblk_16bit;
  260. db->outblk = dm9000_outblk_16bit;
  261. db->inblk = dm9000_inblk_16bit;
  262. break;
  263. case 4:
  264. default:
  265. db->dumpblk = dm9000_dumpblk_32bit;
  266. db->outblk = dm9000_outblk_32bit;
  267. db->inblk = dm9000_inblk_32bit;
  268. break;
  269. }
  270. }
  271. /* Our watchdog timed out. Called by the networking layer */
  272. static void dm9000_timeout(struct net_device *dev)
  273. {
  274. board_info_t *db = (board_info_t *) dev->priv;
  275. u8 reg_save;
  276. unsigned long flags;
  277. /* Save previous register address */
  278. reg_save = readb(db->io_addr);
  279. spin_lock_irqsave(&db->lock,flags);
  280. netif_stop_queue(dev);
  281. dm9000_reset(db);
  282. dm9000_init_dm9000(dev);
  283. /* We can accept TX packets again */
  284. dev->trans_start = jiffies;
  285. netif_wake_queue(dev);
  286. /* Restore previous register address */
  287. writeb(reg_save, db->io_addr);
  288. spin_unlock_irqrestore(&db->lock,flags);
  289. }
  290. #ifdef CONFIG_NET_POLL_CONTROLLER
  291. /*
  292. *Used by netconsole
  293. */
  294. static void dm9000_poll_controller(struct net_device *dev)
  295. {
  296. disable_irq(dev->irq);
  297. dm9000_interrupt(dev->irq,dev);
  298. enable_irq(dev->irq);
  299. }
  300. #endif
  301. /* dm9000_release_board
  302. *
  303. * release a board, and any mapped resources
  304. */
  305. static void
  306. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  307. {
  308. if (db->data_res == NULL) {
  309. if (db->addr_res != NULL)
  310. release_mem_region((unsigned long)db->io_addr, 4);
  311. return;
  312. }
  313. /* unmap our resources */
  314. iounmap(db->io_addr);
  315. iounmap(db->io_data);
  316. /* release the resources */
  317. if (db->data_req != NULL) {
  318. release_resource(db->data_req);
  319. kfree(db->data_req);
  320. }
  321. if (db->addr_req != NULL) {
  322. release_resource(db->addr_req);
  323. kfree(db->addr_req);
  324. }
  325. }
  326. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  327. /*
  328. * Search DM9000 board, allocate space and register it
  329. */
  330. static int
  331. dm9000_probe(struct platform_device *pdev)
  332. {
  333. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  334. struct board_info *db; /* Point a board information structure */
  335. struct net_device *ndev;
  336. unsigned long base;
  337. int ret = 0;
  338. int iosize;
  339. int i;
  340. u32 id_val;
  341. /* Init network device */
  342. ndev = alloc_etherdev(sizeof (struct board_info));
  343. if (!ndev) {
  344. printk("%s: could not allocate device.\n", CARDNAME);
  345. return -ENOMEM;
  346. }
  347. SET_MODULE_OWNER(ndev);
  348. SET_NETDEV_DEV(ndev, &pdev->dev);
  349. PRINTK2("dm9000_probe()");
  350. /* setup board info structure */
  351. db = (struct board_info *) ndev->priv;
  352. memset(db, 0, sizeof (*db));
  353. spin_lock_init(&db->lock);
  354. if (pdev->num_resources < 2) {
  355. ret = -ENODEV;
  356. goto out;
  357. } else if (pdev->num_resources == 2) {
  358. base = pdev->resource[0].start;
  359. if (!request_mem_region(base, 4, ndev->name)) {
  360. ret = -EBUSY;
  361. goto out;
  362. }
  363. ndev->base_addr = base;
  364. ndev->irq = pdev->resource[1].start;
  365. db->io_addr = (void __iomem *)base;
  366. db->io_data = (void __iomem *)(base + 4);
  367. /* ensure at least we have a default set of IO routines */
  368. dm9000_set_io(db, 2);
  369. } else {
  370. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  371. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  372. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  373. if (db->addr_res == NULL || db->data_res == NULL ||
  374. db->irq_res == NULL) {
  375. printk(KERN_ERR PFX "insufficient resources\n");
  376. ret = -ENOENT;
  377. goto out;
  378. }
  379. i = res_size(db->addr_res);
  380. db->addr_req = request_mem_region(db->addr_res->start, i,
  381. pdev->name);
  382. if (db->addr_req == NULL) {
  383. printk(KERN_ERR PFX "cannot claim address reg area\n");
  384. ret = -EIO;
  385. goto out;
  386. }
  387. db->io_addr = ioremap(db->addr_res->start, i);
  388. if (db->io_addr == NULL) {
  389. printk(KERN_ERR "failed to ioremap address reg\n");
  390. ret = -EINVAL;
  391. goto out;
  392. }
  393. iosize = res_size(db->data_res);
  394. db->data_req = request_mem_region(db->data_res->start, iosize,
  395. pdev->name);
  396. if (db->data_req == NULL) {
  397. printk(KERN_ERR PFX "cannot claim data reg area\n");
  398. ret = -EIO;
  399. goto out;
  400. }
  401. db->io_data = ioremap(db->data_res->start, iosize);
  402. if (db->io_data == NULL) {
  403. printk(KERN_ERR "failed to ioremap data reg\n");
  404. ret = -EINVAL;
  405. goto out;
  406. }
  407. /* fill in parameters for net-dev structure */
  408. ndev->base_addr = (unsigned long)db->io_addr;
  409. ndev->irq = db->irq_res->start;
  410. /* ensure at least we have a default set of IO routines */
  411. dm9000_set_io(db, iosize);
  412. }
  413. /* check to see if anything is being over-ridden */
  414. if (pdata != NULL) {
  415. /* check to see if the driver wants to over-ride the
  416. * default IO width */
  417. if (pdata->flags & DM9000_PLATF_8BITONLY)
  418. dm9000_set_io(db, 1);
  419. if (pdata->flags & DM9000_PLATF_16BITONLY)
  420. dm9000_set_io(db, 2);
  421. if (pdata->flags & DM9000_PLATF_32BITONLY)
  422. dm9000_set_io(db, 4);
  423. /* check to see if there are any IO routine
  424. * over-rides */
  425. if (pdata->inblk != NULL)
  426. db->inblk = pdata->inblk;
  427. if (pdata->outblk != NULL)
  428. db->outblk = pdata->outblk;
  429. if (pdata->dumpblk != NULL)
  430. db->dumpblk = pdata->dumpblk;
  431. }
  432. dm9000_reset(db);
  433. /* try two times, DM9000 sometimes gets the first read wrong */
  434. for (i = 0; i < 2; i++) {
  435. id_val = ior(db, DM9000_VIDL);
  436. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  437. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  438. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  439. if (id_val == DM9000_ID)
  440. break;
  441. printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
  442. }
  443. if (id_val != DM9000_ID) {
  444. printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
  445. goto release;
  446. }
  447. /* from this point we assume that we have found a DM9000 */
  448. /* driver system function */
  449. ether_setup(ndev);
  450. ndev->open = &dm9000_open;
  451. ndev->hard_start_xmit = &dm9000_start_xmit;
  452. ndev->tx_timeout = &dm9000_timeout;
  453. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  454. ndev->stop = &dm9000_stop;
  455. ndev->get_stats = &dm9000_get_stats;
  456. ndev->set_multicast_list = &dm9000_hash_table;
  457. #ifdef CONFIG_NET_POLL_CONTROLLER
  458. ndev->poll_controller = &dm9000_poll_controller;
  459. #endif
  460. #ifdef DM9000_PROGRAM_EEPROM
  461. program_eeprom(db);
  462. #endif
  463. db->msg_enable = NETIF_MSG_LINK;
  464. db->mii.phy_id_mask = 0x1f;
  465. db->mii.reg_num_mask = 0x1f;
  466. db->mii.force_media = 0;
  467. db->mii.full_duplex = 0;
  468. db->mii.dev = ndev;
  469. db->mii.mdio_read = dm9000_phy_read;
  470. db->mii.mdio_write = dm9000_phy_write;
  471. /* Read SROM content */
  472. for (i = 0; i < 64; i++)
  473. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  474. /* Set Node Address */
  475. for (i = 0; i < 6; i++)
  476. ndev->dev_addr[i] = db->srom[i];
  477. if (!is_valid_ether_addr(ndev->dev_addr)) {
  478. /* try reading from mac */
  479. for (i = 0; i < 6; i++)
  480. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  481. }
  482. if (!is_valid_ether_addr(ndev->dev_addr))
  483. printk("%s: Invalid ethernet MAC address. Please "
  484. "set using ifconfig\n", ndev->name);
  485. platform_set_drvdata(pdev, ndev);
  486. ret = register_netdev(ndev);
  487. if (ret == 0) {
  488. printk("%s: dm9000 at %p,%p IRQ %d MAC: ",
  489. ndev->name, db->io_addr, db->io_data, ndev->irq);
  490. for (i = 0; i < 5; i++)
  491. printk("%02x:", ndev->dev_addr[i]);
  492. printk("%02x\n", ndev->dev_addr[5]);
  493. }
  494. return 0;
  495. release:
  496. out:
  497. printk("%s: not found (%d).\n", CARDNAME, ret);
  498. dm9000_release_board(pdev, db);
  499. free_netdev(ndev);
  500. return ret;
  501. }
  502. /*
  503. * Open the interface.
  504. * The interface is opened whenever "ifconfig" actives it.
  505. */
  506. static int
  507. dm9000_open(struct net_device *dev)
  508. {
  509. board_info_t *db = (board_info_t *) dev->priv;
  510. PRINTK2("entering dm9000_open\n");
  511. if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev))
  512. return -EAGAIN;
  513. /* Initialize DM9000 board */
  514. dm9000_reset(db);
  515. dm9000_init_dm9000(dev);
  516. /* Init driver variable */
  517. db->dbug_cnt = 0;
  518. /* set and active a timer process */
  519. init_timer(&db->timer);
  520. db->timer.expires = DM9000_TIMER_WUT;
  521. db->timer.data = (unsigned long) dev;
  522. db->timer.function = &dm9000_timer;
  523. add_timer(&db->timer);
  524. mii_check_media(&db->mii, netif_msg_link(db), 1);
  525. netif_start_queue(dev);
  526. return 0;
  527. }
  528. /*
  529. * Initilize dm9000 board
  530. */
  531. static void
  532. dm9000_init_dm9000(struct net_device *dev)
  533. {
  534. board_info_t *db = (board_info_t *) dev->priv;
  535. PRINTK1("entering %s\n",__FUNCTION__);
  536. /* I/O mode */
  537. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  538. /* GPIO0 on pre-activate PHY */
  539. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  540. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  541. iow(db, DM9000_GPR, 0); /* Enable PHY */
  542. /* Program operating register */
  543. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  544. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  545. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  546. iow(db, DM9000_SMCR, 0); /* Special Mode */
  547. /* clear TX status */
  548. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  549. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  550. /* Set address filter table */
  551. dm9000_hash_table(dev);
  552. /* Activate DM9000 */
  553. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  554. /* Enable TX/RX interrupt mask */
  555. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  556. /* Init Driver variable */
  557. db->tx_pkt_cnt = 0;
  558. db->queue_pkt_len = 0;
  559. dev->trans_start = 0;
  560. }
  561. /*
  562. * Hardware start transmission.
  563. * Send a packet to media from the upper layer.
  564. */
  565. static int
  566. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  567. {
  568. unsigned long flags;
  569. board_info_t *db = (board_info_t *) dev->priv;
  570. PRINTK3("dm9000_start_xmit\n");
  571. if (db->tx_pkt_cnt > 1)
  572. return 1;
  573. spin_lock_irqsave(&db->lock, flags);
  574. /* Move data to DM9000 TX RAM */
  575. writeb(DM9000_MWCMD, db->io_addr);
  576. (db->outblk)(db->io_data, skb->data, skb->len);
  577. db->stats.tx_bytes += skb->len;
  578. db->tx_pkt_cnt++;
  579. /* TX control: First packet immediately send, second packet queue */
  580. if (db->tx_pkt_cnt == 1) {
  581. /* Set TX length to DM9000 */
  582. iow(db, DM9000_TXPLL, skb->len & 0xff);
  583. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  584. /* Issue TX polling command */
  585. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  586. dev->trans_start = jiffies; /* save the time stamp */
  587. } else {
  588. /* Second packet */
  589. db->queue_pkt_len = skb->len;
  590. netif_stop_queue(dev);
  591. }
  592. spin_unlock_irqrestore(&db->lock, flags);
  593. /* free this SKB */
  594. dev_kfree_skb(skb);
  595. return 0;
  596. }
  597. static void
  598. dm9000_shutdown(struct net_device *dev)
  599. {
  600. board_info_t *db = (board_info_t *) dev->priv;
  601. /* RESET device */
  602. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  603. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  604. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  605. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  606. }
  607. /*
  608. * Stop the interface.
  609. * The interface is stopped when it is brought.
  610. */
  611. static int
  612. dm9000_stop(struct net_device *ndev)
  613. {
  614. board_info_t *db = (board_info_t *) ndev->priv;
  615. PRINTK1("entering %s\n",__FUNCTION__);
  616. /* deleted timer */
  617. del_timer(&db->timer);
  618. netif_stop_queue(ndev);
  619. netif_carrier_off(ndev);
  620. /* free interrupt */
  621. free_irq(ndev->irq, ndev);
  622. dm9000_shutdown(ndev);
  623. return 0;
  624. }
  625. /*
  626. * DM9000 interrupt handler
  627. * receive the packet to upper layer, free the transmitted packet
  628. */
  629. static void
  630. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  631. {
  632. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  633. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  634. /* One packet sent complete */
  635. db->tx_pkt_cnt--;
  636. db->stats.tx_packets++;
  637. /* Queue packet check & send */
  638. if (db->tx_pkt_cnt > 0) {
  639. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  640. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  641. iow(db, DM9000_TCR, TCR_TXREQ);
  642. dev->trans_start = jiffies;
  643. }
  644. netif_wake_queue(dev);
  645. }
  646. }
  647. static irqreturn_t
  648. dm9000_interrupt(int irq, void *dev_id)
  649. {
  650. struct net_device *dev = dev_id;
  651. board_info_t *db;
  652. int int_status;
  653. u8 reg_save;
  654. PRINTK3("entering %s\n",__FUNCTION__);
  655. if (!dev) {
  656. PRINTK1("dm9000_interrupt() without DEVICE arg\n");
  657. return IRQ_HANDLED;
  658. }
  659. /* A real interrupt coming */
  660. db = (board_info_t *) dev->priv;
  661. spin_lock(&db->lock);
  662. /* Save previous register address */
  663. reg_save = readb(db->io_addr);
  664. /* Disable all interrupts */
  665. iow(db, DM9000_IMR, IMR_PAR);
  666. /* Got DM9000 interrupt status */
  667. int_status = ior(db, DM9000_ISR); /* Got ISR */
  668. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  669. /* Received the coming packet */
  670. if (int_status & ISR_PRS)
  671. dm9000_rx(dev);
  672. /* Trnasmit Interrupt check */
  673. if (int_status & ISR_PTS)
  674. dm9000_tx_done(dev, db);
  675. /* Re-enable interrupt mask */
  676. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  677. /* Restore previous register address */
  678. writeb(reg_save, db->io_addr);
  679. spin_unlock(&db->lock);
  680. return IRQ_HANDLED;
  681. }
  682. /*
  683. * Get statistics from driver.
  684. */
  685. static struct net_device_stats *
  686. dm9000_get_stats(struct net_device *dev)
  687. {
  688. board_info_t *db = (board_info_t *) dev->priv;
  689. return &db->stats;
  690. }
  691. /*
  692. * A periodic timer routine
  693. * Dynamic media sense, allocated Rx buffer...
  694. */
  695. static void
  696. dm9000_timer(unsigned long data)
  697. {
  698. struct net_device *dev = (struct net_device *) data;
  699. board_info_t *db = (board_info_t *) dev->priv;
  700. PRINTK3("dm9000_timer()\n");
  701. mii_check_media(&db->mii, netif_msg_link(db), 0);
  702. /* Set timer again */
  703. db->timer.expires = DM9000_TIMER_WUT;
  704. add_timer(&db->timer);
  705. }
  706. struct dm9000_rxhdr {
  707. u16 RxStatus;
  708. u16 RxLen;
  709. } __attribute__((__packed__));
  710. /*
  711. * Received a packet and pass to upper layer
  712. */
  713. static void
  714. dm9000_rx(struct net_device *dev)
  715. {
  716. board_info_t *db = (board_info_t *) dev->priv;
  717. struct dm9000_rxhdr rxhdr;
  718. struct sk_buff *skb;
  719. u8 rxbyte, *rdptr;
  720. bool GoodPacket;
  721. int RxLen;
  722. /* Check packet ready or not */
  723. do {
  724. ior(db, DM9000_MRCMDX); /* Dummy read */
  725. /* Get most updated data */
  726. rxbyte = readb(db->io_data);
  727. /* Status check: this byte must be 0 or 1 */
  728. if (rxbyte > DM9000_PKT_RDY) {
  729. printk("status check failed: %d\n", rxbyte);
  730. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  731. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  732. return;
  733. }
  734. if (rxbyte != DM9000_PKT_RDY)
  735. return;
  736. /* A packet ready now & Get status/length */
  737. GoodPacket = true;
  738. writeb(DM9000_MRCMD, db->io_addr);
  739. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  740. RxLen = rxhdr.RxLen;
  741. /* Packet Status check */
  742. if (RxLen < 0x40) {
  743. GoodPacket = false;
  744. PRINTK1("Bad Packet received (runt)\n");
  745. }
  746. if (RxLen > DM9000_PKT_MAX) {
  747. PRINTK1("RST: RX Len:%x\n", RxLen);
  748. }
  749. if (rxhdr.RxStatus & 0xbf00) {
  750. GoodPacket = false;
  751. if (rxhdr.RxStatus & 0x100) {
  752. PRINTK1("fifo error\n");
  753. db->stats.rx_fifo_errors++;
  754. }
  755. if (rxhdr.RxStatus & 0x200) {
  756. PRINTK1("crc error\n");
  757. db->stats.rx_crc_errors++;
  758. }
  759. if (rxhdr.RxStatus & 0x8000) {
  760. PRINTK1("length error\n");
  761. db->stats.rx_length_errors++;
  762. }
  763. }
  764. /* Move data from DM9000 */
  765. if (GoodPacket
  766. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  767. skb_reserve(skb, 2);
  768. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  769. /* Read received packet from RX SRAM */
  770. (db->inblk)(db->io_data, rdptr, RxLen);
  771. db->stats.rx_bytes += RxLen;
  772. /* Pass to upper layer */
  773. skb->protocol = eth_type_trans(skb, dev);
  774. netif_rx(skb);
  775. db->stats.rx_packets++;
  776. } else {
  777. /* need to dump the packet's data */
  778. (db->dumpblk)(db->io_data, RxLen);
  779. }
  780. } while (rxbyte == DM9000_PKT_RDY);
  781. }
  782. /*
  783. * Read a word data from SROM
  784. */
  785. static u16
  786. read_srom_word(board_info_t * db, int offset)
  787. {
  788. iow(db, DM9000_EPAR, offset);
  789. iow(db, DM9000_EPCR, EPCR_ERPRR);
  790. mdelay(8); /* according to the datasheet 200us should be enough,
  791. but it doesn't work */
  792. iow(db, DM9000_EPCR, 0x0);
  793. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  794. }
  795. #ifdef DM9000_PROGRAM_EEPROM
  796. /*
  797. * Write a word data to SROM
  798. */
  799. static void
  800. write_srom_word(board_info_t * db, int offset, u16 val)
  801. {
  802. iow(db, DM9000_EPAR, offset);
  803. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  804. iow(db, DM9000_EPDRL, (val & 0xff));
  805. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  806. mdelay(8); /* same shit */
  807. iow(db, DM9000_EPCR, 0);
  808. }
  809. /*
  810. * Only for development:
  811. * Here we write static data to the eeprom in case
  812. * we don't have valid content on a new board
  813. */
  814. static void
  815. program_eeprom(board_info_t * db)
  816. {
  817. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  818. 0x0000, /* Autoload: accept nothing */
  819. 0x0a46, 0x9000, /* Vendor / Product ID */
  820. 0x0000, /* pin control */
  821. 0x0000,
  822. }; /* Wake-up mode control */
  823. int i;
  824. for (i = 0; i < 8; i++)
  825. write_srom_word(db, i, eeprom[i]);
  826. }
  827. #endif
  828. /*
  829. * Calculate the CRC valude of the Rx packet
  830. * flag = 1 : return the reverse CRC (for the received packet CRC)
  831. * 0 : return the normal CRC (for Hash Table index)
  832. */
  833. static unsigned long
  834. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  835. {
  836. u32 crc = ether_crc_le(Len, Data);
  837. if (flag)
  838. return ~crc;
  839. return crc;
  840. }
  841. /*
  842. * Set DM9000 multicast address
  843. */
  844. static void
  845. dm9000_hash_table(struct net_device *dev)
  846. {
  847. board_info_t *db = (board_info_t *) dev->priv;
  848. struct dev_mc_list *mcptr = dev->mc_list;
  849. int mc_cnt = dev->mc_count;
  850. u32 hash_val;
  851. u16 i, oft, hash_table[4];
  852. unsigned long flags;
  853. PRINTK2("dm9000_hash_table()\n");
  854. spin_lock_irqsave(&db->lock,flags);
  855. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  856. iow(db, oft, dev->dev_addr[i]);
  857. /* Clear Hash Table */
  858. for (i = 0; i < 4; i++)
  859. hash_table[i] = 0x0;
  860. /* broadcast address */
  861. hash_table[3] = 0x8000;
  862. /* the multicast address in Hash Table : 64 bits */
  863. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  864. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  865. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  866. }
  867. /* Write the hash table to MAC MD table */
  868. for (i = 0, oft = 0x16; i < 4; i++) {
  869. iow(db, oft++, hash_table[i] & 0xff);
  870. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  871. }
  872. spin_unlock_irqrestore(&db->lock,flags);
  873. }
  874. /*
  875. * Read a word from phyxcer
  876. */
  877. static int
  878. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  879. {
  880. board_info_t *db = (board_info_t *) dev->priv;
  881. unsigned long flags;
  882. unsigned int reg_save;
  883. int ret;
  884. spin_lock_irqsave(&db->lock,flags);
  885. /* Save previous register address */
  886. reg_save = readb(db->io_addr);
  887. /* Fill the phyxcer register into REG_0C */
  888. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  889. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  890. udelay(100); /* Wait read complete */
  891. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  892. /* The read data keeps on REG_0D & REG_0E */
  893. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  894. /* restore the previous address */
  895. writeb(reg_save, db->io_addr);
  896. spin_unlock_irqrestore(&db->lock,flags);
  897. return ret;
  898. }
  899. /*
  900. * Write a word to phyxcer
  901. */
  902. static void
  903. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  904. {
  905. board_info_t *db = (board_info_t *) dev->priv;
  906. unsigned long flags;
  907. unsigned long reg_save;
  908. spin_lock_irqsave(&db->lock,flags);
  909. /* Save previous register address */
  910. reg_save = readb(db->io_addr);
  911. /* Fill the phyxcer register into REG_0C */
  912. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  913. /* Fill the written data into REG_0D & REG_0E */
  914. iow(db, DM9000_EPDRL, (value & 0xff));
  915. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  916. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  917. udelay(500); /* Wait write complete */
  918. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  919. /* restore the previous address */
  920. writeb(reg_save, db->io_addr);
  921. spin_unlock_irqrestore(&db->lock,flags);
  922. }
  923. static int
  924. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  925. {
  926. struct net_device *ndev = platform_get_drvdata(dev);
  927. if (ndev) {
  928. if (netif_running(ndev)) {
  929. netif_device_detach(ndev);
  930. dm9000_shutdown(ndev);
  931. }
  932. }
  933. return 0;
  934. }
  935. static int
  936. dm9000_drv_resume(struct platform_device *dev)
  937. {
  938. struct net_device *ndev = platform_get_drvdata(dev);
  939. board_info_t *db = (board_info_t *) ndev->priv;
  940. if (ndev) {
  941. if (netif_running(ndev)) {
  942. dm9000_reset(db);
  943. dm9000_init_dm9000(ndev);
  944. netif_device_attach(ndev);
  945. }
  946. }
  947. return 0;
  948. }
  949. static int
  950. dm9000_drv_remove(struct platform_device *pdev)
  951. {
  952. struct net_device *ndev = platform_get_drvdata(pdev);
  953. platform_set_drvdata(pdev, NULL);
  954. unregister_netdev(ndev);
  955. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  956. free_netdev(ndev); /* free device structure */
  957. PRINTK1("clean_module() exit\n");
  958. return 0;
  959. }
  960. static struct platform_driver dm9000_driver = {
  961. .driver = {
  962. .name = "dm9000",
  963. .owner = THIS_MODULE,
  964. },
  965. .probe = dm9000_probe,
  966. .remove = dm9000_drv_remove,
  967. .suspend = dm9000_drv_suspend,
  968. .resume = dm9000_drv_resume,
  969. };
  970. static int __init
  971. dm9000_init(void)
  972. {
  973. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  974. return platform_driver_register(&dm9000_driver); /* search board and register */
  975. }
  976. static void __exit
  977. dm9000_cleanup(void)
  978. {
  979. platform_driver_unregister(&dm9000_driver);
  980. }
  981. module_init(dm9000_init);
  982. module_exit(dm9000_cleanup);
  983. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  984. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  985. MODULE_LICENSE("GPL");