board-omap3evm.c 21 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-omap3evm.c
  3. *
  4. * Copyright (C) 2008 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-3430sdp.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/clk.h>
  20. #include <linux/gpio.h>
  21. #include <linux/input.h>
  22. #include <linux/input/matrix_keypad.h>
  23. #include <linux/leds.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/partitions.h>
  27. #include <linux/mtd/nand.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/ads7846.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/usb/otg.h>
  32. #include <linux/usb/nop-usb-xceiv.h>
  33. #include <linux/smsc911x.h>
  34. #include <linux/wl12xx.h>
  35. #include <linux/regulator/fixed.h>
  36. #include <linux/regulator/machine.h>
  37. #include <linux/mmc/host.h>
  38. #include <linux/export.h>
  39. #include <mach/hardware.h>
  40. #include <asm/mach-types.h>
  41. #include <asm/mach/arch.h>
  42. #include <asm/mach/map.h>
  43. #include <plat/board.h>
  44. #include <plat/usb.h>
  45. #include <plat/nand.h>
  46. #include "common.h"
  47. #include <plat/mcspi.h>
  48. #include <video/omapdss.h>
  49. #include <video/omap-panel-tfp410.h>
  50. #include "mux.h"
  51. #include "sdram-micron-mt46h32m32lf-6.h"
  52. #include "hsmmc.h"
  53. #include "common-board-devices.h"
  54. #define OMAP3_EVM_TS_GPIO 175
  55. #define OMAP3_EVM_EHCI_VBUS 22
  56. #define OMAP3_EVM_EHCI_SELECT 61
  57. #define OMAP3EVM_ETHR_START 0x2c000000
  58. #define OMAP3EVM_ETHR_SIZE 1024
  59. #define OMAP3EVM_ETHR_ID_REV 0x50
  60. #define OMAP3EVM_ETHR_GPIO_IRQ 176
  61. #define OMAP3EVM_SMSC911X_CS 5
  62. /*
  63. * Eth Reset signal
  64. * 64 = Generation 1 (<=RevD)
  65. * 7 = Generation 2 (>=RevE)
  66. */
  67. #define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
  68. #define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
  69. static u8 omap3_evm_version;
  70. u8 get_omap3_evm_rev(void)
  71. {
  72. return omap3_evm_version;
  73. }
  74. EXPORT_SYMBOL(get_omap3_evm_rev);
  75. static void __init omap3_evm_get_revision(void)
  76. {
  77. void __iomem *ioaddr;
  78. unsigned int smsc_id;
  79. /* Ethernet PHY ID is stored at ID_REV register */
  80. ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
  81. if (!ioaddr)
  82. return;
  83. smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
  84. iounmap(ioaddr);
  85. switch (smsc_id) {
  86. /*SMSC9115 chipset*/
  87. case 0x01150000:
  88. omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
  89. break;
  90. /*SMSC 9220 chipset*/
  91. case 0x92200000:
  92. default:
  93. omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
  94. }
  95. }
  96. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  97. #include <plat/gpmc-smsc911x.h>
  98. static struct omap_smsc911x_platform_data smsc911x_cfg = {
  99. .cs = OMAP3EVM_SMSC911X_CS,
  100. .gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
  101. .gpio_reset = -EINVAL,
  102. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  103. };
  104. static inline void __init omap3evm_init_smsc911x(void)
  105. {
  106. /* Configure ethernet controller reset gpio */
  107. if (cpu_is_omap3430()) {
  108. if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
  109. smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
  110. else
  111. smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
  112. }
  113. gpmc_smsc911x_init(&smsc911x_cfg);
  114. }
  115. #else
  116. static inline void __init omap3evm_init_smsc911x(void) { return; }
  117. #endif
  118. /*
  119. * OMAP3EVM LCD Panel control signals
  120. */
  121. #define OMAP3EVM_LCD_PANEL_LR 2
  122. #define OMAP3EVM_LCD_PANEL_UD 3
  123. #define OMAP3EVM_LCD_PANEL_INI 152
  124. #define OMAP3EVM_LCD_PANEL_ENVDD 153
  125. #define OMAP3EVM_LCD_PANEL_QVGA 154
  126. #define OMAP3EVM_LCD_PANEL_RESB 155
  127. #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
  128. #define OMAP3EVM_DVI_PANEL_EN_GPIO 199
  129. static struct gpio omap3_evm_dss_gpios[] __initdata = {
  130. { OMAP3EVM_LCD_PANEL_RESB, GPIOF_OUT_INIT_HIGH, "lcd_panel_resb" },
  131. { OMAP3EVM_LCD_PANEL_INI, GPIOF_OUT_INIT_HIGH, "lcd_panel_ini" },
  132. { OMAP3EVM_LCD_PANEL_QVGA, GPIOF_OUT_INIT_LOW, "lcd_panel_qvga" },
  133. { OMAP3EVM_LCD_PANEL_LR, GPIOF_OUT_INIT_HIGH, "lcd_panel_lr" },
  134. { OMAP3EVM_LCD_PANEL_UD, GPIOF_OUT_INIT_HIGH, "lcd_panel_ud" },
  135. { OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW, "lcd_panel_envdd" },
  136. };
  137. static int lcd_enabled;
  138. static int dvi_enabled;
  139. static void __init omap3_evm_display_init(void)
  140. {
  141. int r;
  142. r = gpio_request_array(omap3_evm_dss_gpios,
  143. ARRAY_SIZE(omap3_evm_dss_gpios));
  144. if (r)
  145. printk(KERN_ERR "failed to get lcd_panel_* gpios\n");
  146. }
  147. static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
  148. {
  149. if (dvi_enabled) {
  150. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  151. return -EINVAL;
  152. }
  153. gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
  154. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  155. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
  156. else
  157. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
  158. lcd_enabled = 1;
  159. return 0;
  160. }
  161. static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
  162. {
  163. gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
  164. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  165. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
  166. else
  167. gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
  168. lcd_enabled = 0;
  169. }
  170. static struct omap_dss_device omap3_evm_lcd_device = {
  171. .name = "lcd",
  172. .driver_name = "sharp_ls_panel",
  173. .type = OMAP_DISPLAY_TYPE_DPI,
  174. .phy.dpi.data_lines = 18,
  175. .platform_enable = omap3_evm_enable_lcd,
  176. .platform_disable = omap3_evm_disable_lcd,
  177. };
  178. static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
  179. {
  180. return 0;
  181. }
  182. static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
  183. {
  184. }
  185. static struct omap_dss_device omap3_evm_tv_device = {
  186. .name = "tv",
  187. .driver_name = "venc",
  188. .type = OMAP_DISPLAY_TYPE_VENC,
  189. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  190. .platform_enable = omap3_evm_enable_tv,
  191. .platform_disable = omap3_evm_disable_tv,
  192. };
  193. static struct tfp410_platform_data dvi_panel = {
  194. .power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
  195. };
  196. static struct omap_dss_device omap3_evm_dvi_device = {
  197. .name = "dvi",
  198. .type = OMAP_DISPLAY_TYPE_DPI,
  199. .driver_name = "tfp410",
  200. .data = &dvi_panel,
  201. .phy.dpi.data_lines = 24,
  202. };
  203. static struct omap_dss_device *omap3_evm_dss_devices[] = {
  204. &omap3_evm_lcd_device,
  205. &omap3_evm_tv_device,
  206. &omap3_evm_dvi_device,
  207. };
  208. static struct omap_dss_board_info omap3_evm_dss_data = {
  209. .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
  210. .devices = omap3_evm_dss_devices,
  211. .default_device = &omap3_evm_lcd_device,
  212. };
  213. static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
  214. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
  215. };
  216. static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
  217. REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
  218. };
  219. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  220. static struct regulator_init_data omap3evm_vmmc1 = {
  221. .constraints = {
  222. .min_uV = 1850000,
  223. .max_uV = 3150000,
  224. .valid_modes_mask = REGULATOR_MODE_NORMAL
  225. | REGULATOR_MODE_STANDBY,
  226. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  227. | REGULATOR_CHANGE_MODE
  228. | REGULATOR_CHANGE_STATUS,
  229. },
  230. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
  231. .consumer_supplies = omap3evm_vmmc1_supply,
  232. };
  233. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  234. static struct regulator_init_data omap3evm_vsim = {
  235. .constraints = {
  236. .min_uV = 1800000,
  237. .max_uV = 3000000,
  238. .valid_modes_mask = REGULATOR_MODE_NORMAL
  239. | REGULATOR_MODE_STANDBY,
  240. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  241. | REGULATOR_CHANGE_MODE
  242. | REGULATOR_CHANGE_STATUS,
  243. },
  244. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
  245. .consumer_supplies = omap3evm_vsim_supply,
  246. };
  247. static struct omap2_hsmmc_info mmc[] = {
  248. {
  249. .mmc = 1,
  250. .caps = MMC_CAP_4_BIT_DATA,
  251. .gpio_cd = -EINVAL,
  252. .gpio_wp = 63,
  253. .deferred = true,
  254. },
  255. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  256. {
  257. .name = "wl1271",
  258. .mmc = 2,
  259. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
  260. .gpio_wp = -EINVAL,
  261. .gpio_cd = -EINVAL,
  262. .nonremovable = true,
  263. },
  264. #endif
  265. {} /* Terminator */
  266. };
  267. static struct gpio_led gpio_leds[] = {
  268. {
  269. .name = "omap3evm::ledb",
  270. /* normally not visible (board underside) */
  271. .default_trigger = "default-on",
  272. .gpio = -EINVAL, /* gets replaced */
  273. .active_low = true,
  274. },
  275. };
  276. static struct gpio_led_platform_data gpio_led_info = {
  277. .leds = gpio_leds,
  278. .num_leds = ARRAY_SIZE(gpio_leds),
  279. };
  280. static struct platform_device leds_gpio = {
  281. .name = "leds-gpio",
  282. .id = -1,
  283. .dev = {
  284. .platform_data = &gpio_led_info,
  285. },
  286. };
  287. static int omap3evm_twl_gpio_setup(struct device *dev,
  288. unsigned gpio, unsigned ngpio)
  289. {
  290. int r, lcd_bl_en;
  291. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  292. mmc[0].gpio_cd = gpio + 0;
  293. omap_hsmmc_late_init(mmc);
  294. /*
  295. * Most GPIOs are for USB OTG. Some are mostly sent to
  296. * the P2 connector; notably LEDA for the LCD backlight.
  297. */
  298. /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
  299. lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
  300. GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
  301. r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
  302. if (r)
  303. printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
  304. /* gpio + 7 == DVI Enable */
  305. gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
  306. /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
  307. gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
  308. platform_device_register(&leds_gpio);
  309. /* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
  310. * for starting USB tranceiver
  311. */
  312. #ifdef CONFIG_TWL4030_CORE
  313. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
  314. u8 val;
  315. twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
  316. val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
  317. twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
  318. }
  319. #endif
  320. return 0;
  321. }
  322. static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
  323. .gpio_base = OMAP_MAX_GPIO_LINES,
  324. .irq_base = TWL4030_GPIO_IRQ_BASE,
  325. .irq_end = TWL4030_GPIO_IRQ_END,
  326. .use_leds = true,
  327. .setup = omap3evm_twl_gpio_setup,
  328. };
  329. static uint32_t board_keymap[] = {
  330. KEY(0, 0, KEY_LEFT),
  331. KEY(0, 1, KEY_DOWN),
  332. KEY(0, 2, KEY_ENTER),
  333. KEY(0, 3, KEY_M),
  334. KEY(1, 0, KEY_RIGHT),
  335. KEY(1, 1, KEY_UP),
  336. KEY(1, 2, KEY_I),
  337. KEY(1, 3, KEY_N),
  338. KEY(2, 0, KEY_A),
  339. KEY(2, 1, KEY_E),
  340. KEY(2, 2, KEY_J),
  341. KEY(2, 3, KEY_O),
  342. KEY(3, 0, KEY_B),
  343. KEY(3, 1, KEY_F),
  344. KEY(3, 2, KEY_K),
  345. KEY(3, 3, KEY_P)
  346. };
  347. static struct matrix_keymap_data board_map_data = {
  348. .keymap = board_keymap,
  349. .keymap_size = ARRAY_SIZE(board_keymap),
  350. };
  351. static struct twl4030_keypad_data omap3evm_kp_data = {
  352. .keymap_data = &board_map_data,
  353. .rows = 4,
  354. .cols = 4,
  355. .rep = 1,
  356. };
  357. /* ads7846 on SPI */
  358. static struct regulator_consumer_supply omap3evm_vio_supply[] = {
  359. REGULATOR_SUPPLY("vcc", "spi1.0"),
  360. };
  361. /* VIO for ads7846 */
  362. static struct regulator_init_data omap3evm_vio = {
  363. .constraints = {
  364. .min_uV = 1800000,
  365. .max_uV = 1800000,
  366. .apply_uV = true,
  367. .valid_modes_mask = REGULATOR_MODE_NORMAL
  368. | REGULATOR_MODE_STANDBY,
  369. .valid_ops_mask = REGULATOR_CHANGE_MODE
  370. | REGULATOR_CHANGE_STATUS,
  371. },
  372. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
  373. .consumer_supplies = omap3evm_vio_supply,
  374. };
  375. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  376. #define OMAP3EVM_WLAN_PMENA_GPIO (150)
  377. #define OMAP3EVM_WLAN_IRQ_GPIO (149)
  378. static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
  379. REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
  380. };
  381. /* VMMC2 for driving the WL12xx module */
  382. static struct regulator_init_data omap3evm_vmmc2 = {
  383. .constraints = {
  384. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  385. },
  386. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
  387. .consumer_supplies = omap3evm_vmmc2_supply,
  388. };
  389. static struct fixed_voltage_config omap3evm_vwlan = {
  390. .supply_name = "vwl1271",
  391. .microvolts = 1800000, /* 1.80V */
  392. .gpio = OMAP3EVM_WLAN_PMENA_GPIO,
  393. .startup_delay = 70000, /* 70ms */
  394. .enable_high = 1,
  395. .enabled_at_boot = 0,
  396. .init_data = &omap3evm_vmmc2,
  397. };
  398. static struct platform_device omap3evm_wlan_regulator = {
  399. .name = "reg-fixed-voltage",
  400. .id = 1,
  401. .dev = {
  402. .platform_data = &omap3evm_vwlan,
  403. },
  404. };
  405. struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
  406. .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
  407. };
  408. #endif
  409. /* VAUX2 for USB */
  410. static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
  411. REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
  412. REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
  413. REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
  414. REGULATOR_SUPPLY("vaux2", NULL),
  415. };
  416. static struct regulator_init_data omap3evm_vaux2 = {
  417. .constraints = {
  418. .min_uV = 2800000,
  419. .max_uV = 2800000,
  420. .apply_uV = true,
  421. .valid_modes_mask = REGULATOR_MODE_NORMAL
  422. | REGULATOR_MODE_STANDBY,
  423. .valid_ops_mask = REGULATOR_CHANGE_MODE
  424. | REGULATOR_CHANGE_STATUS,
  425. },
  426. .num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
  427. .consumer_supplies = omap3evm_vaux2_supplies,
  428. };
  429. static struct twl4030_platform_data omap3evm_twldata = {
  430. /* platform_data for children goes here */
  431. .keypad = &omap3evm_kp_data,
  432. .gpio = &omap3evm_gpio_data,
  433. .vio = &omap3evm_vio,
  434. .vmmc1 = &omap3evm_vmmc1,
  435. .vsim = &omap3evm_vsim,
  436. };
  437. static int __init omap3_evm_i2c_init(void)
  438. {
  439. omap3_pmic_get_config(&omap3evm_twldata,
  440. TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
  441. TWL_COMMON_PDATA_AUDIO,
  442. TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
  443. omap3evm_twldata.vdac->constraints.apply_uV = true;
  444. omap3evm_twldata.vpll2->constraints.apply_uV = true;
  445. omap3_pmic_init("twl4030", &omap3evm_twldata);
  446. omap_register_i2c_bus(2, 400, NULL, 0);
  447. omap_register_i2c_bus(3, 400, NULL, 0);
  448. return 0;
  449. }
  450. static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
  451. };
  452. static struct usbhs_omap_board_data usbhs_bdata __initdata = {
  453. .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
  454. .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
  455. .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
  456. .phy_reset = true,
  457. /* PHY reset GPIO will be runtime programmed based on EVM version */
  458. .reset_gpio_port[0] = -EINVAL,
  459. .reset_gpio_port[1] = -EINVAL,
  460. .reset_gpio_port[2] = -EINVAL
  461. };
  462. #ifdef CONFIG_OMAP_MUX
  463. static struct omap_board_mux omap35x_board_mux[] __initdata = {
  464. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
  465. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  466. OMAP_PIN_OFF_WAKEUPENABLE),
  467. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  468. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  469. OMAP_PIN_OFF_WAKEUPENABLE),
  470. OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  471. OMAP_PIN_OFF_NONE),
  472. OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  473. OMAP_PIN_OFF_NONE),
  474. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  475. /* WLAN IRQ - GPIO 149 */
  476. OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  477. /* WLAN POWER ENABLE - GPIO 150 */
  478. OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  479. /* MMC2 SDIO pin muxes for WL12xx */
  480. OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  481. OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  482. OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  483. OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  484. OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  485. OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  486. #endif
  487. { .reg_offset = OMAP_MUX_TERMINATOR },
  488. };
  489. static struct omap_board_mux omap36x_board_mux[] __initdata = {
  490. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
  491. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  492. OMAP_PIN_OFF_WAKEUPENABLE),
  493. OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
  494. OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
  495. OMAP_PIN_OFF_WAKEUPENABLE),
  496. /* AM/DM37x EVM: DSS data bus muxed with sys_boot */
  497. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  498. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  499. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  500. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  501. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  502. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  503. OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  504. OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  505. OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  506. OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  507. OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  508. OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
  509. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  510. /* WLAN IRQ - GPIO 149 */
  511. OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  512. /* WLAN POWER ENABLE - GPIO 150 */
  513. OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  514. /* MMC2 SDIO pin muxes for WL12xx */
  515. OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  516. OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  517. OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  518. OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  519. OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  520. OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
  521. #endif
  522. { .reg_offset = OMAP_MUX_TERMINATOR },
  523. };
  524. #else
  525. #define omap35x_board_mux NULL
  526. #define omap36x_board_mux NULL
  527. #endif
  528. static struct omap_musb_board_data musb_board_data = {
  529. .interface_type = MUSB_INTERFACE_ULPI,
  530. .mode = MUSB_OTG,
  531. .power = 100,
  532. };
  533. static struct gpio omap3_evm_ehci_gpios[] __initdata = {
  534. { OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
  535. { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
  536. };
  537. static void __init omap3_evm_wl12xx_init(void)
  538. {
  539. #ifdef CONFIG_WL12XX_PLATFORM_DATA
  540. int ret;
  541. /* WL12xx WLAN Init */
  542. omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
  543. ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
  544. if (ret)
  545. pr_err("error setting wl12xx data: %d\n", ret);
  546. ret = platform_device_register(&omap3evm_wlan_regulator);
  547. if (ret)
  548. pr_err("error registering wl12xx device: %d\n", ret);
  549. #endif
  550. }
  551. static struct regulator_consumer_supply dummy_supplies[] = {
  552. REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
  553. REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
  554. };
  555. static struct mtd_partition omap3evm_nand_partitions[] = {
  556. /* All the partition sizes are listed in terms of NAND block size */
  557. {
  558. .name = "X-Loader",
  559. .offset = 0,
  560. .size = 4*(SZ_128K),
  561. .mask_flags = MTD_WRITEABLE
  562. },
  563. {
  564. .name = "U-Boot",
  565. .offset = MTDPART_OFS_APPEND,
  566. .size = 14*(SZ_128K),
  567. .mask_flags = MTD_WRITEABLE
  568. },
  569. {
  570. .name = "U-Boot Env",
  571. .offset = MTDPART_OFS_APPEND,
  572. .size = 2*(SZ_128K)
  573. },
  574. {
  575. .name = "Kernel",
  576. .offset = MTDPART_OFS_APPEND,
  577. .size = 40*(SZ_128K)
  578. },
  579. {
  580. .name = "File system",
  581. .size = MTDPART_SIZ_FULL,
  582. .offset = MTDPART_OFS_APPEND,
  583. },
  584. };
  585. static void __init omap3_evm_init(void)
  586. {
  587. struct omap_board_mux *obm;
  588. omap3_evm_get_revision();
  589. regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  590. obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
  591. omap3_mux_init(obm, OMAP_PACKAGE_CBB);
  592. omap_board_config = omap3_evm_config;
  593. omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
  594. omap_mux_init_gpio(63, OMAP_PIN_INPUT);
  595. omap_hsmmc_init(mmc);
  596. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
  597. omap3evm_twldata.vaux2 = &omap3evm_vaux2;
  598. omap3_evm_i2c_init();
  599. omap_display_init(&omap3_evm_dss_data);
  600. omap_serial_init();
  601. omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
  602. /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
  603. usb_nop_xceiv_register();
  604. if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
  605. /* enable EHCI VBUS using GPIO22 */
  606. omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
  607. /* Select EHCI port on main board */
  608. omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
  609. OMAP_PIN_INPUT_PULLUP);
  610. gpio_request_array(omap3_evm_ehci_gpios,
  611. ARRAY_SIZE(omap3_evm_ehci_gpios));
  612. /* setup EHCI phy reset config */
  613. omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
  614. usbhs_bdata.reset_gpio_port[1] = 21;
  615. /* EVM REV >= E can supply 500mA with EXTVBUS programming */
  616. musb_board_data.power = 500;
  617. musb_board_data.extvbus = 1;
  618. } else {
  619. /* setup EHCI phy reset on MDC */
  620. omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
  621. usbhs_bdata.reset_gpio_port[1] = 135;
  622. }
  623. usb_musb_init(&musb_board_data);
  624. usbhs_init(&usbhs_bdata);
  625. omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions,
  626. ARRAY_SIZE(omap3evm_nand_partitions));
  627. omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
  628. omap3evm_init_smsc911x();
  629. omap3_evm_display_init();
  630. omap3_evm_wl12xx_init();
  631. }
  632. MACHINE_START(OMAP3EVM, "OMAP3 EVM")
  633. /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
  634. .atag_offset = 0x100,
  635. .reserve = omap_reserve,
  636. .map_io = omap3_map_io,
  637. .init_early = omap35xx_init_early,
  638. .init_irq = omap3_init_irq,
  639. .handle_irq = omap3_intc_handle_irq,
  640. .init_machine = omap3_evm_init,
  641. .init_late = omap35xx_init_late,
  642. .timer = &omap3_timer,
  643. .restart = omap_prcm_restart,
  644. MACHINE_END