omap_hwmod.c 64 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - handle IO mapping
  120. * - bus throughput & module latency measurement code
  121. *
  122. * XXX add tests at the beginning of each function to ensure the hwmod is
  123. * in the appropriate state
  124. * XXX error return values should be checked to ensure that they are
  125. * appropriate
  126. */
  127. #undef DEBUG
  128. #include <linux/kernel.h>
  129. #include <linux/errno.h>
  130. #include <linux/io.h>
  131. #include <linux/clk.h>
  132. #include <linux/delay.h>
  133. #include <linux/err.h>
  134. #include <linux/list.h>
  135. #include <linux/mutex.h>
  136. #include <linux/spinlock.h>
  137. #include <plat/common.h>
  138. #include <plat/cpu.h>
  139. #include "clockdomain.h"
  140. #include "powerdomain.h"
  141. #include <plat/clock.h>
  142. #include <plat/omap_hwmod.h>
  143. #include <plat/prcm.h>
  144. #include "cm2xxx_3xxx.h"
  145. #include "cm44xx.h"
  146. #include "prm2xxx_3xxx.h"
  147. #include "prm44xx.h"
  148. #include "mux.h"
  149. /* Maximum microseconds to wait for OMAP module to softreset */
  150. #define MAX_MODULE_SOFTRESET_WAIT 10000
  151. /* Name of the OMAP hwmod for the MPU */
  152. #define MPU_INITIATOR_NAME "mpu"
  153. /* omap_hwmod_list contains all registered struct omap_hwmods */
  154. static LIST_HEAD(omap_hwmod_list);
  155. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  156. static struct omap_hwmod *mpu_oh;
  157. /* Private functions */
  158. /**
  159. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  160. * @oh: struct omap_hwmod *
  161. *
  162. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  163. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  164. * OCP_SYSCONFIG register or 0 upon success.
  165. */
  166. static int _update_sysc_cache(struct omap_hwmod *oh)
  167. {
  168. if (!oh->class->sysc) {
  169. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  170. return -EINVAL;
  171. }
  172. /* XXX ensure module interface clock is up */
  173. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  174. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  175. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  176. return 0;
  177. }
  178. /**
  179. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  180. * @v: OCP_SYSCONFIG value to write
  181. * @oh: struct omap_hwmod *
  182. *
  183. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  184. * one. No return value.
  185. */
  186. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  187. {
  188. if (!oh->class->sysc) {
  189. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  190. return;
  191. }
  192. /* XXX ensure module interface clock is up */
  193. /* Module might have lost context, always update cache and register */
  194. oh->_sysc_cache = v;
  195. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  196. }
  197. /**
  198. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  199. * @oh: struct omap_hwmod *
  200. * @standbymode: MIDLEMODE field bits
  201. * @v: pointer to register contents to modify
  202. *
  203. * Update the master standby mode bits in @v to be @standbymode for
  204. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  205. * upon error or 0 upon success.
  206. */
  207. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  208. u32 *v)
  209. {
  210. u32 mstandby_mask;
  211. u8 mstandby_shift;
  212. if (!oh->class->sysc ||
  213. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  214. return -EINVAL;
  215. if (!oh->class->sysc->sysc_fields) {
  216. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  217. return -EINVAL;
  218. }
  219. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  220. mstandby_mask = (0x3 << mstandby_shift);
  221. *v &= ~mstandby_mask;
  222. *v |= __ffs(standbymode) << mstandby_shift;
  223. return 0;
  224. }
  225. /**
  226. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  227. * @oh: struct omap_hwmod *
  228. * @idlemode: SIDLEMODE field bits
  229. * @v: pointer to register contents to modify
  230. *
  231. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  232. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  233. * or 0 upon success.
  234. */
  235. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  236. {
  237. u32 sidle_mask;
  238. u8 sidle_shift;
  239. if (!oh->class->sysc ||
  240. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  241. return -EINVAL;
  242. if (!oh->class->sysc->sysc_fields) {
  243. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  244. return -EINVAL;
  245. }
  246. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  247. sidle_mask = (0x3 << sidle_shift);
  248. *v &= ~sidle_mask;
  249. *v |= __ffs(idlemode) << sidle_shift;
  250. return 0;
  251. }
  252. /**
  253. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  254. * @oh: struct omap_hwmod *
  255. * @clockact: CLOCKACTIVITY field bits
  256. * @v: pointer to register contents to modify
  257. *
  258. * Update the clockactivity mode bits in @v to be @clockact for the
  259. * @oh hwmod. Used for additional powersaving on some modules. Does
  260. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  261. * success.
  262. */
  263. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  264. {
  265. u32 clkact_mask;
  266. u8 clkact_shift;
  267. if (!oh->class->sysc ||
  268. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  269. return -EINVAL;
  270. if (!oh->class->sysc->sysc_fields) {
  271. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  272. return -EINVAL;
  273. }
  274. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  275. clkact_mask = (0x3 << clkact_shift);
  276. *v &= ~clkact_mask;
  277. *v |= clockact << clkact_shift;
  278. return 0;
  279. }
  280. /**
  281. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  282. * @oh: struct omap_hwmod *
  283. * @v: pointer to register contents to modify
  284. *
  285. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  286. * error or 0 upon success.
  287. */
  288. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  289. {
  290. u32 softrst_mask;
  291. if (!oh->class->sysc ||
  292. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  293. return -EINVAL;
  294. if (!oh->class->sysc->sysc_fields) {
  295. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  296. return -EINVAL;
  297. }
  298. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  299. *v |= softrst_mask;
  300. return 0;
  301. }
  302. /**
  303. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  304. * @oh: struct omap_hwmod *
  305. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  306. * @v: pointer to register contents to modify
  307. *
  308. * Update the module autoidle bit in @v to be @autoidle for the @oh
  309. * hwmod. The autoidle bit controls whether the module can gate
  310. * internal clocks automatically when it isn't doing anything; the
  311. * exact function of this bit varies on a per-module basis. This
  312. * function does not write to the hardware. Returns -EINVAL upon
  313. * error or 0 upon success.
  314. */
  315. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  316. u32 *v)
  317. {
  318. u32 autoidle_mask;
  319. u8 autoidle_shift;
  320. if (!oh->class->sysc ||
  321. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  322. return -EINVAL;
  323. if (!oh->class->sysc->sysc_fields) {
  324. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  325. return -EINVAL;
  326. }
  327. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  328. autoidle_mask = (0x1 << autoidle_shift);
  329. *v &= ~autoidle_mask;
  330. *v |= autoidle << autoidle_shift;
  331. return 0;
  332. }
  333. /**
  334. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  335. * @oh: struct omap_hwmod *
  336. *
  337. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  338. * upon error or 0 upon success.
  339. */
  340. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  341. {
  342. u32 wakeup_mask;
  343. if (!oh->class->sysc ||
  344. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  345. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  346. return -EINVAL;
  347. if (!oh->class->sysc->sysc_fields) {
  348. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  349. return -EINVAL;
  350. }
  351. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  352. *v |= wakeup_mask;
  353. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  354. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  355. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  356. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  357. return 0;
  358. }
  359. /**
  360. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  361. * @oh: struct omap_hwmod *
  362. *
  363. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  364. * upon error or 0 upon success.
  365. */
  366. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  367. {
  368. u32 wakeup_mask;
  369. if (!oh->class->sysc ||
  370. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  371. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
  372. return -EINVAL;
  373. if (!oh->class->sysc->sysc_fields) {
  374. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  375. return -EINVAL;
  376. }
  377. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  378. *v &= ~wakeup_mask;
  379. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  380. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  381. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  382. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  383. return 0;
  384. }
  385. /**
  386. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  387. * @oh: struct omap_hwmod *
  388. *
  389. * Prevent the hardware module @oh from entering idle while the
  390. * hardare module initiator @init_oh is active. Useful when a module
  391. * will be accessed by a particular initiator (e.g., if a module will
  392. * be accessed by the IVA, there should be a sleepdep between the IVA
  393. * initiator and the module). Only applies to modules in smart-idle
  394. * mode. If the clockdomain is marked as not needing autodeps, return
  395. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  396. * passes along clkdm_add_sleepdep() value upon success.
  397. */
  398. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  399. {
  400. if (!oh->_clk)
  401. return -EINVAL;
  402. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  403. return 0;
  404. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  405. }
  406. /**
  407. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  408. * @oh: struct omap_hwmod *
  409. *
  410. * Allow the hardware module @oh to enter idle while the hardare
  411. * module initiator @init_oh is active. Useful when a module will not
  412. * be accessed by a particular initiator (e.g., if a module will not
  413. * be accessed by the IVA, there should be no sleepdep between the IVA
  414. * initiator and the module). Only applies to modules in smart-idle
  415. * mode. If the clockdomain is marked as not needing autodeps, return
  416. * 0 without doing anything. Returns -EINVAL upon error or passes
  417. * along clkdm_del_sleepdep() value upon success.
  418. */
  419. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  420. {
  421. if (!oh->_clk)
  422. return -EINVAL;
  423. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  424. return 0;
  425. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  426. }
  427. /**
  428. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  429. * @oh: struct omap_hwmod *
  430. *
  431. * Called from _init_clocks(). Populates the @oh _clk (main
  432. * functional clock pointer) if a main_clk is present. Returns 0 on
  433. * success or -EINVAL on error.
  434. */
  435. static int _init_main_clk(struct omap_hwmod *oh)
  436. {
  437. int ret = 0;
  438. if (!oh->main_clk)
  439. return 0;
  440. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  441. if (!oh->_clk) {
  442. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  443. oh->name, oh->main_clk);
  444. return -EINVAL;
  445. }
  446. if (!oh->_clk->clkdm)
  447. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  448. oh->main_clk, oh->_clk->name);
  449. return ret;
  450. }
  451. /**
  452. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  453. * @oh: struct omap_hwmod *
  454. *
  455. * Called from _init_clocks(). Populates the @oh OCP slave interface
  456. * clock pointers. Returns 0 on success or -EINVAL on error.
  457. */
  458. static int _init_interface_clks(struct omap_hwmod *oh)
  459. {
  460. struct clk *c;
  461. int i;
  462. int ret = 0;
  463. if (oh->slaves_cnt == 0)
  464. return 0;
  465. for (i = 0; i < oh->slaves_cnt; i++) {
  466. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  467. if (!os->clk)
  468. continue;
  469. c = omap_clk_get_by_name(os->clk);
  470. if (!c) {
  471. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  472. oh->name, os->clk);
  473. ret = -EINVAL;
  474. }
  475. os->_clk = c;
  476. }
  477. return ret;
  478. }
  479. /**
  480. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  481. * @oh: struct omap_hwmod *
  482. *
  483. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  484. * clock pointers. Returns 0 on success or -EINVAL on error.
  485. */
  486. static int _init_opt_clks(struct omap_hwmod *oh)
  487. {
  488. struct omap_hwmod_opt_clk *oc;
  489. struct clk *c;
  490. int i;
  491. int ret = 0;
  492. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  493. c = omap_clk_get_by_name(oc->clk);
  494. if (!c) {
  495. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  496. oh->name, oc->clk);
  497. ret = -EINVAL;
  498. }
  499. oc->_clk = c;
  500. }
  501. return ret;
  502. }
  503. /**
  504. * _enable_clocks - enable hwmod main clock and interface clocks
  505. * @oh: struct omap_hwmod *
  506. *
  507. * Enables all clocks necessary for register reads and writes to succeed
  508. * on the hwmod @oh. Returns 0.
  509. */
  510. static int _enable_clocks(struct omap_hwmod *oh)
  511. {
  512. int i;
  513. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  514. if (oh->_clk)
  515. clk_enable(oh->_clk);
  516. if (oh->slaves_cnt > 0) {
  517. for (i = 0; i < oh->slaves_cnt; i++) {
  518. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  519. struct clk *c = os->_clk;
  520. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  521. clk_enable(c);
  522. }
  523. }
  524. /* The opt clocks are controlled by the device driver. */
  525. return 0;
  526. }
  527. /**
  528. * _disable_clocks - disable hwmod main clock and interface clocks
  529. * @oh: struct omap_hwmod *
  530. *
  531. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  532. */
  533. static int _disable_clocks(struct omap_hwmod *oh)
  534. {
  535. int i;
  536. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  537. if (oh->_clk)
  538. clk_disable(oh->_clk);
  539. if (oh->slaves_cnt > 0) {
  540. for (i = 0; i < oh->slaves_cnt; i++) {
  541. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  542. struct clk *c = os->_clk;
  543. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  544. clk_disable(c);
  545. }
  546. }
  547. /* The opt clocks are controlled by the device driver. */
  548. return 0;
  549. }
  550. static void _enable_optional_clocks(struct omap_hwmod *oh)
  551. {
  552. struct omap_hwmod_opt_clk *oc;
  553. int i;
  554. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  555. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  556. if (oc->_clk) {
  557. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  558. oc->_clk->name);
  559. clk_enable(oc->_clk);
  560. }
  561. }
  562. static void _disable_optional_clocks(struct omap_hwmod *oh)
  563. {
  564. struct omap_hwmod_opt_clk *oc;
  565. int i;
  566. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  567. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  568. if (oc->_clk) {
  569. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  570. oc->_clk->name);
  571. clk_disable(oc->_clk);
  572. }
  573. }
  574. /**
  575. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  576. * @oh: struct omap_hwmod *
  577. *
  578. * Returns the array index of the OCP slave port that the MPU
  579. * addresses the device on, or -EINVAL upon error or not found.
  580. */
  581. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  582. {
  583. int i;
  584. int found = 0;
  585. if (!oh || oh->slaves_cnt == 0)
  586. return -EINVAL;
  587. for (i = 0; i < oh->slaves_cnt; i++) {
  588. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  589. if (os->user & OCP_USER_MPU) {
  590. found = 1;
  591. break;
  592. }
  593. }
  594. if (found)
  595. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  596. oh->name, i);
  597. else
  598. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  599. oh->name);
  600. return (found) ? i : -EINVAL;
  601. }
  602. /**
  603. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  604. * @oh: struct omap_hwmod *
  605. *
  606. * Return the virtual address of the base of the register target of
  607. * device @oh, or NULL on error.
  608. */
  609. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  610. {
  611. struct omap_hwmod_ocp_if *os;
  612. struct omap_hwmod_addr_space *mem;
  613. int i;
  614. int found = 0;
  615. void __iomem *va_start;
  616. if (!oh || oh->slaves_cnt == 0)
  617. return NULL;
  618. os = oh->slaves[index];
  619. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  620. if (mem->flags & ADDR_TYPE_RT) {
  621. found = 1;
  622. break;
  623. }
  624. }
  625. if (found) {
  626. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  627. if (!va_start) {
  628. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  629. return NULL;
  630. }
  631. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  632. oh->name, va_start);
  633. } else {
  634. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  635. oh->name);
  636. }
  637. return (found) ? va_start : NULL;
  638. }
  639. /**
  640. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  641. * @oh: struct omap_hwmod *
  642. *
  643. * If module is marked as SWSUP_SIDLE, force the module out of slave
  644. * idle; otherwise, configure it for smart-idle. If module is marked
  645. * as SWSUP_MSUSPEND, force the module out of master standby;
  646. * otherwise, configure it for smart-standby. No return value.
  647. */
  648. static void _enable_sysc(struct omap_hwmod *oh)
  649. {
  650. u8 idlemode, sf;
  651. u32 v;
  652. if (!oh->class->sysc)
  653. return;
  654. v = oh->_sysc_cache;
  655. sf = oh->class->sysc->sysc_flags;
  656. if (sf & SYSC_HAS_SIDLEMODE) {
  657. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  658. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  659. _set_slave_idlemode(oh, idlemode, &v);
  660. }
  661. if (sf & SYSC_HAS_MIDLEMODE) {
  662. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  663. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  664. _set_master_standbymode(oh, idlemode, &v);
  665. }
  666. /*
  667. * XXX The clock framework should handle this, by
  668. * calling into this code. But this must wait until the
  669. * clock structures are tagged with omap_hwmod entries
  670. */
  671. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  672. (sf & SYSC_HAS_CLOCKACTIVITY))
  673. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  674. /* If slave is in SMARTIDLE, also enable wakeup */
  675. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  676. _enable_wakeup(oh, &v);
  677. _write_sysconfig(v, oh);
  678. /*
  679. * Set the autoidle bit only after setting the smartidle bit
  680. * Setting this will not have any impact on the other modules.
  681. */
  682. if (sf & SYSC_HAS_AUTOIDLE) {
  683. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  684. 0 : 1;
  685. _set_module_autoidle(oh, idlemode, &v);
  686. _write_sysconfig(v, oh);
  687. }
  688. }
  689. /**
  690. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  691. * @oh: struct omap_hwmod *
  692. *
  693. * If module is marked as SWSUP_SIDLE, force the module into slave
  694. * idle; otherwise, configure it for smart-idle. If module is marked
  695. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  696. * configure it for smart-standby. No return value.
  697. */
  698. static void _idle_sysc(struct omap_hwmod *oh)
  699. {
  700. u8 idlemode, sf;
  701. u32 v;
  702. if (!oh->class->sysc)
  703. return;
  704. v = oh->_sysc_cache;
  705. sf = oh->class->sysc->sysc_flags;
  706. if (sf & SYSC_HAS_SIDLEMODE) {
  707. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  708. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  709. _set_slave_idlemode(oh, idlemode, &v);
  710. }
  711. if (sf & SYSC_HAS_MIDLEMODE) {
  712. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  713. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  714. _set_master_standbymode(oh, idlemode, &v);
  715. }
  716. /* If slave is in SMARTIDLE, also enable wakeup */
  717. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  718. _enable_wakeup(oh, &v);
  719. _write_sysconfig(v, oh);
  720. }
  721. /**
  722. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  723. * @oh: struct omap_hwmod *
  724. *
  725. * Force the module into slave idle and master suspend. No return
  726. * value.
  727. */
  728. static void _shutdown_sysc(struct omap_hwmod *oh)
  729. {
  730. u32 v;
  731. u8 sf;
  732. if (!oh->class->sysc)
  733. return;
  734. v = oh->_sysc_cache;
  735. sf = oh->class->sysc->sysc_flags;
  736. if (sf & SYSC_HAS_SIDLEMODE)
  737. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  738. if (sf & SYSC_HAS_MIDLEMODE)
  739. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  740. if (sf & SYSC_HAS_AUTOIDLE)
  741. _set_module_autoidle(oh, 1, &v);
  742. _write_sysconfig(v, oh);
  743. }
  744. /**
  745. * _lookup - find an omap_hwmod by name
  746. * @name: find an omap_hwmod by name
  747. *
  748. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  749. */
  750. static struct omap_hwmod *_lookup(const char *name)
  751. {
  752. struct omap_hwmod *oh, *temp_oh;
  753. oh = NULL;
  754. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  755. if (!strcmp(name, temp_oh->name)) {
  756. oh = temp_oh;
  757. break;
  758. }
  759. }
  760. return oh;
  761. }
  762. /**
  763. * _init_clocks - clk_get() all clocks associated with this hwmod
  764. * @oh: struct omap_hwmod *
  765. * @data: not used; pass NULL
  766. *
  767. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  768. * Resolves all clock names embedded in the hwmod. Returns 0 on
  769. * success, or a negative error code on failure.
  770. */
  771. static int _init_clocks(struct omap_hwmod *oh, void *data)
  772. {
  773. int ret = 0;
  774. if (oh->_state != _HWMOD_STATE_REGISTERED)
  775. return 0;
  776. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  777. ret |= _init_main_clk(oh);
  778. ret |= _init_interface_clks(oh);
  779. ret |= _init_opt_clks(oh);
  780. if (!ret)
  781. oh->_state = _HWMOD_STATE_CLKS_INITED;
  782. return ret;
  783. }
  784. /**
  785. * _wait_target_ready - wait for a module to leave slave idle
  786. * @oh: struct omap_hwmod *
  787. *
  788. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  789. * does not have an IDLEST bit or if the module successfully leaves
  790. * slave idle; otherwise, pass along the return value of the
  791. * appropriate *_cm_wait_module_ready() function.
  792. */
  793. static int _wait_target_ready(struct omap_hwmod *oh)
  794. {
  795. struct omap_hwmod_ocp_if *os;
  796. int ret;
  797. if (!oh)
  798. return -EINVAL;
  799. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  800. return 0;
  801. os = oh->slaves[oh->_mpu_port_index];
  802. if (oh->flags & HWMOD_NO_IDLEST)
  803. return 0;
  804. /* XXX check module SIDLEMODE */
  805. /* XXX check clock enable states */
  806. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  807. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  808. oh->prcm.omap2.idlest_reg_id,
  809. oh->prcm.omap2.idlest_idle_bit);
  810. } else if (cpu_is_omap44xx()) {
  811. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  812. } else {
  813. BUG();
  814. };
  815. return ret;
  816. }
  817. /**
  818. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  819. * @oh: struct omap_hwmod *
  820. * @name: name of the reset line in the context of this hwmod
  821. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  822. *
  823. * Return the bit position of the reset line that match the
  824. * input name. Return -ENOENT if not found.
  825. */
  826. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  827. struct omap_hwmod_rst_info *ohri)
  828. {
  829. int i;
  830. for (i = 0; i < oh->rst_lines_cnt; i++) {
  831. const char *rst_line = oh->rst_lines[i].name;
  832. if (!strcmp(rst_line, name)) {
  833. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  834. ohri->st_shift = oh->rst_lines[i].st_shift;
  835. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  836. oh->name, __func__, rst_line, ohri->rst_shift,
  837. ohri->st_shift);
  838. return 0;
  839. }
  840. }
  841. return -ENOENT;
  842. }
  843. /**
  844. * _assert_hardreset - assert the HW reset line of submodules
  845. * contained in the hwmod module.
  846. * @oh: struct omap_hwmod *
  847. * @name: name of the reset line to lookup and assert
  848. *
  849. * Some IP like dsp, ipu or iva contain processor that require
  850. * an HW reset line to be assert / deassert in order to enable fully
  851. * the IP.
  852. */
  853. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  854. {
  855. struct omap_hwmod_rst_info ohri;
  856. u8 ret;
  857. if (!oh)
  858. return -EINVAL;
  859. ret = _lookup_hardreset(oh, name, &ohri);
  860. if (IS_ERR_VALUE(ret))
  861. return ret;
  862. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  863. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  864. ohri.rst_shift);
  865. else if (cpu_is_omap44xx())
  866. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  867. ohri.rst_shift);
  868. else
  869. return -EINVAL;
  870. }
  871. /**
  872. * _deassert_hardreset - deassert the HW reset line of submodules contained
  873. * in the hwmod module.
  874. * @oh: struct omap_hwmod *
  875. * @name: name of the reset line to look up and deassert
  876. *
  877. * Some IP like dsp, ipu or iva contain processor that require
  878. * an HW reset line to be assert / deassert in order to enable fully
  879. * the IP.
  880. */
  881. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  882. {
  883. struct omap_hwmod_rst_info ohri;
  884. int ret;
  885. if (!oh)
  886. return -EINVAL;
  887. ret = _lookup_hardreset(oh, name, &ohri);
  888. if (IS_ERR_VALUE(ret))
  889. return ret;
  890. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  891. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  892. ohri.rst_shift,
  893. ohri.st_shift);
  894. } else if (cpu_is_omap44xx()) {
  895. if (ohri.st_shift)
  896. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  897. oh->name, name);
  898. ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  899. ohri.rst_shift);
  900. } else {
  901. return -EINVAL;
  902. }
  903. if (ret == -EBUSY)
  904. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  905. return ret;
  906. }
  907. /**
  908. * _read_hardreset - read the HW reset line state of submodules
  909. * contained in the hwmod module
  910. * @oh: struct omap_hwmod *
  911. * @name: name of the reset line to look up and read
  912. *
  913. * Return the state of the reset line.
  914. */
  915. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  916. {
  917. struct omap_hwmod_rst_info ohri;
  918. u8 ret;
  919. if (!oh)
  920. return -EINVAL;
  921. ret = _lookup_hardreset(oh, name, &ohri);
  922. if (IS_ERR_VALUE(ret))
  923. return ret;
  924. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  925. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  926. ohri.st_shift);
  927. } else if (cpu_is_omap44xx()) {
  928. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  929. ohri.rst_shift);
  930. } else {
  931. return -EINVAL;
  932. }
  933. }
  934. /**
  935. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  936. * @oh: struct omap_hwmod *
  937. *
  938. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  939. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  940. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  941. * the module did not reset in time, or 0 upon success.
  942. *
  943. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  944. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  945. * use the SYSCONFIG softreset bit to provide the status.
  946. *
  947. * Note that some IP like McBSP do have reset control but don't have
  948. * reset status.
  949. */
  950. static int _ocp_softreset(struct omap_hwmod *oh)
  951. {
  952. u32 v;
  953. int c = 0;
  954. int ret = 0;
  955. if (!oh->class->sysc ||
  956. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  957. return -EINVAL;
  958. /* clocks must be on for this operation */
  959. if (oh->_state != _HWMOD_STATE_ENABLED) {
  960. pr_warning("omap_hwmod: %s: reset can only be entered from "
  961. "enabled state\n", oh->name);
  962. return -EINVAL;
  963. }
  964. /* For some modules, all optionnal clocks need to be enabled as well */
  965. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  966. _enable_optional_clocks(oh);
  967. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  968. v = oh->_sysc_cache;
  969. ret = _set_softreset(oh, &v);
  970. if (ret)
  971. goto dis_opt_clks;
  972. _write_sysconfig(v, oh);
  973. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  974. omap_test_timeout((omap_hwmod_read(oh,
  975. oh->class->sysc->syss_offs)
  976. & SYSS_RESETDONE_MASK),
  977. MAX_MODULE_SOFTRESET_WAIT, c);
  978. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  979. omap_test_timeout(!(omap_hwmod_read(oh,
  980. oh->class->sysc->sysc_offs)
  981. & SYSC_TYPE2_SOFTRESET_MASK),
  982. MAX_MODULE_SOFTRESET_WAIT, c);
  983. if (c == MAX_MODULE_SOFTRESET_WAIT)
  984. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  985. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  986. else
  987. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  988. /*
  989. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  990. * _wait_target_ready() or _reset()
  991. */
  992. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  993. dis_opt_clks:
  994. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  995. _disable_optional_clocks(oh);
  996. return ret;
  997. }
  998. /**
  999. * _reset - reset an omap_hwmod
  1000. * @oh: struct omap_hwmod *
  1001. *
  1002. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1003. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1004. * bit. However, some hwmods cannot be reset via this method: some
  1005. * are not targets and therefore have no OCP header registers to
  1006. * access; others (like the IVA) have idiosyncratic reset sequences.
  1007. * So for these relatively rare cases, custom reset code can be
  1008. * supplied in the struct omap_hwmod_class .reset function pointer.
  1009. * Passes along the return value from either _reset() or the custom
  1010. * reset function - these must return -EINVAL if the hwmod cannot be
  1011. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1012. * the module did not reset in time, or 0 upon success.
  1013. */
  1014. static int _reset(struct omap_hwmod *oh)
  1015. {
  1016. int ret;
  1017. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1018. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1019. return ret;
  1020. }
  1021. /**
  1022. * _enable - enable an omap_hwmod
  1023. * @oh: struct omap_hwmod *
  1024. *
  1025. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1026. * register target. Returns -EINVAL if the hwmod is in the wrong
  1027. * state or passes along the return value of _wait_target_ready().
  1028. */
  1029. static int _enable(struct omap_hwmod *oh)
  1030. {
  1031. int r;
  1032. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1033. oh->_state != _HWMOD_STATE_IDLE &&
  1034. oh->_state != _HWMOD_STATE_DISABLED) {
  1035. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1036. "from initialized, idle, or disabled state\n", oh->name);
  1037. return -EINVAL;
  1038. }
  1039. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1040. /*
  1041. * If an IP contains only one HW reset line, then de-assert it in order
  1042. * to allow to enable the clocks. Otherwise the PRCM will return
  1043. * Intransition status, and the init will failed.
  1044. */
  1045. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1046. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1047. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1048. /* Mux pins for device runtime if populated */
  1049. if (oh->mux && (!oh->mux->enabled ||
  1050. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1051. oh->mux->pads_dynamic)))
  1052. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1053. _add_initiator_dep(oh, mpu_oh);
  1054. _enable_clocks(oh);
  1055. r = _wait_target_ready(oh);
  1056. if (!r) {
  1057. oh->_state = _HWMOD_STATE_ENABLED;
  1058. /* Access the sysconfig only if the target is ready */
  1059. if (oh->class->sysc) {
  1060. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1061. _update_sysc_cache(oh);
  1062. _enable_sysc(oh);
  1063. }
  1064. } else {
  1065. _disable_clocks(oh);
  1066. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1067. oh->name, r);
  1068. }
  1069. return r;
  1070. }
  1071. /**
  1072. * _idle - idle an omap_hwmod
  1073. * @oh: struct omap_hwmod *
  1074. *
  1075. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1076. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1077. * state or returns 0.
  1078. */
  1079. static int _idle(struct omap_hwmod *oh)
  1080. {
  1081. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1082. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1083. "enabled state\n", oh->name);
  1084. return -EINVAL;
  1085. }
  1086. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1087. if (oh->class->sysc)
  1088. _idle_sysc(oh);
  1089. _del_initiator_dep(oh, mpu_oh);
  1090. _disable_clocks(oh);
  1091. /* Mux pins for device idle if populated */
  1092. if (oh->mux && oh->mux->pads_dynamic)
  1093. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1094. oh->_state = _HWMOD_STATE_IDLE;
  1095. return 0;
  1096. }
  1097. /**
  1098. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1099. * @oh: struct omap_hwmod *
  1100. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1101. *
  1102. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1103. * local copy. Intended to be used by drivers that require
  1104. * direct manipulation of the AUTOIDLE bits.
  1105. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1106. * along the return value from _set_module_autoidle().
  1107. *
  1108. * Any users of this function should be scrutinized carefully.
  1109. */
  1110. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1111. {
  1112. u32 v;
  1113. int retval = 0;
  1114. unsigned long flags;
  1115. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1116. return -EINVAL;
  1117. spin_lock_irqsave(&oh->_lock, flags);
  1118. v = oh->_sysc_cache;
  1119. retval = _set_module_autoidle(oh, autoidle, &v);
  1120. if (!retval)
  1121. _write_sysconfig(v, oh);
  1122. spin_unlock_irqrestore(&oh->_lock, flags);
  1123. return retval;
  1124. }
  1125. /**
  1126. * _shutdown - shutdown an omap_hwmod
  1127. * @oh: struct omap_hwmod *
  1128. *
  1129. * Shut down an omap_hwmod @oh. This should be called when the driver
  1130. * used for the hwmod is removed or unloaded or if the driver is not
  1131. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1132. * state or returns 0.
  1133. */
  1134. static int _shutdown(struct omap_hwmod *oh)
  1135. {
  1136. int ret;
  1137. u8 prev_state;
  1138. if (oh->_state != _HWMOD_STATE_IDLE &&
  1139. oh->_state != _HWMOD_STATE_ENABLED) {
  1140. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1141. "from idle, or enabled state\n", oh->name);
  1142. return -EINVAL;
  1143. }
  1144. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1145. if (oh->class->pre_shutdown) {
  1146. prev_state = oh->_state;
  1147. if (oh->_state == _HWMOD_STATE_IDLE)
  1148. _enable(oh);
  1149. ret = oh->class->pre_shutdown(oh);
  1150. if (ret) {
  1151. if (prev_state == _HWMOD_STATE_IDLE)
  1152. _idle(oh);
  1153. return ret;
  1154. }
  1155. }
  1156. if (oh->class->sysc)
  1157. _shutdown_sysc(oh);
  1158. /*
  1159. * If an IP contains only one HW reset line, then assert it
  1160. * before disabling the clocks and shutting down the IP.
  1161. */
  1162. if (oh->rst_lines_cnt == 1)
  1163. _assert_hardreset(oh, oh->rst_lines[0].name);
  1164. /* clocks and deps are already disabled in idle */
  1165. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1166. _del_initiator_dep(oh, mpu_oh);
  1167. /* XXX what about the other system initiators here? dma, dsp */
  1168. _disable_clocks(oh);
  1169. }
  1170. /* XXX Should this code also force-disable the optional clocks? */
  1171. /* Mux pins to safe mode or use populated off mode values */
  1172. if (oh->mux)
  1173. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1174. oh->_state = _HWMOD_STATE_DISABLED;
  1175. return 0;
  1176. }
  1177. /**
  1178. * _setup - do initial configuration of omap_hwmod
  1179. * @oh: struct omap_hwmod *
  1180. *
  1181. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1182. * OCP_SYSCONFIG register. Returns 0.
  1183. */
  1184. static int _setup(struct omap_hwmod *oh, void *data)
  1185. {
  1186. int i, r;
  1187. u8 postsetup_state;
  1188. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1189. return 0;
  1190. /* Set iclk autoidle mode */
  1191. if (oh->slaves_cnt > 0) {
  1192. for (i = 0; i < oh->slaves_cnt; i++) {
  1193. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1194. struct clk *c = os->_clk;
  1195. if (!c)
  1196. continue;
  1197. if (os->flags & OCPIF_SWSUP_IDLE) {
  1198. /* XXX omap_iclk_deny_idle(c); */
  1199. } else {
  1200. /* XXX omap_iclk_allow_idle(c); */
  1201. clk_enable(c);
  1202. }
  1203. }
  1204. }
  1205. oh->_state = _HWMOD_STATE_INITIALIZED;
  1206. /*
  1207. * In the case of hwmod with hardreset that should not be
  1208. * de-assert at boot time, we have to keep the module
  1209. * initialized, because we cannot enable it properly with the
  1210. * reset asserted. Exit without warning because that behavior is
  1211. * expected.
  1212. */
  1213. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1214. return 0;
  1215. r = _enable(oh);
  1216. if (r) {
  1217. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1218. oh->name, oh->_state);
  1219. return 0;
  1220. }
  1221. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1222. _reset(oh);
  1223. /*
  1224. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1225. * The _enable() function should be split to
  1226. * avoid the rewrite of the OCP_SYSCONFIG register.
  1227. */
  1228. if (oh->class->sysc) {
  1229. _update_sysc_cache(oh);
  1230. _enable_sysc(oh);
  1231. }
  1232. }
  1233. postsetup_state = oh->_postsetup_state;
  1234. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1235. postsetup_state = _HWMOD_STATE_ENABLED;
  1236. /*
  1237. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1238. * it should be set by the core code as a runtime flag during startup
  1239. */
  1240. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1241. (postsetup_state == _HWMOD_STATE_IDLE))
  1242. postsetup_state = _HWMOD_STATE_ENABLED;
  1243. if (postsetup_state == _HWMOD_STATE_IDLE)
  1244. _idle(oh);
  1245. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1246. _shutdown(oh);
  1247. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1248. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1249. oh->name, postsetup_state);
  1250. return 0;
  1251. }
  1252. /**
  1253. * _register - register a struct omap_hwmod
  1254. * @oh: struct omap_hwmod *
  1255. *
  1256. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1257. * already has been registered by the same name; -EINVAL if the
  1258. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1259. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1260. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1261. * success.
  1262. *
  1263. * XXX The data should be copied into bootmem, so the original data
  1264. * should be marked __initdata and freed after init. This would allow
  1265. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1266. * that the copy process would be relatively complex due to the large number
  1267. * of substructures.
  1268. */
  1269. static int __init _register(struct omap_hwmod *oh)
  1270. {
  1271. int ms_id;
  1272. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1273. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1274. return -EINVAL;
  1275. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1276. if (_lookup(oh->name))
  1277. return -EEXIST;
  1278. ms_id = _find_mpu_port_index(oh);
  1279. if (!IS_ERR_VALUE(ms_id))
  1280. oh->_mpu_port_index = ms_id;
  1281. else
  1282. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1283. list_add_tail(&oh->node, &omap_hwmod_list);
  1284. spin_lock_init(&oh->_lock);
  1285. oh->_state = _HWMOD_STATE_REGISTERED;
  1286. /*
  1287. * XXX Rather than doing a strcmp(), this should test a flag
  1288. * set in the hwmod data, inserted by the autogenerator code.
  1289. */
  1290. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1291. mpu_oh = oh;
  1292. return 0;
  1293. }
  1294. /* Public functions */
  1295. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1296. {
  1297. if (oh->flags & HWMOD_16BIT_REG)
  1298. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1299. else
  1300. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1301. }
  1302. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1303. {
  1304. if (oh->flags & HWMOD_16BIT_REG)
  1305. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1306. else
  1307. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1308. }
  1309. /**
  1310. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1311. * @oh: struct omap_hwmod *
  1312. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1313. *
  1314. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1315. * local copy. Intended to be used by drivers that have some erratum
  1316. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1317. * -EINVAL if @oh is null, or passes along the return value from
  1318. * _set_slave_idlemode().
  1319. *
  1320. * XXX Does this function have any current users? If not, we should
  1321. * remove it; it is better to let the rest of the hwmod code handle this.
  1322. * Any users of this function should be scrutinized carefully.
  1323. */
  1324. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1325. {
  1326. u32 v;
  1327. int retval = 0;
  1328. if (!oh)
  1329. return -EINVAL;
  1330. v = oh->_sysc_cache;
  1331. retval = _set_slave_idlemode(oh, idlemode, &v);
  1332. if (!retval)
  1333. _write_sysconfig(v, oh);
  1334. return retval;
  1335. }
  1336. /**
  1337. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1338. * @name: name of the omap_hwmod to look up
  1339. *
  1340. * Given a @name of an omap_hwmod, return a pointer to the registered
  1341. * struct omap_hwmod *, or NULL upon error.
  1342. */
  1343. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1344. {
  1345. struct omap_hwmod *oh;
  1346. if (!name)
  1347. return NULL;
  1348. oh = _lookup(name);
  1349. return oh;
  1350. }
  1351. /**
  1352. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1353. * @fn: pointer to a callback function
  1354. * @data: void * data to pass to callback function
  1355. *
  1356. * Call @fn for each registered omap_hwmod, passing @data to each
  1357. * function. @fn must return 0 for success or any other value for
  1358. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1359. * will stop and the non-zero return value will be passed to the
  1360. * caller of omap_hwmod_for_each(). @fn is called with
  1361. * omap_hwmod_for_each() held.
  1362. */
  1363. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1364. void *data)
  1365. {
  1366. struct omap_hwmod *temp_oh;
  1367. int ret = 0;
  1368. if (!fn)
  1369. return -EINVAL;
  1370. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1371. ret = (*fn)(temp_oh, data);
  1372. if (ret)
  1373. break;
  1374. }
  1375. return ret;
  1376. }
  1377. /**
  1378. * omap_hwmod_register - register an array of hwmods
  1379. * @ohs: pointer to an array of omap_hwmods to register
  1380. *
  1381. * Intended to be called early in boot before the clock framework is
  1382. * initialized. If @ohs is not null, will register all omap_hwmods
  1383. * listed in @ohs that are valid for this chip. Returns 0.
  1384. */
  1385. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1386. {
  1387. int r, i;
  1388. if (!ohs)
  1389. return 0;
  1390. i = 0;
  1391. do {
  1392. if (!omap_chip_is(ohs[i]->omap_chip))
  1393. continue;
  1394. r = _register(ohs[i]);
  1395. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1396. r);
  1397. } while (ohs[++i]);
  1398. return 0;
  1399. }
  1400. /*
  1401. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1402. *
  1403. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1404. * Assumes the caller takes care of locking if needed.
  1405. */
  1406. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1407. {
  1408. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1409. return 0;
  1410. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1411. return 0;
  1412. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1413. if (!oh->_mpu_rt_va)
  1414. pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
  1415. __func__, oh->name);
  1416. return 0;
  1417. }
  1418. /**
  1419. * omap_hwmod_setup_one - set up a single hwmod
  1420. * @oh_name: const char * name of the already-registered hwmod to set up
  1421. *
  1422. * Must be called after omap2_clk_init(). Resolves the struct clk
  1423. * names to struct clk pointers for each registered omap_hwmod. Also
  1424. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1425. * success.
  1426. */
  1427. int __init omap_hwmod_setup_one(const char *oh_name)
  1428. {
  1429. struct omap_hwmod *oh;
  1430. int r;
  1431. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1432. if (!mpu_oh) {
  1433. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1434. oh_name, MPU_INITIATOR_NAME);
  1435. return -EINVAL;
  1436. }
  1437. oh = _lookup(oh_name);
  1438. if (!oh) {
  1439. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1440. return -EINVAL;
  1441. }
  1442. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1443. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1444. r = _populate_mpu_rt_base(oh, NULL);
  1445. if (IS_ERR_VALUE(r)) {
  1446. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1447. return -EINVAL;
  1448. }
  1449. r = _init_clocks(oh, NULL);
  1450. if (IS_ERR_VALUE(r)) {
  1451. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1452. return -EINVAL;
  1453. }
  1454. _setup(oh, NULL);
  1455. return 0;
  1456. }
  1457. /**
  1458. * omap_hwmod_setup - do some post-clock framework initialization
  1459. *
  1460. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1461. * to struct clk pointers for each registered omap_hwmod. Also calls
  1462. * _setup() on each hwmod. Returns 0 upon success.
  1463. */
  1464. static int __init omap_hwmod_setup_all(void)
  1465. {
  1466. int r;
  1467. if (!mpu_oh) {
  1468. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1469. __func__, MPU_INITIATOR_NAME);
  1470. return -EINVAL;
  1471. }
  1472. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1473. r = omap_hwmod_for_each(_init_clocks, NULL);
  1474. WARN(IS_ERR_VALUE(r),
  1475. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1476. omap_hwmod_for_each(_setup, NULL);
  1477. return 0;
  1478. }
  1479. core_initcall(omap_hwmod_setup_all);
  1480. /**
  1481. * omap_hwmod_enable - enable an omap_hwmod
  1482. * @oh: struct omap_hwmod *
  1483. *
  1484. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1485. * Returns -EINVAL on error or passes along the return value from _enable().
  1486. */
  1487. int omap_hwmod_enable(struct omap_hwmod *oh)
  1488. {
  1489. int r;
  1490. unsigned long flags;
  1491. if (!oh)
  1492. return -EINVAL;
  1493. spin_lock_irqsave(&oh->_lock, flags);
  1494. r = _enable(oh);
  1495. spin_unlock_irqrestore(&oh->_lock, flags);
  1496. return r;
  1497. }
  1498. /**
  1499. * omap_hwmod_idle - idle an omap_hwmod
  1500. * @oh: struct omap_hwmod *
  1501. *
  1502. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1503. * Returns -EINVAL on error or passes along the return value from _idle().
  1504. */
  1505. int omap_hwmod_idle(struct omap_hwmod *oh)
  1506. {
  1507. unsigned long flags;
  1508. if (!oh)
  1509. return -EINVAL;
  1510. spin_lock_irqsave(&oh->_lock, flags);
  1511. _idle(oh);
  1512. spin_unlock_irqrestore(&oh->_lock, flags);
  1513. return 0;
  1514. }
  1515. /**
  1516. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1517. * @oh: struct omap_hwmod *
  1518. *
  1519. * Shutdown an omap_hwmod @oh. Intended to be called by
  1520. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1521. * the return value from _shutdown().
  1522. */
  1523. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1524. {
  1525. unsigned long flags;
  1526. if (!oh)
  1527. return -EINVAL;
  1528. spin_lock_irqsave(&oh->_lock, flags);
  1529. _shutdown(oh);
  1530. spin_unlock_irqrestore(&oh->_lock, flags);
  1531. return 0;
  1532. }
  1533. /**
  1534. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1535. * @oh: struct omap_hwmod *oh
  1536. *
  1537. * Intended to be called by the omap_device code.
  1538. */
  1539. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1540. {
  1541. unsigned long flags;
  1542. spin_lock_irqsave(&oh->_lock, flags);
  1543. _enable_clocks(oh);
  1544. spin_unlock_irqrestore(&oh->_lock, flags);
  1545. return 0;
  1546. }
  1547. /**
  1548. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1549. * @oh: struct omap_hwmod *oh
  1550. *
  1551. * Intended to be called by the omap_device code.
  1552. */
  1553. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1554. {
  1555. unsigned long flags;
  1556. spin_lock_irqsave(&oh->_lock, flags);
  1557. _disable_clocks(oh);
  1558. spin_unlock_irqrestore(&oh->_lock, flags);
  1559. return 0;
  1560. }
  1561. /**
  1562. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1563. * @oh: struct omap_hwmod *oh
  1564. *
  1565. * Intended to be called by drivers and core code when all posted
  1566. * writes to a device must complete before continuing further
  1567. * execution (for example, after clearing some device IRQSTATUS
  1568. * register bits)
  1569. *
  1570. * XXX what about targets with multiple OCP threads?
  1571. */
  1572. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1573. {
  1574. BUG_ON(!oh);
  1575. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1576. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1577. "device configuration\n", oh->name);
  1578. return;
  1579. }
  1580. /*
  1581. * Forces posted writes to complete on the OCP thread handling
  1582. * register writes
  1583. */
  1584. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1585. }
  1586. /**
  1587. * omap_hwmod_reset - reset the hwmod
  1588. * @oh: struct omap_hwmod *
  1589. *
  1590. * Under some conditions, a driver may wish to reset the entire device.
  1591. * Called from omap_device code. Returns -EINVAL on error or passes along
  1592. * the return value from _reset().
  1593. */
  1594. int omap_hwmod_reset(struct omap_hwmod *oh)
  1595. {
  1596. int r;
  1597. unsigned long flags;
  1598. if (!oh)
  1599. return -EINVAL;
  1600. spin_lock_irqsave(&oh->_lock, flags);
  1601. r = _reset(oh);
  1602. spin_unlock_irqrestore(&oh->_lock, flags);
  1603. return r;
  1604. }
  1605. /**
  1606. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1607. * @oh: struct omap_hwmod *
  1608. * @res: pointer to the first element of an array of struct resource to fill
  1609. *
  1610. * Count the number of struct resource array elements necessary to
  1611. * contain omap_hwmod @oh resources. Intended to be called by code
  1612. * that registers omap_devices. Intended to be used to determine the
  1613. * size of a dynamically-allocated struct resource array, before
  1614. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1615. * resource array elements needed.
  1616. *
  1617. * XXX This code is not optimized. It could attempt to merge adjacent
  1618. * resource IDs.
  1619. *
  1620. */
  1621. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1622. {
  1623. int ret, i;
  1624. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1625. for (i = 0; i < oh->slaves_cnt; i++)
  1626. ret += oh->slaves[i]->addr_cnt;
  1627. return ret;
  1628. }
  1629. /**
  1630. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1631. * @oh: struct omap_hwmod *
  1632. * @res: pointer to the first element of an array of struct resource to fill
  1633. *
  1634. * Fill the struct resource array @res with resource data from the
  1635. * omap_hwmod @oh. Intended to be called by code that registers
  1636. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1637. * number of array elements filled.
  1638. */
  1639. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1640. {
  1641. int i, j;
  1642. int r = 0;
  1643. /* For each IRQ, DMA, memory area, fill in array.*/
  1644. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1645. (res + r)->name = (oh->mpu_irqs + i)->name;
  1646. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1647. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1648. (res + r)->flags = IORESOURCE_IRQ;
  1649. r++;
  1650. }
  1651. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1652. (res + r)->name = (oh->sdma_reqs + i)->name;
  1653. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1654. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1655. (res + r)->flags = IORESOURCE_DMA;
  1656. r++;
  1657. }
  1658. for (i = 0; i < oh->slaves_cnt; i++) {
  1659. struct omap_hwmod_ocp_if *os;
  1660. os = oh->slaves[i];
  1661. for (j = 0; j < os->addr_cnt; j++) {
  1662. (res + r)->name = (os->addr + j)->name;
  1663. (res + r)->start = (os->addr + j)->pa_start;
  1664. (res + r)->end = (os->addr + j)->pa_end;
  1665. (res + r)->flags = IORESOURCE_MEM;
  1666. r++;
  1667. }
  1668. }
  1669. return r;
  1670. }
  1671. /**
  1672. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1673. * @oh: struct omap_hwmod *
  1674. *
  1675. * Return the powerdomain pointer associated with the OMAP module
  1676. * @oh's main clock. If @oh does not have a main clk, return the
  1677. * powerdomain associated with the interface clock associated with the
  1678. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1679. * instead?) Returns NULL on error, or a struct powerdomain * on
  1680. * success.
  1681. */
  1682. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1683. {
  1684. struct clk *c;
  1685. if (!oh)
  1686. return NULL;
  1687. if (oh->_clk) {
  1688. c = oh->_clk;
  1689. } else {
  1690. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1691. return NULL;
  1692. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1693. }
  1694. if (!c->clkdm)
  1695. return NULL;
  1696. return c->clkdm->pwrdm.ptr;
  1697. }
  1698. /**
  1699. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1700. * @oh: struct omap_hwmod *
  1701. *
  1702. * Returns the virtual address corresponding to the beginning of the
  1703. * module's register target, in the address range that is intended to
  1704. * be used by the MPU. Returns the virtual address upon success or NULL
  1705. * upon error.
  1706. */
  1707. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1708. {
  1709. if (!oh)
  1710. return NULL;
  1711. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1712. return NULL;
  1713. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1714. return NULL;
  1715. return oh->_mpu_rt_va;
  1716. }
  1717. /**
  1718. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1719. * @oh: struct omap_hwmod *
  1720. * @init_oh: struct omap_hwmod * (initiator)
  1721. *
  1722. * Add a sleep dependency between the initiator @init_oh and @oh.
  1723. * Intended to be called by DSP/Bridge code via platform_data for the
  1724. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1725. * code needs to add/del initiator dependencies dynamically
  1726. * before/after accessing a device. Returns the return value from
  1727. * _add_initiator_dep().
  1728. *
  1729. * XXX Keep a usecount in the clockdomain code
  1730. */
  1731. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1732. struct omap_hwmod *init_oh)
  1733. {
  1734. return _add_initiator_dep(oh, init_oh);
  1735. }
  1736. /*
  1737. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1738. * for context save/restore operations?
  1739. */
  1740. /**
  1741. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1742. * @oh: struct omap_hwmod *
  1743. * @init_oh: struct omap_hwmod * (initiator)
  1744. *
  1745. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1746. * Intended to be called by DSP/Bridge code via platform_data for the
  1747. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1748. * code needs to add/del initiator dependencies dynamically
  1749. * before/after accessing a device. Returns the return value from
  1750. * _del_initiator_dep().
  1751. *
  1752. * XXX Keep a usecount in the clockdomain code
  1753. */
  1754. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1755. struct omap_hwmod *init_oh)
  1756. {
  1757. return _del_initiator_dep(oh, init_oh);
  1758. }
  1759. /**
  1760. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1761. * @oh: struct omap_hwmod *
  1762. *
  1763. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1764. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1765. * registers to cause the PRCM to receive wakeup events from the
  1766. * module. Does not set any wakeup routing registers beyond this
  1767. * point - if the module is to wake up any other module or subsystem,
  1768. * that must be set separately. Called by omap_device code. Returns
  1769. * -EINVAL on error or 0 upon success.
  1770. */
  1771. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1772. {
  1773. unsigned long flags;
  1774. u32 v;
  1775. if (!oh->class->sysc ||
  1776. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1777. return -EINVAL;
  1778. spin_lock_irqsave(&oh->_lock, flags);
  1779. v = oh->_sysc_cache;
  1780. _enable_wakeup(oh, &v);
  1781. _write_sysconfig(v, oh);
  1782. spin_unlock_irqrestore(&oh->_lock, flags);
  1783. return 0;
  1784. }
  1785. /**
  1786. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1787. * @oh: struct omap_hwmod *
  1788. *
  1789. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1790. * from sending wakeups to the PRCM. Eventually this should clear
  1791. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1792. * from the module. Does not set any wakeup routing registers beyond
  1793. * this point - if the module is to wake up any other module or
  1794. * subsystem, that must be set separately. Called by omap_device
  1795. * code. Returns -EINVAL on error or 0 upon success.
  1796. */
  1797. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1798. {
  1799. unsigned long flags;
  1800. u32 v;
  1801. if (!oh->class->sysc ||
  1802. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1803. return -EINVAL;
  1804. spin_lock_irqsave(&oh->_lock, flags);
  1805. v = oh->_sysc_cache;
  1806. _disable_wakeup(oh, &v);
  1807. _write_sysconfig(v, oh);
  1808. spin_unlock_irqrestore(&oh->_lock, flags);
  1809. return 0;
  1810. }
  1811. /**
  1812. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1813. * contained in the hwmod module.
  1814. * @oh: struct omap_hwmod *
  1815. * @name: name of the reset line to lookup and assert
  1816. *
  1817. * Some IP like dsp, ipu or iva contain processor that require
  1818. * an HW reset line to be assert / deassert in order to enable fully
  1819. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1820. * yet supported on this OMAP; otherwise, passes along the return value
  1821. * from _assert_hardreset().
  1822. */
  1823. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1824. {
  1825. int ret;
  1826. unsigned long flags;
  1827. if (!oh)
  1828. return -EINVAL;
  1829. spin_lock_irqsave(&oh->_lock, flags);
  1830. ret = _assert_hardreset(oh, name);
  1831. spin_unlock_irqrestore(&oh->_lock, flags);
  1832. return ret;
  1833. }
  1834. /**
  1835. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1836. * contained in the hwmod module.
  1837. * @oh: struct omap_hwmod *
  1838. * @name: name of the reset line to look up and deassert
  1839. *
  1840. * Some IP like dsp, ipu or iva contain processor that require
  1841. * an HW reset line to be assert / deassert in order to enable fully
  1842. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1843. * yet supported on this OMAP; otherwise, passes along the return value
  1844. * from _deassert_hardreset().
  1845. */
  1846. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1847. {
  1848. int ret;
  1849. unsigned long flags;
  1850. if (!oh)
  1851. return -EINVAL;
  1852. spin_lock_irqsave(&oh->_lock, flags);
  1853. ret = _deassert_hardreset(oh, name);
  1854. spin_unlock_irqrestore(&oh->_lock, flags);
  1855. return ret;
  1856. }
  1857. /**
  1858. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1859. * contained in the hwmod module
  1860. * @oh: struct omap_hwmod *
  1861. * @name: name of the reset line to look up and read
  1862. *
  1863. * Return the current state of the hwmod @oh's reset line named @name:
  1864. * returns -EINVAL upon parameter error or if this operation
  1865. * is unsupported on the current OMAP; otherwise, passes along the return
  1866. * value from _read_hardreset().
  1867. */
  1868. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1869. {
  1870. int ret;
  1871. unsigned long flags;
  1872. if (!oh)
  1873. return -EINVAL;
  1874. spin_lock_irqsave(&oh->_lock, flags);
  1875. ret = _read_hardreset(oh, name);
  1876. spin_unlock_irqrestore(&oh->_lock, flags);
  1877. return ret;
  1878. }
  1879. /**
  1880. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1881. * @classname: struct omap_hwmod_class name to search for
  1882. * @fn: callback function pointer to call for each hwmod in class @classname
  1883. * @user: arbitrary context data to pass to the callback function
  1884. *
  1885. * For each omap_hwmod of class @classname, call @fn.
  1886. * If the callback function returns something other than
  1887. * zero, the iterator is terminated, and the callback function's return
  1888. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1889. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1890. */
  1891. int omap_hwmod_for_each_by_class(const char *classname,
  1892. int (*fn)(struct omap_hwmod *oh,
  1893. void *user),
  1894. void *user)
  1895. {
  1896. struct omap_hwmod *temp_oh;
  1897. int ret = 0;
  1898. if (!classname || !fn)
  1899. return -EINVAL;
  1900. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1901. __func__, classname);
  1902. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1903. if (!strcmp(temp_oh->class->name, classname)) {
  1904. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1905. __func__, temp_oh->name);
  1906. ret = (*fn)(temp_oh, user);
  1907. if (ret)
  1908. break;
  1909. }
  1910. }
  1911. if (ret)
  1912. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1913. __func__, ret);
  1914. return ret;
  1915. }
  1916. /**
  1917. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1918. * @oh: struct omap_hwmod *
  1919. * @state: state that _setup() should leave the hwmod in
  1920. *
  1921. * Sets the hwmod state that @oh will enter at the end of _setup()
  1922. * (called by omap_hwmod_setup_*()). Only valid to call between
  1923. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  1924. * 0 upon success or -EINVAL if there is a problem with the arguments
  1925. * or if the hwmod is in the wrong state.
  1926. */
  1927. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1928. {
  1929. int ret;
  1930. unsigned long flags;
  1931. if (!oh)
  1932. return -EINVAL;
  1933. if (state != _HWMOD_STATE_DISABLED &&
  1934. state != _HWMOD_STATE_ENABLED &&
  1935. state != _HWMOD_STATE_IDLE)
  1936. return -EINVAL;
  1937. spin_lock_irqsave(&oh->_lock, flags);
  1938. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1939. ret = -EINVAL;
  1940. goto ohsps_unlock;
  1941. }
  1942. oh->_postsetup_state = state;
  1943. ret = 0;
  1944. ohsps_unlock:
  1945. spin_unlock_irqrestore(&oh->_lock, flags);
  1946. return ret;
  1947. }
  1948. /**
  1949. * omap_hwmod_get_context_loss_count - get lost context count
  1950. * @oh: struct omap_hwmod *
  1951. *
  1952. * Query the powerdomain of of @oh to get the context loss
  1953. * count for this device.
  1954. *
  1955. * Returns the context loss count of the powerdomain assocated with @oh
  1956. * upon success, or zero if no powerdomain exists for @oh.
  1957. */
  1958. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  1959. {
  1960. struct powerdomain *pwrdm;
  1961. int ret = 0;
  1962. pwrdm = omap_hwmod_get_pwrdm(oh);
  1963. if (pwrdm)
  1964. ret = pwrdm_get_context_loss_count(pwrdm);
  1965. return ret;
  1966. }
  1967. /**
  1968. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  1969. * @oh: struct omap_hwmod *
  1970. *
  1971. * Prevent the hwmod @oh from being reset during the setup process.
  1972. * Intended for use by board-*.c files on boards with devices that
  1973. * cannot tolerate being reset. Must be called before the hwmod has
  1974. * been set up. Returns 0 upon success or negative error code upon
  1975. * failure.
  1976. */
  1977. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  1978. {
  1979. if (!oh)
  1980. return -EINVAL;
  1981. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1982. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  1983. oh->name);
  1984. return -EINVAL;
  1985. }
  1986. oh->flags |= HWMOD_INIT_NO_RESET;
  1987. return 0;
  1988. }