pci-sysfs.c 35 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (strict_strtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
  117. struct device_attribute *attr,
  118. char *buf)
  119. {
  120. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  121. }
  122. static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
  123. struct device_attribute *attr,
  124. char *buf)
  125. {
  126. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  127. }
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = strict_strtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (strict_strtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. #ifdef CONFIG_HOTPLUG
  242. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  243. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  244. size_t count)
  245. {
  246. unsigned long val;
  247. struct pci_bus *b = NULL;
  248. if (strict_strtoul(buf, 0, &val) < 0)
  249. return -EINVAL;
  250. if (val) {
  251. mutex_lock(&pci_remove_rescan_mutex);
  252. while ((b = pci_find_next_bus(b)) != NULL)
  253. pci_rescan_bus(b);
  254. mutex_unlock(&pci_remove_rescan_mutex);
  255. }
  256. return count;
  257. }
  258. struct bus_attribute pci_bus_attrs[] = {
  259. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  260. __ATTR_NULL
  261. };
  262. static ssize_t
  263. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  264. const char *buf, size_t count)
  265. {
  266. unsigned long val;
  267. struct pci_dev *pdev = to_pci_dev(dev);
  268. if (strict_strtoul(buf, 0, &val) < 0)
  269. return -EINVAL;
  270. if (val) {
  271. mutex_lock(&pci_remove_rescan_mutex);
  272. pci_rescan_bus(pdev->bus);
  273. mutex_unlock(&pci_remove_rescan_mutex);
  274. }
  275. return count;
  276. }
  277. static void remove_callback(struct device *dev)
  278. {
  279. struct pci_dev *pdev = to_pci_dev(dev);
  280. mutex_lock(&pci_remove_rescan_mutex);
  281. pci_stop_and_remove_bus_device(pdev);
  282. mutex_unlock(&pci_remove_rescan_mutex);
  283. }
  284. static ssize_t
  285. remove_store(struct device *dev, struct device_attribute *dummy,
  286. const char *buf, size_t count)
  287. {
  288. int ret = 0;
  289. unsigned long val;
  290. if (strict_strtoul(buf, 0, &val) < 0)
  291. return -EINVAL;
  292. /* An attribute cannot be unregistered by one of its own methods,
  293. * so we have to use this roundabout approach.
  294. */
  295. if (val)
  296. ret = device_schedule_callback(dev, remove_callback);
  297. if (ret)
  298. count = ret;
  299. return count;
  300. }
  301. static ssize_t
  302. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  303. const char *buf, size_t count)
  304. {
  305. unsigned long val;
  306. struct pci_bus *bus = to_pci_bus(dev);
  307. if (strict_strtoul(buf, 0, &val) < 0)
  308. return -EINVAL;
  309. if (val) {
  310. mutex_lock(&pci_remove_rescan_mutex);
  311. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  312. pci_rescan_bus_bridge_resize(bus->self);
  313. else
  314. pci_rescan_bus(bus);
  315. mutex_unlock(&pci_remove_rescan_mutex);
  316. }
  317. return count;
  318. }
  319. #endif
  320. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  321. static ssize_t d3cold_allowed_store(struct device *dev,
  322. struct device_attribute *attr,
  323. const char *buf, size_t count)
  324. {
  325. struct pci_dev *pdev = to_pci_dev(dev);
  326. unsigned long val;
  327. if (strict_strtoul(buf, 0, &val) < 0)
  328. return -EINVAL;
  329. pdev->d3cold_allowed = !!val;
  330. pm_runtime_resume(dev);
  331. return count;
  332. }
  333. static ssize_t d3cold_allowed_show(struct device *dev,
  334. struct device_attribute *attr, char *buf)
  335. {
  336. struct pci_dev *pdev = to_pci_dev(dev);
  337. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  338. }
  339. #endif
  340. struct device_attribute pci_dev_attrs[] = {
  341. __ATTR_RO(resource),
  342. __ATTR_RO(vendor),
  343. __ATTR_RO(device),
  344. __ATTR_RO(subsystem_vendor),
  345. __ATTR_RO(subsystem_device),
  346. __ATTR_RO(class),
  347. __ATTR_RO(irq),
  348. __ATTR_RO(local_cpus),
  349. __ATTR_RO(local_cpulist),
  350. __ATTR_RO(modalias),
  351. #ifdef CONFIG_NUMA
  352. __ATTR_RO(numa_node),
  353. #endif
  354. __ATTR_RO(dma_mask_bits),
  355. __ATTR_RO(consistent_dma_mask_bits),
  356. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  357. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  358. broken_parity_status_show,broken_parity_status_store),
  359. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  360. #ifdef CONFIG_HOTPLUG
  361. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  362. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  363. #endif
  364. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  365. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  366. #endif
  367. __ATTR_NULL,
  368. };
  369. struct device_attribute pcibus_dev_attrs[] = {
  370. #ifdef CONFIG_HOTPLUG
  371. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
  372. #endif
  373. __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
  374. __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
  375. __ATTR_NULL,
  376. };
  377. static ssize_t
  378. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  379. {
  380. struct pci_dev *pdev = to_pci_dev(dev);
  381. struct pci_dev *vga_dev = vga_default_device();
  382. if (vga_dev)
  383. return sprintf(buf, "%u\n", (pdev == vga_dev));
  384. return sprintf(buf, "%u\n",
  385. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  386. IORESOURCE_ROM_SHADOW));
  387. }
  388. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  389. static void
  390. pci_config_pm_runtime_get(struct pci_dev *pdev)
  391. {
  392. struct device *dev = &pdev->dev;
  393. struct device *parent = dev->parent;
  394. if (parent)
  395. pm_runtime_get_sync(parent);
  396. pm_runtime_get_noresume(dev);
  397. /*
  398. * pdev->current_state is set to PCI_D3cold during suspending,
  399. * so wait until suspending completes
  400. */
  401. pm_runtime_barrier(dev);
  402. /*
  403. * Only need to resume devices in D3cold, because config
  404. * registers are still accessible for devices suspended but
  405. * not in D3cold.
  406. */
  407. if (pdev->current_state == PCI_D3cold)
  408. pm_runtime_resume(dev);
  409. }
  410. static void
  411. pci_config_pm_runtime_put(struct pci_dev *pdev)
  412. {
  413. struct device *dev = &pdev->dev;
  414. struct device *parent = dev->parent;
  415. pm_runtime_put(dev);
  416. if (parent)
  417. pm_runtime_put_sync(parent);
  418. }
  419. static ssize_t
  420. pci_read_config(struct file *filp, struct kobject *kobj,
  421. struct bin_attribute *bin_attr,
  422. char *buf, loff_t off, size_t count)
  423. {
  424. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  425. unsigned int size = 64;
  426. loff_t init_off = off;
  427. u8 *data = (u8*) buf;
  428. /* Several chips lock up trying to read undefined config space */
  429. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  430. size = dev->cfg_size;
  431. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  432. size = 128;
  433. }
  434. if (off > size)
  435. return 0;
  436. if (off + count > size) {
  437. size -= off;
  438. count = size;
  439. } else {
  440. size = count;
  441. }
  442. pci_config_pm_runtime_get(dev);
  443. if ((off & 1) && size) {
  444. u8 val;
  445. pci_user_read_config_byte(dev, off, &val);
  446. data[off - init_off] = val;
  447. off++;
  448. size--;
  449. }
  450. if ((off & 3) && size > 2) {
  451. u16 val;
  452. pci_user_read_config_word(dev, off, &val);
  453. data[off - init_off] = val & 0xff;
  454. data[off - init_off + 1] = (val >> 8) & 0xff;
  455. off += 2;
  456. size -= 2;
  457. }
  458. while (size > 3) {
  459. u32 val;
  460. pci_user_read_config_dword(dev, off, &val);
  461. data[off - init_off] = val & 0xff;
  462. data[off - init_off + 1] = (val >> 8) & 0xff;
  463. data[off - init_off + 2] = (val >> 16) & 0xff;
  464. data[off - init_off + 3] = (val >> 24) & 0xff;
  465. off += 4;
  466. size -= 4;
  467. }
  468. if (size >= 2) {
  469. u16 val;
  470. pci_user_read_config_word(dev, off, &val);
  471. data[off - init_off] = val & 0xff;
  472. data[off - init_off + 1] = (val >> 8) & 0xff;
  473. off += 2;
  474. size -= 2;
  475. }
  476. if (size > 0) {
  477. u8 val;
  478. pci_user_read_config_byte(dev, off, &val);
  479. data[off - init_off] = val;
  480. off++;
  481. --size;
  482. }
  483. pci_config_pm_runtime_put(dev);
  484. return count;
  485. }
  486. static ssize_t
  487. pci_write_config(struct file* filp, struct kobject *kobj,
  488. struct bin_attribute *bin_attr,
  489. char *buf, loff_t off, size_t count)
  490. {
  491. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  492. unsigned int size = count;
  493. loff_t init_off = off;
  494. u8 *data = (u8*) buf;
  495. if (off > dev->cfg_size)
  496. return 0;
  497. if (off + count > dev->cfg_size) {
  498. size = dev->cfg_size - off;
  499. count = size;
  500. }
  501. pci_config_pm_runtime_get(dev);
  502. if ((off & 1) && size) {
  503. pci_user_write_config_byte(dev, off, data[off - init_off]);
  504. off++;
  505. size--;
  506. }
  507. if ((off & 3) && size > 2) {
  508. u16 val = data[off - init_off];
  509. val |= (u16) data[off - init_off + 1] << 8;
  510. pci_user_write_config_word(dev, off, val);
  511. off += 2;
  512. size -= 2;
  513. }
  514. while (size > 3) {
  515. u32 val = data[off - init_off];
  516. val |= (u32) data[off - init_off + 1] << 8;
  517. val |= (u32) data[off - init_off + 2] << 16;
  518. val |= (u32) data[off - init_off + 3] << 24;
  519. pci_user_write_config_dword(dev, off, val);
  520. off += 4;
  521. size -= 4;
  522. }
  523. if (size >= 2) {
  524. u16 val = data[off - init_off];
  525. val |= (u16) data[off - init_off + 1] << 8;
  526. pci_user_write_config_word(dev, off, val);
  527. off += 2;
  528. size -= 2;
  529. }
  530. if (size) {
  531. pci_user_write_config_byte(dev, off, data[off - init_off]);
  532. off++;
  533. --size;
  534. }
  535. pci_config_pm_runtime_put(dev);
  536. return count;
  537. }
  538. static ssize_t
  539. read_vpd_attr(struct file *filp, struct kobject *kobj,
  540. struct bin_attribute *bin_attr,
  541. char *buf, loff_t off, size_t count)
  542. {
  543. struct pci_dev *dev =
  544. to_pci_dev(container_of(kobj, struct device, kobj));
  545. if (off > bin_attr->size)
  546. count = 0;
  547. else if (count > bin_attr->size - off)
  548. count = bin_attr->size - off;
  549. return pci_read_vpd(dev, off, count, buf);
  550. }
  551. static ssize_t
  552. write_vpd_attr(struct file *filp, struct kobject *kobj,
  553. struct bin_attribute *bin_attr,
  554. char *buf, loff_t off, size_t count)
  555. {
  556. struct pci_dev *dev =
  557. to_pci_dev(container_of(kobj, struct device, kobj));
  558. if (off > bin_attr->size)
  559. count = 0;
  560. else if (count > bin_attr->size - off)
  561. count = bin_attr->size - off;
  562. return pci_write_vpd(dev, off, count, buf);
  563. }
  564. #ifdef HAVE_PCI_LEGACY
  565. /**
  566. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  567. * @filp: open sysfs file
  568. * @kobj: kobject corresponding to file to read from
  569. * @bin_attr: struct bin_attribute for this file
  570. * @buf: buffer to store results
  571. * @off: offset into legacy I/O port space
  572. * @count: number of bytes to read
  573. *
  574. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  575. * callback routine (pci_legacy_read).
  576. */
  577. static ssize_t
  578. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  579. struct bin_attribute *bin_attr,
  580. char *buf, loff_t off, size_t count)
  581. {
  582. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  583. struct device,
  584. kobj));
  585. /* Only support 1, 2 or 4 byte accesses */
  586. if (count != 1 && count != 2 && count != 4)
  587. return -EINVAL;
  588. return pci_legacy_read(bus, off, (u32 *)buf, count);
  589. }
  590. /**
  591. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  592. * @filp: open sysfs file
  593. * @kobj: kobject corresponding to file to read from
  594. * @bin_attr: struct bin_attribute for this file
  595. * @buf: buffer containing value to be written
  596. * @off: offset into legacy I/O port space
  597. * @count: number of bytes to write
  598. *
  599. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  600. * callback routine (pci_legacy_write).
  601. */
  602. static ssize_t
  603. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  604. struct bin_attribute *bin_attr,
  605. char *buf, loff_t off, size_t count)
  606. {
  607. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  608. struct device,
  609. kobj));
  610. /* Only support 1, 2 or 4 byte accesses */
  611. if (count != 1 && count != 2 && count != 4)
  612. return -EINVAL;
  613. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  614. }
  615. /**
  616. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  617. * @filp: open sysfs file
  618. * @kobj: kobject corresponding to device to be mapped
  619. * @attr: struct bin_attribute for this file
  620. * @vma: struct vm_area_struct passed to mmap
  621. *
  622. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  623. * legacy memory space (first meg of bus space) into application virtual
  624. * memory space.
  625. */
  626. static int
  627. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  628. struct bin_attribute *attr,
  629. struct vm_area_struct *vma)
  630. {
  631. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  632. struct device,
  633. kobj));
  634. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  635. }
  636. /**
  637. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  638. * @filp: open sysfs file
  639. * @kobj: kobject corresponding to device to be mapped
  640. * @attr: struct bin_attribute for this file
  641. * @vma: struct vm_area_struct passed to mmap
  642. *
  643. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  644. * legacy IO space (first meg of bus space) into application virtual
  645. * memory space. Returns -ENOSYS if the operation isn't supported
  646. */
  647. static int
  648. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  649. struct bin_attribute *attr,
  650. struct vm_area_struct *vma)
  651. {
  652. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  653. struct device,
  654. kobj));
  655. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  656. }
  657. /**
  658. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  659. * @b: bus to create files under
  660. * @mmap_type: I/O port or memory
  661. *
  662. * Stub implementation. Can be overridden by arch if necessary.
  663. */
  664. void __weak
  665. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  666. {
  667. return;
  668. }
  669. /**
  670. * pci_create_legacy_files - create legacy I/O port and memory files
  671. * @b: bus to create files under
  672. *
  673. * Some platforms allow access to legacy I/O port and ISA memory space on
  674. * a per-bus basis. This routine creates the files and ties them into
  675. * their associated read, write and mmap files from pci-sysfs.c
  676. *
  677. * On error unwind, but don't propagate the error to the caller
  678. * as it is ok to set up the PCI bus without these files.
  679. */
  680. void pci_create_legacy_files(struct pci_bus *b)
  681. {
  682. int error;
  683. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  684. GFP_ATOMIC);
  685. if (!b->legacy_io)
  686. goto kzalloc_err;
  687. sysfs_bin_attr_init(b->legacy_io);
  688. b->legacy_io->attr.name = "legacy_io";
  689. b->legacy_io->size = 0xffff;
  690. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  691. b->legacy_io->read = pci_read_legacy_io;
  692. b->legacy_io->write = pci_write_legacy_io;
  693. b->legacy_io->mmap = pci_mmap_legacy_io;
  694. pci_adjust_legacy_attr(b, pci_mmap_io);
  695. error = device_create_bin_file(&b->dev, b->legacy_io);
  696. if (error)
  697. goto legacy_io_err;
  698. /* Allocated above after the legacy_io struct */
  699. b->legacy_mem = b->legacy_io + 1;
  700. sysfs_bin_attr_init(b->legacy_mem);
  701. b->legacy_mem->attr.name = "legacy_mem";
  702. b->legacy_mem->size = 1024*1024;
  703. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  704. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  705. pci_adjust_legacy_attr(b, pci_mmap_mem);
  706. error = device_create_bin_file(&b->dev, b->legacy_mem);
  707. if (error)
  708. goto legacy_mem_err;
  709. return;
  710. legacy_mem_err:
  711. device_remove_bin_file(&b->dev, b->legacy_io);
  712. legacy_io_err:
  713. kfree(b->legacy_io);
  714. b->legacy_io = NULL;
  715. kzalloc_err:
  716. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  717. "and ISA memory resources to sysfs\n");
  718. return;
  719. }
  720. void pci_remove_legacy_files(struct pci_bus *b)
  721. {
  722. if (b->legacy_io) {
  723. device_remove_bin_file(&b->dev, b->legacy_io);
  724. device_remove_bin_file(&b->dev, b->legacy_mem);
  725. kfree(b->legacy_io); /* both are allocated here */
  726. }
  727. }
  728. #endif /* HAVE_PCI_LEGACY */
  729. #ifdef HAVE_PCI_MMAP
  730. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  731. enum pci_mmap_api mmap_api)
  732. {
  733. unsigned long nr, start, size, pci_start;
  734. if (pci_resource_len(pdev, resno) == 0)
  735. return 0;
  736. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  737. start = vma->vm_pgoff;
  738. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  739. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  740. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  741. if (start >= pci_start && start < pci_start + size &&
  742. start + nr <= pci_start + size)
  743. return 1;
  744. return 0;
  745. }
  746. /**
  747. * pci_mmap_resource - map a PCI resource into user memory space
  748. * @kobj: kobject for mapping
  749. * @attr: struct bin_attribute for the file being mapped
  750. * @vma: struct vm_area_struct passed into the mmap
  751. * @write_combine: 1 for write_combine mapping
  752. *
  753. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  754. */
  755. static int
  756. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  757. struct vm_area_struct *vma, int write_combine)
  758. {
  759. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  760. struct device, kobj));
  761. struct resource *res = attr->private;
  762. enum pci_mmap_state mmap_type;
  763. resource_size_t start, end;
  764. int i;
  765. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  766. if (res == &pdev->resource[i])
  767. break;
  768. if (i >= PCI_ROM_RESOURCE)
  769. return -ENODEV;
  770. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  771. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  772. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  773. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  774. pci_name(pdev), i,
  775. (u64)pci_resource_start(pdev, i),
  776. (u64)pci_resource_len(pdev, i));
  777. return -EINVAL;
  778. }
  779. /* pci_mmap_page_range() expects the same kind of entry as coming
  780. * from /proc/bus/pci/ which is a "user visible" value. If this is
  781. * different from the resource itself, arch will do necessary fixup.
  782. */
  783. pci_resource_to_user(pdev, i, res, &start, &end);
  784. vma->vm_pgoff += start >> PAGE_SHIFT;
  785. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  786. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  787. return -EINVAL;
  788. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  789. }
  790. static int
  791. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  792. struct bin_attribute *attr,
  793. struct vm_area_struct *vma)
  794. {
  795. return pci_mmap_resource(kobj, attr, vma, 0);
  796. }
  797. static int
  798. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  799. struct bin_attribute *attr,
  800. struct vm_area_struct *vma)
  801. {
  802. return pci_mmap_resource(kobj, attr, vma, 1);
  803. }
  804. static ssize_t
  805. pci_resource_io(struct file *filp, struct kobject *kobj,
  806. struct bin_attribute *attr, char *buf,
  807. loff_t off, size_t count, bool write)
  808. {
  809. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  810. struct device, kobj));
  811. struct resource *res = attr->private;
  812. unsigned long port = off;
  813. int i;
  814. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  815. if (res == &pdev->resource[i])
  816. break;
  817. if (i >= PCI_ROM_RESOURCE)
  818. return -ENODEV;
  819. port += pci_resource_start(pdev, i);
  820. if (port > pci_resource_end(pdev, i))
  821. return 0;
  822. if (port + count - 1 > pci_resource_end(pdev, i))
  823. return -EINVAL;
  824. switch (count) {
  825. case 1:
  826. if (write)
  827. outb(*(u8 *)buf, port);
  828. else
  829. *(u8 *)buf = inb(port);
  830. return 1;
  831. case 2:
  832. if (write)
  833. outw(*(u16 *)buf, port);
  834. else
  835. *(u16 *)buf = inw(port);
  836. return 2;
  837. case 4:
  838. if (write)
  839. outl(*(u32 *)buf, port);
  840. else
  841. *(u32 *)buf = inl(port);
  842. return 4;
  843. }
  844. return -EINVAL;
  845. }
  846. static ssize_t
  847. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  848. struct bin_attribute *attr, char *buf,
  849. loff_t off, size_t count)
  850. {
  851. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  852. }
  853. static ssize_t
  854. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  855. struct bin_attribute *attr, char *buf,
  856. loff_t off, size_t count)
  857. {
  858. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  859. }
  860. /**
  861. * pci_remove_resource_files - cleanup resource files
  862. * @pdev: dev to cleanup
  863. *
  864. * If we created resource files for @pdev, remove them from sysfs and
  865. * free their resources.
  866. */
  867. static void
  868. pci_remove_resource_files(struct pci_dev *pdev)
  869. {
  870. int i;
  871. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  872. struct bin_attribute *res_attr;
  873. res_attr = pdev->res_attr[i];
  874. if (res_attr) {
  875. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  876. kfree(res_attr);
  877. }
  878. res_attr = pdev->res_attr_wc[i];
  879. if (res_attr) {
  880. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  881. kfree(res_attr);
  882. }
  883. }
  884. }
  885. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  886. {
  887. /* allocate attribute structure, piggyback attribute name */
  888. int name_len = write_combine ? 13 : 10;
  889. struct bin_attribute *res_attr;
  890. int retval;
  891. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  892. if (res_attr) {
  893. char *res_attr_name = (char *)(res_attr + 1);
  894. sysfs_bin_attr_init(res_attr);
  895. if (write_combine) {
  896. pdev->res_attr_wc[num] = res_attr;
  897. sprintf(res_attr_name, "resource%d_wc", num);
  898. res_attr->mmap = pci_mmap_resource_wc;
  899. } else {
  900. pdev->res_attr[num] = res_attr;
  901. sprintf(res_attr_name, "resource%d", num);
  902. res_attr->mmap = pci_mmap_resource_uc;
  903. }
  904. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  905. res_attr->read = pci_read_resource_io;
  906. res_attr->write = pci_write_resource_io;
  907. }
  908. res_attr->attr.name = res_attr_name;
  909. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  910. res_attr->size = pci_resource_len(pdev, num);
  911. res_attr->private = &pdev->resource[num];
  912. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  913. } else
  914. retval = -ENOMEM;
  915. return retval;
  916. }
  917. /**
  918. * pci_create_resource_files - create resource files in sysfs for @dev
  919. * @pdev: dev in question
  920. *
  921. * Walk the resources in @pdev creating files for each resource available.
  922. */
  923. static int pci_create_resource_files(struct pci_dev *pdev)
  924. {
  925. int i;
  926. int retval;
  927. /* Expose the PCI resources from this device as files */
  928. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  929. /* skip empty resources */
  930. if (!pci_resource_len(pdev, i))
  931. continue;
  932. retval = pci_create_attr(pdev, i, 0);
  933. /* for prefetchable resources, create a WC mappable file */
  934. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  935. retval = pci_create_attr(pdev, i, 1);
  936. if (retval) {
  937. pci_remove_resource_files(pdev);
  938. return retval;
  939. }
  940. }
  941. return 0;
  942. }
  943. #else /* !HAVE_PCI_MMAP */
  944. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  945. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  946. #endif /* HAVE_PCI_MMAP */
  947. /**
  948. * pci_write_rom - used to enable access to the PCI ROM display
  949. * @filp: sysfs file
  950. * @kobj: kernel object handle
  951. * @bin_attr: struct bin_attribute for this file
  952. * @buf: user input
  953. * @off: file offset
  954. * @count: number of byte in input
  955. *
  956. * writing anything except 0 enables it
  957. */
  958. static ssize_t
  959. pci_write_rom(struct file *filp, struct kobject *kobj,
  960. struct bin_attribute *bin_attr,
  961. char *buf, loff_t off, size_t count)
  962. {
  963. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  964. if ((off == 0) && (*buf == '0') && (count == 2))
  965. pdev->rom_attr_enabled = 0;
  966. else
  967. pdev->rom_attr_enabled = 1;
  968. return count;
  969. }
  970. /**
  971. * pci_read_rom - read a PCI ROM
  972. * @filp: sysfs file
  973. * @kobj: kernel object handle
  974. * @bin_attr: struct bin_attribute for this file
  975. * @buf: where to put the data we read from the ROM
  976. * @off: file offset
  977. * @count: number of bytes to read
  978. *
  979. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  980. * device corresponding to @kobj.
  981. */
  982. static ssize_t
  983. pci_read_rom(struct file *filp, struct kobject *kobj,
  984. struct bin_attribute *bin_attr,
  985. char *buf, loff_t off, size_t count)
  986. {
  987. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  988. void __iomem *rom;
  989. size_t size;
  990. if (!pdev->rom_attr_enabled)
  991. return -EINVAL;
  992. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  993. if (!rom || !size)
  994. return -EIO;
  995. if (off >= size)
  996. count = 0;
  997. else {
  998. if (off + count > size)
  999. count = size - off;
  1000. memcpy_fromio(buf, rom + off, count);
  1001. }
  1002. pci_unmap_rom(pdev, rom);
  1003. return count;
  1004. }
  1005. static struct bin_attribute pci_config_attr = {
  1006. .attr = {
  1007. .name = "config",
  1008. .mode = S_IRUGO | S_IWUSR,
  1009. },
  1010. .size = PCI_CFG_SPACE_SIZE,
  1011. .read = pci_read_config,
  1012. .write = pci_write_config,
  1013. };
  1014. static struct bin_attribute pcie_config_attr = {
  1015. .attr = {
  1016. .name = "config",
  1017. .mode = S_IRUGO | S_IWUSR,
  1018. },
  1019. .size = PCI_CFG_SPACE_EXP_SIZE,
  1020. .read = pci_read_config,
  1021. .write = pci_write_config,
  1022. };
  1023. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1024. {
  1025. return 0;
  1026. }
  1027. static ssize_t reset_store(struct device *dev,
  1028. struct device_attribute *attr, const char *buf,
  1029. size_t count)
  1030. {
  1031. struct pci_dev *pdev = to_pci_dev(dev);
  1032. unsigned long val;
  1033. ssize_t result = strict_strtoul(buf, 0, &val);
  1034. if (result < 0)
  1035. return result;
  1036. if (val != 1)
  1037. return -EINVAL;
  1038. result = pci_reset_function(pdev);
  1039. if (result < 0)
  1040. return result;
  1041. return count;
  1042. }
  1043. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1044. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1045. {
  1046. int retval;
  1047. struct bin_attribute *attr;
  1048. /* If the device has VPD, try to expose it in sysfs. */
  1049. if (dev->vpd) {
  1050. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1051. if (!attr)
  1052. return -ENOMEM;
  1053. sysfs_bin_attr_init(attr);
  1054. attr->size = dev->vpd->len;
  1055. attr->attr.name = "vpd";
  1056. attr->attr.mode = S_IRUSR | S_IWUSR;
  1057. attr->read = read_vpd_attr;
  1058. attr->write = write_vpd_attr;
  1059. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1060. if (retval) {
  1061. kfree(attr);
  1062. return retval;
  1063. }
  1064. dev->vpd->attr = attr;
  1065. }
  1066. /* Active State Power Management */
  1067. pcie_aspm_create_sysfs_dev_files(dev);
  1068. if (!pci_probe_reset_function(dev)) {
  1069. retval = device_create_file(&dev->dev, &reset_attr);
  1070. if (retval)
  1071. goto error;
  1072. dev->reset_fn = 1;
  1073. }
  1074. return 0;
  1075. error:
  1076. pcie_aspm_remove_sysfs_dev_files(dev);
  1077. if (dev->vpd && dev->vpd->attr) {
  1078. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1079. kfree(dev->vpd->attr);
  1080. }
  1081. return retval;
  1082. }
  1083. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1084. {
  1085. int retval;
  1086. int rom_size = 0;
  1087. struct bin_attribute *attr;
  1088. if (!sysfs_initialized)
  1089. return -EACCES;
  1090. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1091. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1092. else
  1093. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1094. if (retval)
  1095. goto err;
  1096. retval = pci_create_resource_files(pdev);
  1097. if (retval)
  1098. goto err_config_file;
  1099. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1100. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1101. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1102. rom_size = 0x20000;
  1103. /* If the device has a ROM, try to expose it in sysfs. */
  1104. if (rom_size) {
  1105. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1106. if (!attr) {
  1107. retval = -ENOMEM;
  1108. goto err_resource_files;
  1109. }
  1110. sysfs_bin_attr_init(attr);
  1111. attr->size = rom_size;
  1112. attr->attr.name = "rom";
  1113. attr->attr.mode = S_IRUSR | S_IWUSR;
  1114. attr->read = pci_read_rom;
  1115. attr->write = pci_write_rom;
  1116. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1117. if (retval) {
  1118. kfree(attr);
  1119. goto err_resource_files;
  1120. }
  1121. pdev->rom_attr = attr;
  1122. }
  1123. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1124. retval = device_create_file(&pdev->dev, &vga_attr);
  1125. if (retval)
  1126. goto err_rom_file;
  1127. }
  1128. /* add platform-specific attributes */
  1129. retval = pcibios_add_platform_entries(pdev);
  1130. if (retval)
  1131. goto err_vga_file;
  1132. /* add sysfs entries for various capabilities */
  1133. retval = pci_create_capabilities_sysfs(pdev);
  1134. if (retval)
  1135. goto err_vga_file;
  1136. pci_create_firmware_label_files(pdev);
  1137. return 0;
  1138. err_vga_file:
  1139. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  1140. device_remove_file(&pdev->dev, &vga_attr);
  1141. err_rom_file:
  1142. if (rom_size) {
  1143. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1144. kfree(pdev->rom_attr);
  1145. pdev->rom_attr = NULL;
  1146. }
  1147. err_resource_files:
  1148. pci_remove_resource_files(pdev);
  1149. err_config_file:
  1150. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1151. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1152. else
  1153. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1154. err:
  1155. return retval;
  1156. }
  1157. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1158. {
  1159. if (dev->vpd && dev->vpd->attr) {
  1160. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1161. kfree(dev->vpd->attr);
  1162. }
  1163. pcie_aspm_remove_sysfs_dev_files(dev);
  1164. if (dev->reset_fn) {
  1165. device_remove_file(&dev->dev, &reset_attr);
  1166. dev->reset_fn = 0;
  1167. }
  1168. }
  1169. /**
  1170. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1171. * @pdev: device whose entries we should free
  1172. *
  1173. * Cleanup when @pdev is removed from sysfs.
  1174. */
  1175. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1176. {
  1177. int rom_size = 0;
  1178. if (!sysfs_initialized)
  1179. return;
  1180. pci_remove_capabilities_sysfs(pdev);
  1181. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1182. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1183. else
  1184. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1185. pci_remove_resource_files(pdev);
  1186. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1187. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1188. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1189. rom_size = 0x20000;
  1190. if (rom_size && pdev->rom_attr) {
  1191. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1192. kfree(pdev->rom_attr);
  1193. }
  1194. pci_remove_firmware_label_files(pdev);
  1195. }
  1196. static int __init pci_sysfs_init(void)
  1197. {
  1198. struct pci_dev *pdev = NULL;
  1199. int retval;
  1200. sysfs_initialized = 1;
  1201. for_each_pci_dev(pdev) {
  1202. retval = pci_create_sysfs_dev_files(pdev);
  1203. if (retval) {
  1204. pci_dev_put(pdev);
  1205. return retval;
  1206. }
  1207. }
  1208. return 0;
  1209. }
  1210. late_initcall(pci_sysfs_init);