setup_64.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605
  1. /*
  2. *
  3. * Common boot and setup code.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/config.h>
  14. #include <linux/module.h>
  15. #include <linux/string.h>
  16. #include <linux/sched.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/reboot.h>
  20. #include <linux/delay.h>
  21. #include <linux/initrd.h>
  22. #include <linux/ide.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/ioport.h>
  25. #include <linux/console.h>
  26. #include <linux/utsname.h>
  27. #include <linux/tty.h>
  28. #include <linux/root_dev.h>
  29. #include <linux/notifier.h>
  30. #include <linux/cpu.h>
  31. #include <linux/unistd.h>
  32. #include <linux/serial.h>
  33. #include <linux/serial_8250.h>
  34. #include <linux/bootmem.h>
  35. #include <asm/io.h>
  36. #include <asm/kdump.h>
  37. #include <asm/prom.h>
  38. #include <asm/processor.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/smp.h>
  41. #include <asm/elf.h>
  42. #include <asm/machdep.h>
  43. #include <asm/paca.h>
  44. #include <asm/time.h>
  45. #include <asm/cputable.h>
  46. #include <asm/sections.h>
  47. #include <asm/btext.h>
  48. #include <asm/nvram.h>
  49. #include <asm/setup.h>
  50. #include <asm/system.h>
  51. #include <asm/rtas.h>
  52. #include <asm/iommu.h>
  53. #include <asm/serial.h>
  54. #include <asm/cache.h>
  55. #include <asm/page.h>
  56. #include <asm/mmu.h>
  57. #include <asm/lmb.h>
  58. #include <asm/iseries/it_lp_naca.h>
  59. #include <asm/firmware.h>
  60. #include <asm/xmon.h>
  61. #include <asm/udbg.h>
  62. #include <asm/kexec.h>
  63. #include "setup.h"
  64. #ifdef DEBUG
  65. #define DBG(fmt...) udbg_printf(fmt)
  66. #else
  67. #define DBG(fmt...)
  68. #endif
  69. int have_of = 1;
  70. int boot_cpuid = 0;
  71. dev_t boot_dev;
  72. u64 ppc64_pft_size;
  73. /* Pick defaults since we might want to patch instructions
  74. * before we've read this from the device tree.
  75. */
  76. struct ppc64_caches ppc64_caches = {
  77. .dline_size = 0x80,
  78. .log_dline_size = 7,
  79. .iline_size = 0x80,
  80. .log_iline_size = 7
  81. };
  82. EXPORT_SYMBOL_GPL(ppc64_caches);
  83. /*
  84. * These are used in binfmt_elf.c to put aux entries on the stack
  85. * for each elf executable being started.
  86. */
  87. int dcache_bsize;
  88. int icache_bsize;
  89. int ucache_bsize;
  90. #ifdef CONFIG_MAGIC_SYSRQ
  91. unsigned long SYSRQ_KEY;
  92. #endif /* CONFIG_MAGIC_SYSRQ */
  93. #ifdef CONFIG_SMP
  94. static int smt_enabled_cmdline;
  95. /* Look for ibm,smt-enabled OF option */
  96. static void check_smt_enabled(void)
  97. {
  98. struct device_node *dn;
  99. char *smt_option;
  100. /* Allow the command line to overrule the OF option */
  101. if (smt_enabled_cmdline)
  102. return;
  103. dn = of_find_node_by_path("/options");
  104. if (dn) {
  105. smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL);
  106. if (smt_option) {
  107. if (!strcmp(smt_option, "on"))
  108. smt_enabled_at_boot = 1;
  109. else if (!strcmp(smt_option, "off"))
  110. smt_enabled_at_boot = 0;
  111. }
  112. }
  113. }
  114. /* Look for smt-enabled= cmdline option */
  115. static int __init early_smt_enabled(char *p)
  116. {
  117. smt_enabled_cmdline = 1;
  118. if (!p)
  119. return 0;
  120. if (!strcmp(p, "on") || !strcmp(p, "1"))
  121. smt_enabled_at_boot = 1;
  122. else if (!strcmp(p, "off") || !strcmp(p, "0"))
  123. smt_enabled_at_boot = 0;
  124. return 0;
  125. }
  126. early_param("smt-enabled", early_smt_enabled);
  127. #else
  128. #define check_smt_enabled()
  129. #endif /* CONFIG_SMP */
  130. /*
  131. * Early initialization entry point. This is called by head.S
  132. * with MMU translation disabled. We rely on the "feature" of
  133. * the CPU that ignores the top 2 bits of the address in real
  134. * mode so we can access kernel globals normally provided we
  135. * only toy with things in the RMO region. From here, we do
  136. * some early parsing of the device-tree to setup out LMB
  137. * data structures, and allocate & initialize the hash table
  138. * and segment tables so we can start running with translation
  139. * enabled.
  140. *
  141. * It is this function which will call the probe() callback of
  142. * the various platform types and copy the matching one to the
  143. * global ppc_md structure. Your platform can eventually do
  144. * some very early initializations from the probe() routine, but
  145. * this is not recommended, be very careful as, for example, the
  146. * device-tree is not accessible via normal means at this point.
  147. */
  148. void __init early_setup(unsigned long dt_ptr)
  149. {
  150. /* Enable early debugging if any specified (see udbg.h) */
  151. udbg_early_init();
  152. DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
  153. /*
  154. * Do early initializations using the flattened device
  155. * tree, like retreiving the physical memory map or
  156. * calculating/retreiving the hash table size
  157. */
  158. early_init_devtree(__va(dt_ptr));
  159. /* Now we know the logical id of our boot cpu, setup the paca. */
  160. setup_boot_paca();
  161. /* Fix up paca fields required for the boot cpu */
  162. get_paca()->cpu_start = 1;
  163. get_paca()->stab_real = __pa((u64)&initial_stab);
  164. get_paca()->stab_addr = (u64)&initial_stab;
  165. /* Probe the machine type */
  166. probe_machine();
  167. #ifdef CONFIG_CRASH_DUMP
  168. kdump_setup();
  169. #endif
  170. DBG("Found, Initializing memory management...\n");
  171. /*
  172. * Initialize the MMU Hash table and create the linear mapping
  173. * of memory. Has to be done before stab/slb initialization as
  174. * this is currently where the page size encoding is obtained
  175. */
  176. htab_initialize();
  177. /*
  178. * Initialize stab / SLB management except on iSeries
  179. */
  180. if (cpu_has_feature(CPU_FTR_SLB))
  181. slb_initialize();
  182. else if (!firmware_has_feature(FW_FEATURE_ISERIES))
  183. stab_initialize(get_paca()->stab_real);
  184. DBG(" <- early_setup()\n");
  185. }
  186. #ifdef CONFIG_SMP
  187. void early_setup_secondary(void)
  188. {
  189. struct paca_struct *lpaca = get_paca();
  190. /* Mark enabled in PACA */
  191. lpaca->proc_enabled = 0;
  192. /* Initialize hash table for that CPU */
  193. htab_initialize_secondary();
  194. /* Initialize STAB/SLB. We use a virtual address as it works
  195. * in real mode on pSeries and we want a virutal address on
  196. * iSeries anyway
  197. */
  198. if (cpu_has_feature(CPU_FTR_SLB))
  199. slb_initialize();
  200. else
  201. stab_initialize(lpaca->stab_addr);
  202. }
  203. #endif /* CONFIG_SMP */
  204. #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
  205. void smp_release_cpus(void)
  206. {
  207. extern unsigned long __secondary_hold_spinloop;
  208. unsigned long *ptr;
  209. DBG(" -> smp_release_cpus()\n");
  210. /* All secondary cpus are spinning on a common spinloop, release them
  211. * all now so they can start to spin on their individual paca
  212. * spinloops. For non SMP kernels, the secondary cpus never get out
  213. * of the common spinloop.
  214. * This is useless but harmless on iSeries, secondaries are already
  215. * waiting on their paca spinloops. */
  216. ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
  217. - PHYSICAL_START);
  218. *ptr = 1;
  219. mb();
  220. DBG(" <- smp_release_cpus()\n");
  221. }
  222. #endif /* CONFIG_SMP || CONFIG_KEXEC */
  223. /*
  224. * Initialize some remaining members of the ppc64_caches and systemcfg
  225. * structures
  226. * (at least until we get rid of them completely). This is mostly some
  227. * cache informations about the CPU that will be used by cache flush
  228. * routines and/or provided to userland
  229. */
  230. static void __init initialize_cache_info(void)
  231. {
  232. struct device_node *np;
  233. unsigned long num_cpus = 0;
  234. DBG(" -> initialize_cache_info()\n");
  235. for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
  236. num_cpus += 1;
  237. /* We're assuming *all* of the CPUs have the same
  238. * d-cache and i-cache sizes... -Peter
  239. */
  240. if ( num_cpus == 1 ) {
  241. u32 *sizep, *lsizep;
  242. u32 size, lsize;
  243. const char *dc, *ic;
  244. /* Then read cache informations */
  245. if (machine_is(powermac)) {
  246. dc = "d-cache-block-size";
  247. ic = "i-cache-block-size";
  248. } else {
  249. dc = "d-cache-line-size";
  250. ic = "i-cache-line-size";
  251. }
  252. size = 0;
  253. lsize = cur_cpu_spec->dcache_bsize;
  254. sizep = (u32 *)get_property(np, "d-cache-size", NULL);
  255. if (sizep != NULL)
  256. size = *sizep;
  257. lsizep = (u32 *) get_property(np, dc, NULL);
  258. if (lsizep != NULL)
  259. lsize = *lsizep;
  260. if (sizep == 0 || lsizep == 0)
  261. DBG("Argh, can't find dcache properties ! "
  262. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  263. ppc64_caches.dsize = size;
  264. ppc64_caches.dline_size = lsize;
  265. ppc64_caches.log_dline_size = __ilog2(lsize);
  266. ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
  267. size = 0;
  268. lsize = cur_cpu_spec->icache_bsize;
  269. sizep = (u32 *)get_property(np, "i-cache-size", NULL);
  270. if (sizep != NULL)
  271. size = *sizep;
  272. lsizep = (u32 *)get_property(np, ic, NULL);
  273. if (lsizep != NULL)
  274. lsize = *lsizep;
  275. if (sizep == 0 || lsizep == 0)
  276. DBG("Argh, can't find icache properties ! "
  277. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  278. ppc64_caches.isize = size;
  279. ppc64_caches.iline_size = lsize;
  280. ppc64_caches.log_iline_size = __ilog2(lsize);
  281. ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
  282. }
  283. }
  284. DBG(" <- initialize_cache_info()\n");
  285. }
  286. /*
  287. * Do some initial setup of the system. The parameters are those which
  288. * were passed in from the bootloader.
  289. */
  290. void __init setup_system(void)
  291. {
  292. DBG(" -> setup_system()\n");
  293. /*
  294. * Unflatten the device-tree passed by prom_init or kexec
  295. */
  296. unflatten_device_tree();
  297. #ifdef CONFIG_KEXEC
  298. kexec_setup(); /* requires unflattened device tree. */
  299. #endif
  300. /*
  301. * Fill the ppc64_caches & systemcfg structures with informations
  302. * retrieved from the device-tree. Need to be called before
  303. * finish_device_tree() since the later requires some of the
  304. * informations filled up here to properly parse the interrupt
  305. * tree.
  306. * It also sets up the cache line sizes which allows to call
  307. * routines like flush_icache_range (used by the hash init
  308. * later on).
  309. */
  310. initialize_cache_info();
  311. #ifdef CONFIG_PPC_RTAS
  312. /*
  313. * Initialize RTAS if available
  314. */
  315. rtas_initialize();
  316. #endif /* CONFIG_PPC_RTAS */
  317. /*
  318. * Check if we have an initrd provided via the device-tree
  319. */
  320. check_for_initrd();
  321. /*
  322. * Do some platform specific early initializations, that includes
  323. * setting up the hash table pointers. It also sets up some interrupt-mapping
  324. * related options that will be used by finish_device_tree()
  325. */
  326. ppc_md.init_early();
  327. /*
  328. * We can discover serial ports now since the above did setup the
  329. * hash table management for us, thus ioremap works. We do that early
  330. * so that further code can be debugged
  331. */
  332. find_legacy_serial_ports();
  333. /*
  334. * "Finish" the device-tree, that is do the actual parsing of
  335. * some of the properties like the interrupt map
  336. */
  337. finish_device_tree();
  338. /*
  339. * Initialize xmon
  340. */
  341. #ifdef CONFIG_XMON_DEFAULT
  342. xmon_init(1);
  343. #endif
  344. /*
  345. * Register early console
  346. */
  347. register_early_udbg_console();
  348. if (do_early_xmon)
  349. debugger(NULL);
  350. check_smt_enabled();
  351. smp_setup_cpu_maps();
  352. #ifdef CONFIG_SMP
  353. /* Release secondary cpus out of their spinloops at 0x60 now that
  354. * we can map physical -> logical CPU ids
  355. */
  356. smp_release_cpus();
  357. #endif
  358. printk("Starting Linux PPC64 %s\n", system_utsname.version);
  359. printk("-----------------------------------------------------\n");
  360. printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
  361. printk("ppc64_interrupt_controller = 0x%ld\n",
  362. ppc64_interrupt_controller);
  363. printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
  364. printk("ppc64_caches.dcache_line_size = 0x%x\n",
  365. ppc64_caches.dline_size);
  366. printk("ppc64_caches.icache_line_size = 0x%x\n",
  367. ppc64_caches.iline_size);
  368. printk("htab_address = 0x%p\n", htab_address);
  369. printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
  370. #if PHYSICAL_START > 0
  371. printk("physical_start = 0x%x\n", PHYSICAL_START);
  372. #endif
  373. printk("-----------------------------------------------------\n");
  374. DBG(" <- setup_system()\n");
  375. }
  376. #ifdef CONFIG_IRQSTACKS
  377. static void __init irqstack_early_init(void)
  378. {
  379. unsigned int i;
  380. /*
  381. * interrupt stacks must be under 256MB, we cannot afford to take
  382. * SLB misses on them.
  383. */
  384. for_each_possible_cpu(i) {
  385. softirq_ctx[i] = (struct thread_info *)
  386. __va(lmb_alloc_base(THREAD_SIZE,
  387. THREAD_SIZE, 0x10000000));
  388. hardirq_ctx[i] = (struct thread_info *)
  389. __va(lmb_alloc_base(THREAD_SIZE,
  390. THREAD_SIZE, 0x10000000));
  391. }
  392. }
  393. #else
  394. #define irqstack_early_init()
  395. #endif
  396. /*
  397. * Stack space used when we detect a bad kernel stack pointer, and
  398. * early in SMP boots before relocation is enabled.
  399. */
  400. static void __init emergency_stack_init(void)
  401. {
  402. unsigned long limit;
  403. unsigned int i;
  404. /*
  405. * Emergency stacks must be under 256MB, we cannot afford to take
  406. * SLB misses on them. The ABI also requires them to be 128-byte
  407. * aligned.
  408. *
  409. * Since we use these as temporary stacks during secondary CPU
  410. * bringup, we need to get at them in real mode. This means they
  411. * must also be within the RMO region.
  412. */
  413. limit = min(0x10000000UL, lmb.rmo_size);
  414. for_each_possible_cpu(i)
  415. paca[i].emergency_sp =
  416. __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
  417. }
  418. /*
  419. * Called into from start_kernel, after lock_kernel has been called.
  420. * Initializes bootmem, which is unsed to manage page allocation until
  421. * mem_init is called.
  422. */
  423. void __init setup_arch(char **cmdline_p)
  424. {
  425. ppc64_boot_msg(0x12, "Setup Arch");
  426. *cmdline_p = cmd_line;
  427. /*
  428. * Set cache line size based on type of cpu as a default.
  429. * Systems with OF can look in the properties on the cpu node(s)
  430. * for a possibly more accurate value.
  431. */
  432. dcache_bsize = ppc64_caches.dline_size;
  433. icache_bsize = ppc64_caches.iline_size;
  434. /* reboot on panic */
  435. panic_timeout = 180;
  436. if (ppc_md.panic)
  437. setup_panic();
  438. init_mm.start_code = PAGE_OFFSET;
  439. init_mm.end_code = (unsigned long) _etext;
  440. init_mm.end_data = (unsigned long) _edata;
  441. init_mm.brk = klimit;
  442. irqstack_early_init();
  443. emergency_stack_init();
  444. stabs_alloc();
  445. /* set up the bootmem stuff with available memory */
  446. do_init_bootmem();
  447. sparse_init();
  448. #ifdef CONFIG_DUMMY_CONSOLE
  449. conswitchp = &dummy_con;
  450. #endif
  451. ppc_md.setup_arch();
  452. paging_init();
  453. ppc64_boot_msg(0x15, "Setup Done");
  454. }
  455. /* ToDo: do something useful if ppc_md is not yet setup. */
  456. #define PPC64_LINUX_FUNCTION 0x0f000000
  457. #define PPC64_IPL_MESSAGE 0xc0000000
  458. #define PPC64_TERM_MESSAGE 0xb0000000
  459. static void ppc64_do_msg(unsigned int src, const char *msg)
  460. {
  461. if (ppc_md.progress) {
  462. char buf[128];
  463. sprintf(buf, "%08X\n", src);
  464. ppc_md.progress(buf, 0);
  465. snprintf(buf, 128, "%s", msg);
  466. ppc_md.progress(buf, 0);
  467. }
  468. }
  469. /* Print a boot progress message. */
  470. void ppc64_boot_msg(unsigned int src, const char *msg)
  471. {
  472. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
  473. printk("[boot]%04x %s\n", src, msg);
  474. }
  475. /* Print a termination message (print only -- does not stop the kernel) */
  476. void ppc64_terminate_msg(unsigned int src, const char *msg)
  477. {
  478. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
  479. printk("[terminate]%04x %s\n", src, msg);
  480. }
  481. void cpu_die(void)
  482. {
  483. if (ppc_md.cpu_die)
  484. ppc_md.cpu_die();
  485. }
  486. #ifdef CONFIG_SMP
  487. void __init setup_per_cpu_areas(void)
  488. {
  489. int i;
  490. unsigned long size;
  491. char *ptr;
  492. /* Copy section for each CPU (we discard the original) */
  493. size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
  494. #ifdef CONFIG_MODULES
  495. if (size < PERCPU_ENOUGH_ROOM)
  496. size = PERCPU_ENOUGH_ROOM;
  497. #endif
  498. for_each_possible_cpu(i) {
  499. ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
  500. if (!ptr)
  501. panic("Cannot allocate cpu data for CPU %d\n", i);
  502. paca[i].data_offset = ptr - __per_cpu_start;
  503. memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
  504. }
  505. }
  506. #endif