em28xx-reg.h 1.9 KB

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  1. #define EM_GPIO_0 (1 << 0)
  2. #define EM_GPIO_1 (1 << 1)
  3. #define EM_GPIO_2 (1 << 2)
  4. #define EM_GPIO_3 (1 << 3)
  5. #define EM_GPIO_4 (1 << 4)
  6. #define EM_GPIO_5 (1 << 5)
  7. #define EM_GPIO_6 (1 << 6)
  8. #define EM_GPIO_7 (1 << 7)
  9. #define EM_GPO_0 (1 << 0)
  10. #define EM_GPO_1 (1 << 1)
  11. #define EM_GPO_2 (1 << 2)
  12. #define EM_GPO_3 (1 << 3)
  13. /* em2800 registers */
  14. #define EM2800_AUDIOSRC_REG 0x08
  15. /* em28xx registers */
  16. /* GPIO/GPO registers */
  17. #define EM_R04_GPO 0x04 /* em2880-em2883 only */
  18. #define EM_R08_GPIO 0x08 /* em2820 or upper */
  19. #define I2C_CLK_REG 0x06
  20. #define CHIPID_REG 0x0a
  21. #define USBSUSP_REG 0x0c /* */
  22. #define AUDIOSRC_REG 0x0e
  23. #define XCLK_REG 0x0f
  24. #define VINMODE_REG 0x10
  25. #define VINCTRL_REG 0x11
  26. #define VINENABLE_REG 0x12 /* */
  27. #define GAMMA_REG 0x14
  28. #define RGAIN_REG 0x15
  29. #define GGAIN_REG 0x16
  30. #define BGAIN_REG 0x17
  31. #define ROFFSET_REG 0x18
  32. #define GOFFSET_REG 0x19
  33. #define BOFFSET_REG 0x1a
  34. #define OFLOW_REG 0x1b
  35. #define HSTART_REG 0x1c
  36. #define VSTART_REG 0x1d
  37. #define CWIDTH_REG 0x1e
  38. #define CHEIGHT_REG 0x1f
  39. #define YGAIN_REG 0x20
  40. #define YOFFSET_REG 0x21
  41. #define UVGAIN_REG 0x22
  42. #define UOFFSET_REG 0x23
  43. #define VOFFSET_REG 0x24
  44. #define SHARPNESS_REG 0x25
  45. #define COMPR_REG 0x26
  46. #define OUTFMT_REG 0x27
  47. #define XMIN_REG 0x28
  48. #define XMAX_REG 0x29
  49. #define YMIN_REG 0x2a
  50. #define YMAX_REG 0x2b
  51. #define HSCALELOW_REG 0x30
  52. #define HSCALEHIGH_REG 0x31
  53. #define VSCALELOW_REG 0x32
  54. #define VSCALEHIGH_REG 0x33
  55. #define AC97LSB_REG 0x40
  56. #define AC97MSB_REG 0x41
  57. #define AC97ADDR_REG 0x42
  58. #define AC97BUSY_REG 0x43
  59. /* em202 registers */
  60. #define MASTER_AC97 0x02
  61. #define LINE_IN_AC97 0x10
  62. #define VIDEO_AC97 0x14
  63. /* register settings */
  64. #define EM2800_AUDIO_SRC_TUNER 0x0d
  65. #define EM2800_AUDIO_SRC_LINE 0x0c
  66. #define EM28XX_AUDIO_SRC_TUNER 0xc0
  67. #define EM28XX_AUDIO_SRC_LINE 0x80
  68. /* FIXME: Need to be populated with the other chip ID's */
  69. enum em28xx_chip_id {
  70. CHIP_ID_EM2883 = 36,
  71. };