async_tx.c 10 KB

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  1. /*
  2. * core routines for the asynchronous memory transfer/transform api
  3. *
  4. * Copyright © 2006, Intel Corporation.
  5. *
  6. * Dan Williams <dan.j.williams@intel.com>
  7. *
  8. * with architecture considerations by:
  9. * Neil Brown <neilb@suse.de>
  10. * Jeff Garzik <jeff@garzik.org>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms and conditions of the GNU General Public License,
  14. * version 2, as published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program; if not, write to the Free Software Foundation, Inc.,
  23. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24. *
  25. */
  26. #include <linux/rculist.h>
  27. #include <linux/kernel.h>
  28. #include <linux/async_tx.h>
  29. #ifdef CONFIG_DMA_ENGINE
  30. static enum dma_state_client
  31. dma_channel_add_remove(struct dma_client *client,
  32. struct dma_chan *chan, enum dma_state state);
  33. static struct dma_client async_tx_dma = {
  34. .event_callback = dma_channel_add_remove,
  35. /* .cap_mask == 0 defaults to all channels */
  36. };
  37. /**
  38. * async_tx_lock - protect modification of async_tx_master_list and serialize
  39. * rebalance operations
  40. */
  41. static DEFINE_SPINLOCK(async_tx_lock);
  42. static LIST_HEAD(async_tx_master_list);
  43. static void
  44. free_dma_chan_ref(struct rcu_head *rcu)
  45. {
  46. struct dma_chan_ref *ref;
  47. ref = container_of(rcu, struct dma_chan_ref, rcu);
  48. kfree(ref);
  49. }
  50. static void
  51. init_dma_chan_ref(struct dma_chan_ref *ref, struct dma_chan *chan)
  52. {
  53. INIT_LIST_HEAD(&ref->node);
  54. INIT_RCU_HEAD(&ref->rcu);
  55. ref->chan = chan;
  56. atomic_set(&ref->count, 0);
  57. }
  58. static enum dma_state_client
  59. dma_channel_add_remove(struct dma_client *client,
  60. struct dma_chan *chan, enum dma_state state)
  61. {
  62. unsigned long found, flags;
  63. struct dma_chan_ref *master_ref, *ref;
  64. enum dma_state_client ack = DMA_DUP; /* default: take no action */
  65. switch (state) {
  66. case DMA_RESOURCE_AVAILABLE:
  67. found = 0;
  68. rcu_read_lock();
  69. list_for_each_entry_rcu(ref, &async_tx_master_list, node)
  70. if (ref->chan == chan) {
  71. found = 1;
  72. break;
  73. }
  74. rcu_read_unlock();
  75. pr_debug("async_tx: dma resource available [%s]\n",
  76. found ? "old" : "new");
  77. if (!found)
  78. ack = DMA_ACK;
  79. else
  80. break;
  81. /* add the channel to the generic management list */
  82. master_ref = kmalloc(sizeof(*master_ref), GFP_KERNEL);
  83. if (master_ref) {
  84. init_dma_chan_ref(master_ref, chan);
  85. spin_lock_irqsave(&async_tx_lock, flags);
  86. list_add_tail_rcu(&master_ref->node,
  87. &async_tx_master_list);
  88. spin_unlock_irqrestore(&async_tx_lock,
  89. flags);
  90. } else {
  91. printk(KERN_WARNING "async_tx: unable to create"
  92. " new master entry in response to"
  93. " a DMA_RESOURCE_ADDED event"
  94. " (-ENOMEM)\n");
  95. return 0;
  96. }
  97. break;
  98. case DMA_RESOURCE_REMOVED:
  99. found = 0;
  100. spin_lock_irqsave(&async_tx_lock, flags);
  101. list_for_each_entry(ref, &async_tx_master_list, node)
  102. if (ref->chan == chan) {
  103. list_del_rcu(&ref->node);
  104. call_rcu(&ref->rcu, free_dma_chan_ref);
  105. found = 1;
  106. break;
  107. }
  108. spin_unlock_irqrestore(&async_tx_lock, flags);
  109. pr_debug("async_tx: dma resource removed [%s]\n",
  110. found ? "ours" : "not ours");
  111. if (found)
  112. ack = DMA_ACK;
  113. else
  114. break;
  115. break;
  116. case DMA_RESOURCE_SUSPEND:
  117. case DMA_RESOURCE_RESUME:
  118. printk(KERN_WARNING "async_tx: does not support dma channel"
  119. " suspend/resume\n");
  120. break;
  121. default:
  122. BUG();
  123. }
  124. return ack;
  125. }
  126. static int __init async_tx_init(void)
  127. {
  128. dma_async_client_register(&async_tx_dma);
  129. dma_async_client_chan_request(&async_tx_dma);
  130. printk(KERN_INFO "async_tx: api initialized (async)\n");
  131. return 0;
  132. }
  133. static void __exit async_tx_exit(void)
  134. {
  135. dma_async_client_unregister(&async_tx_dma);
  136. }
  137. /**
  138. * __async_tx_find_channel - find a channel to carry out the operation or let
  139. * the transaction execute synchronously
  140. * @depend_tx: transaction dependency
  141. * @tx_type: transaction type
  142. */
  143. struct dma_chan *
  144. __async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx,
  145. enum dma_transaction_type tx_type)
  146. {
  147. /* see if we can keep the chain on one channel */
  148. if (depend_tx &&
  149. dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
  150. return depend_tx->chan;
  151. return dma_find_channel(tx_type);
  152. }
  153. EXPORT_SYMBOL_GPL(__async_tx_find_channel);
  154. #else
  155. static int __init async_tx_init(void)
  156. {
  157. printk(KERN_INFO "async_tx: api initialized (sync-only)\n");
  158. return 0;
  159. }
  160. static void __exit async_tx_exit(void)
  161. {
  162. do { } while (0);
  163. }
  164. #endif
  165. /**
  166. * async_tx_channel_switch - queue an interrupt descriptor with a dependency
  167. * pre-attached.
  168. * @depend_tx: the operation that must finish before the new operation runs
  169. * @tx: the new operation
  170. */
  171. static void
  172. async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
  173. struct dma_async_tx_descriptor *tx)
  174. {
  175. struct dma_chan *chan;
  176. struct dma_device *device;
  177. struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
  178. /* first check to see if we can still append to depend_tx */
  179. spin_lock_bh(&depend_tx->lock);
  180. if (depend_tx->parent && depend_tx->chan == tx->chan) {
  181. tx->parent = depend_tx;
  182. depend_tx->next = tx;
  183. intr_tx = NULL;
  184. }
  185. spin_unlock_bh(&depend_tx->lock);
  186. if (!intr_tx)
  187. return;
  188. chan = depend_tx->chan;
  189. device = chan->device;
  190. /* see if we can schedule an interrupt
  191. * otherwise poll for completion
  192. */
  193. if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  194. intr_tx = device->device_prep_dma_interrupt(chan, 0);
  195. else
  196. intr_tx = NULL;
  197. if (intr_tx) {
  198. intr_tx->callback = NULL;
  199. intr_tx->callback_param = NULL;
  200. tx->parent = intr_tx;
  201. /* safe to set ->next outside the lock since we know we are
  202. * not submitted yet
  203. */
  204. intr_tx->next = tx;
  205. /* check if we need to append */
  206. spin_lock_bh(&depend_tx->lock);
  207. if (depend_tx->parent) {
  208. intr_tx->parent = depend_tx;
  209. depend_tx->next = intr_tx;
  210. async_tx_ack(intr_tx);
  211. intr_tx = NULL;
  212. }
  213. spin_unlock_bh(&depend_tx->lock);
  214. if (intr_tx) {
  215. intr_tx->parent = NULL;
  216. intr_tx->tx_submit(intr_tx);
  217. async_tx_ack(intr_tx);
  218. }
  219. } else {
  220. if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
  221. panic("%s: DMA_ERROR waiting for depend_tx\n",
  222. __func__);
  223. tx->tx_submit(tx);
  224. }
  225. }
  226. /**
  227. * submit_disposition - while holding depend_tx->lock we must avoid submitting
  228. * new operations to prevent a circular locking dependency with
  229. * drivers that already hold a channel lock when calling
  230. * async_tx_run_dependencies.
  231. * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
  232. * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
  233. * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
  234. */
  235. enum submit_disposition {
  236. ASYNC_TX_SUBMITTED,
  237. ASYNC_TX_CHANNEL_SWITCH,
  238. ASYNC_TX_DIRECT_SUBMIT,
  239. };
  240. void
  241. async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
  242. enum async_tx_flags flags, struct dma_async_tx_descriptor *depend_tx,
  243. dma_async_tx_callback cb_fn, void *cb_param)
  244. {
  245. tx->callback = cb_fn;
  246. tx->callback_param = cb_param;
  247. if (depend_tx) {
  248. enum submit_disposition s;
  249. /* sanity check the dependency chain:
  250. * 1/ if ack is already set then we cannot be sure
  251. * we are referring to the correct operation
  252. * 2/ dependencies are 1:1 i.e. two transactions can
  253. * not depend on the same parent
  254. */
  255. BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
  256. tx->parent);
  257. /* the lock prevents async_tx_run_dependencies from missing
  258. * the setting of ->next when ->parent != NULL
  259. */
  260. spin_lock_bh(&depend_tx->lock);
  261. if (depend_tx->parent) {
  262. /* we have a parent so we can not submit directly
  263. * if we are staying on the same channel: append
  264. * else: channel switch
  265. */
  266. if (depend_tx->chan == chan) {
  267. tx->parent = depend_tx;
  268. depend_tx->next = tx;
  269. s = ASYNC_TX_SUBMITTED;
  270. } else
  271. s = ASYNC_TX_CHANNEL_SWITCH;
  272. } else {
  273. /* we do not have a parent so we may be able to submit
  274. * directly if we are staying on the same channel
  275. */
  276. if (depend_tx->chan == chan)
  277. s = ASYNC_TX_DIRECT_SUBMIT;
  278. else
  279. s = ASYNC_TX_CHANNEL_SWITCH;
  280. }
  281. spin_unlock_bh(&depend_tx->lock);
  282. switch (s) {
  283. case ASYNC_TX_SUBMITTED:
  284. break;
  285. case ASYNC_TX_CHANNEL_SWITCH:
  286. async_tx_channel_switch(depend_tx, tx);
  287. break;
  288. case ASYNC_TX_DIRECT_SUBMIT:
  289. tx->parent = NULL;
  290. tx->tx_submit(tx);
  291. break;
  292. }
  293. } else {
  294. tx->parent = NULL;
  295. tx->tx_submit(tx);
  296. }
  297. if (flags & ASYNC_TX_ACK)
  298. async_tx_ack(tx);
  299. if (depend_tx && (flags & ASYNC_TX_DEP_ACK))
  300. async_tx_ack(depend_tx);
  301. }
  302. EXPORT_SYMBOL_GPL(async_tx_submit);
  303. /**
  304. * async_trigger_callback - schedules the callback function to be run after
  305. * any dependent operations have been completed.
  306. * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK
  307. * @depend_tx: 'callback' requires the completion of this transaction
  308. * @cb_fn: function to call after depend_tx completes
  309. * @cb_param: parameter to pass to the callback routine
  310. */
  311. struct dma_async_tx_descriptor *
  312. async_trigger_callback(enum async_tx_flags flags,
  313. struct dma_async_tx_descriptor *depend_tx,
  314. dma_async_tx_callback cb_fn, void *cb_param)
  315. {
  316. struct dma_chan *chan;
  317. struct dma_device *device;
  318. struct dma_async_tx_descriptor *tx;
  319. if (depend_tx) {
  320. chan = depend_tx->chan;
  321. device = chan->device;
  322. /* see if we can schedule an interrupt
  323. * otherwise poll for completion
  324. */
  325. if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  326. device = NULL;
  327. tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
  328. } else
  329. tx = NULL;
  330. if (tx) {
  331. pr_debug("%s: (async)\n", __func__);
  332. async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
  333. } else {
  334. pr_debug("%s: (sync)\n", __func__);
  335. /* wait for any prerequisite operations */
  336. async_tx_quiesce(&depend_tx);
  337. async_tx_sync_epilog(cb_fn, cb_param);
  338. }
  339. return tx;
  340. }
  341. EXPORT_SYMBOL_GPL(async_trigger_callback);
  342. /**
  343. * async_tx_quiesce - ensure tx is complete and freeable upon return
  344. * @tx - transaction to quiesce
  345. */
  346. void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
  347. {
  348. if (*tx) {
  349. /* if ack is already set then we cannot be sure
  350. * we are referring to the correct operation
  351. */
  352. BUG_ON(async_tx_test_ack(*tx));
  353. if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
  354. panic("DMA_ERROR waiting for transaction\n");
  355. async_tx_ack(*tx);
  356. *tx = NULL;
  357. }
  358. }
  359. EXPORT_SYMBOL_GPL(async_tx_quiesce);
  360. module_init(async_tx_init);
  361. module_exit(async_tx_exit);
  362. MODULE_AUTHOR("Intel Corporation");
  363. MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
  364. MODULE_LICENSE("GPL");