dm.c 47 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../base.h"
  31. #include "reg.h"
  32. #include "def.h"
  33. #include "phy.h"
  34. #include "dm.h"
  35. #include "fw.h"
  36. #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb
  37. struct dig_t de_digtable;
  38. static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
  39. 0x7f8001fe, /* 0, +6.0dB */
  40. 0x788001e2, /* 1, +5.5dB */
  41. 0x71c001c7, /* 2, +5.0dB */
  42. 0x6b8001ae, /* 3, +4.5dB */
  43. 0x65400195, /* 4, +4.0dB */
  44. 0x5fc0017f, /* 5, +3.5dB */
  45. 0x5a400169, /* 6, +3.0dB */
  46. 0x55400155, /* 7, +2.5dB */
  47. 0x50800142, /* 8, +2.0dB */
  48. 0x4c000130, /* 9, +1.5dB */
  49. 0x47c0011f, /* 10, +1.0dB */
  50. 0x43c0010f, /* 11, +0.5dB */
  51. 0x40000100, /* 12, +0dB */
  52. 0x3c8000f2, /* 13, -0.5dB */
  53. 0x390000e4, /* 14, -1.0dB */
  54. 0x35c000d7, /* 15, -1.5dB */
  55. 0x32c000cb, /* 16, -2.0dB */
  56. 0x300000c0, /* 17, -2.5dB */
  57. 0x2d4000b5, /* 18, -3.0dB */
  58. 0x2ac000ab, /* 19, -3.5dB */
  59. 0x288000a2, /* 20, -4.0dB */
  60. 0x26000098, /* 21, -4.5dB */
  61. 0x24000090, /* 22, -5.0dB */
  62. 0x22000088, /* 23, -5.5dB */
  63. 0x20000080, /* 24, -6.0dB */
  64. 0x1e400079, /* 25, -6.5dB */
  65. 0x1c800072, /* 26, -7.0dB */
  66. 0x1b00006c, /* 27. -7.5dB */
  67. 0x19800066, /* 28, -8.0dB */
  68. 0x18000060, /* 29, -8.5dB */
  69. 0x16c0005b, /* 30, -9.0dB */
  70. 0x15800056, /* 31, -9.5dB */
  71. 0x14400051, /* 32, -10.0dB */
  72. 0x1300004c, /* 33, -10.5dB */
  73. 0x12000048, /* 34, -11.0dB */
  74. 0x11000044, /* 35, -11.5dB */
  75. 0x10000040, /* 36, -12.0dB */
  76. 0x0f00003c, /* 37, -12.5dB */
  77. 0x0e400039, /* 38, -13.0dB */
  78. 0x0d800036, /* 39, -13.5dB */
  79. 0x0cc00033, /* 40, -14.0dB */
  80. 0x0c000030, /* 41, -14.5dB */
  81. 0x0b40002d, /* 42, -15.0dB */
  82. };
  83. static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  84. {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
  85. {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
  86. {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
  87. {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
  88. {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
  89. {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
  90. {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
  91. {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
  92. {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
  93. {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
  94. {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
  95. {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
  96. {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
  97. {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
  98. {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
  99. {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
  100. {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
  101. {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
  102. {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
  103. {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
  104. {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
  105. {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
  106. {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
  107. {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
  108. {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
  109. {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
  110. {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
  111. {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
  112. {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
  113. {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
  114. {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
  115. {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
  116. {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
  117. };
  118. static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
  119. {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
  120. {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
  121. {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
  122. {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
  123. {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
  124. {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
  125. {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
  126. {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
  127. {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
  128. {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
  129. {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
  130. {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
  131. {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
  132. {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
  133. {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
  134. {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
  135. {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
  136. {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
  137. {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
  138. {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
  139. {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
  140. {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
  141. {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
  142. {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
  143. {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
  144. {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
  145. {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
  146. {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
  147. {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
  148. {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
  149. {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
  150. {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
  151. {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
  152. };
  153. static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
  154. {
  155. de_digtable.dig_enable_flag = true;
  156. de_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
  157. de_digtable.cur_igvalue = 0x20;
  158. de_digtable.pre_igvalue = 0x0;
  159. de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
  160. de_digtable.presta_connectstate = DIG_STA_DISCONNECT;
  161. de_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT;
  162. de_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW;
  163. de_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH;
  164. de_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
  165. de_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
  166. de_digtable.rx_gain_range_max = DM_DIG_FA_UPPER;
  167. de_digtable.rx_gain_range_min = DM_DIG_FA_LOWER;
  168. de_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
  169. de_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX;
  170. de_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN;
  171. de_digtable.pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  172. de_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX;
  173. de_digtable.large_fa_hit = 0;
  174. de_digtable.recover_cnt = 0;
  175. de_digtable.forbidden_igi = DM_DIG_FA_LOWER;
  176. }
  177. static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
  178. {
  179. u32 ret_value;
  180. struct rtl_priv *rtlpriv = rtl_priv(hw);
  181. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  182. unsigned long flag = 0;
  183. /* hold ofdm counter */
  184. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
  185. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
  186. ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
  187. falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
  188. falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
  189. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
  190. falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
  191. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
  192. falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
  193. falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
  194. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
  195. falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
  196. falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
  197. falsealm_cnt->cnt_rate_illegal +
  198. falsealm_cnt->cnt_crc8_fail +
  199. falsealm_cnt->cnt_mcs_fail +
  200. falsealm_cnt->cnt_fast_fsync_fail +
  201. falsealm_cnt->cnt_sb_search_fail;
  202. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  203. /* hold cck counter */
  204. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  205. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
  206. falsealm_cnt->cnt_cck_fail = ret_value;
  207. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
  208. falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
  209. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  210. } else {
  211. falsealm_cnt->cnt_cck_fail = 0;
  212. }
  213. /* reset false alarm counter registers */
  214. falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
  215. falsealm_cnt->cnt_sb_search_fail +
  216. falsealm_cnt->cnt_parity_fail +
  217. falsealm_cnt->cnt_rate_illegal +
  218. falsealm_cnt->cnt_crc8_fail +
  219. falsealm_cnt->cnt_mcs_fail +
  220. falsealm_cnt->cnt_cck_fail;
  221. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
  222. /* update ofdm counter */
  223. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
  224. /* update page C counter */
  225. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
  226. /* update page D counter */
  227. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
  228. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  229. /* reset cck counter */
  230. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  231. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
  232. /* enable cck counter */
  233. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
  234. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  235. }
  236. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  237. "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
  238. falsealm_cnt->cnt_fast_fsync_fail,
  239. falsealm_cnt->cnt_sb_search_fail);
  240. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  241. "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
  242. falsealm_cnt->cnt_parity_fail,
  243. falsealm_cnt->cnt_rate_illegal,
  244. falsealm_cnt->cnt_crc8_fail,
  245. falsealm_cnt->cnt_mcs_fail);
  246. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  247. "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
  248. falsealm_cnt->cnt_ofdm_fail,
  249. falsealm_cnt->cnt_cck_fail,
  250. falsealm_cnt->cnt_all);
  251. }
  252. static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
  253. {
  254. struct rtl_priv *rtlpriv = rtl_priv(hw);
  255. struct rtl_mac *mac = rtl_mac(rtlpriv);
  256. /* Determine the minimum RSSI */
  257. if ((mac->link_state < MAC80211_LINKED) &&
  258. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  259. de_digtable.min_undecorated_pwdb_for_dm = 0;
  260. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  261. "Not connected to any\n");
  262. }
  263. if (mac->link_state >= MAC80211_LINKED) {
  264. if (mac->opmode == NL80211_IFTYPE_AP ||
  265. mac->opmode == NL80211_IFTYPE_ADHOC) {
  266. de_digtable.min_undecorated_pwdb_for_dm =
  267. rtlpriv->dm.UNDEC_SM_PWDB;
  268. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  269. "AP Client PWDB = 0x%lx\n",
  270. rtlpriv->dm.UNDEC_SM_PWDB);
  271. } else {
  272. de_digtable.min_undecorated_pwdb_for_dm =
  273. rtlpriv->dm.undecorated_smoothed_pwdb;
  274. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  275. "STA Default Port PWDB = 0x%x\n",
  276. de_digtable.min_undecorated_pwdb_for_dm);
  277. }
  278. } else {
  279. de_digtable.min_undecorated_pwdb_for_dm =
  280. rtlpriv->dm.UNDEC_SM_PWDB;
  281. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  282. "AP Ext Port or disconnect PWDB = 0x%x\n",
  283. de_digtable.min_undecorated_pwdb_for_dm);
  284. }
  285. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
  286. de_digtable.min_undecorated_pwdb_for_dm);
  287. }
  288. static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
  289. {
  290. struct rtl_priv *rtlpriv = rtl_priv(hw);
  291. unsigned long flag = 0;
  292. if (de_digtable.cursta_connectctate == DIG_STA_CONNECT) {
  293. if (de_digtable.pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  294. if (de_digtable.min_undecorated_pwdb_for_dm <= 25)
  295. de_digtable.cur_cck_pd_state =
  296. CCK_PD_STAGE_LOWRSSI;
  297. else
  298. de_digtable.cur_cck_pd_state =
  299. CCK_PD_STAGE_HIGHRSSI;
  300. } else {
  301. if (de_digtable.min_undecorated_pwdb_for_dm <= 20)
  302. de_digtable.cur_cck_pd_state =
  303. CCK_PD_STAGE_LOWRSSI;
  304. else
  305. de_digtable.cur_cck_pd_state =
  306. CCK_PD_STAGE_HIGHRSSI;
  307. }
  308. } else {
  309. de_digtable.cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  310. }
  311. if (de_digtable.pre_cck_pd_state != de_digtable.cur_cck_pd_state) {
  312. if (de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  313. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  314. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
  315. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  316. } else {
  317. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  318. rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
  319. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  320. }
  321. de_digtable.pre_cck_pd_state = de_digtable.cur_cck_pd_state;
  322. }
  323. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
  324. de_digtable.cursta_connectctate == DIG_STA_CONNECT ?
  325. "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
  326. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
  327. de_digtable.cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
  328. "Low RSSI " : "High RSSI ");
  329. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
  330. IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
  331. }
  332. void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
  333. {
  334. struct rtl_priv *rtlpriv = rtl_priv(hw);
  335. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  336. "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n",
  337. de_digtable.cur_igvalue, de_digtable.pre_igvalue,
  338. de_digtable.backoff_val);
  339. if (de_digtable.dig_enable_flag == false) {
  340. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
  341. de_digtable.pre_igvalue = 0x17;
  342. return;
  343. }
  344. if (de_digtable.pre_igvalue != de_digtable.cur_igvalue) {
  345. rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
  346. de_digtable.cur_igvalue);
  347. rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
  348. de_digtable.cur_igvalue);
  349. de_digtable.pre_igvalue = de_digtable.cur_igvalue;
  350. }
  351. }
  352. static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
  353. {
  354. if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
  355. (rtlpriv->mac80211.vendor == PEER_CISCO)) {
  356. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
  357. if (de_digtable.last_min_undecorated_pwdb_for_dm >= 50
  358. && de_digtable.min_undecorated_pwdb_for_dm < 50) {
  359. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
  360. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  361. "Early Mode Off\n");
  362. } else if (de_digtable.last_min_undecorated_pwdb_for_dm <= 55 &&
  363. de_digtable.min_undecorated_pwdb_for_dm > 55) {
  364. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  365. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  366. "Early Mode On\n");
  367. }
  368. } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
  369. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  370. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
  371. }
  372. }
  373. static void rtl92d_dm_dig(struct ieee80211_hw *hw)
  374. {
  375. struct rtl_priv *rtlpriv = rtl_priv(hw);
  376. u8 value_igi = de_digtable.cur_igvalue;
  377. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  378. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
  379. if (rtlpriv->rtlhal.earlymode_enable) {
  380. rtl92d_early_mode_enabled(rtlpriv);
  381. de_digtable.last_min_undecorated_pwdb_for_dm =
  382. de_digtable.min_undecorated_pwdb_for_dm;
  383. }
  384. if (!rtlpriv->dm.dm_initialgain_enable)
  385. return;
  386. /* because we will send data pkt when scanning
  387. * this will cause some ap like gear-3700 wep TP
  388. * lower if we retrun here, this is the diff of
  389. * mac80211 driver vs ieee80211 driver */
  390. /* if (rtlpriv->mac80211.act_scanning)
  391. * return; */
  392. /* Not STA mode return tmp */
  393. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  394. return;
  395. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
  396. /* Decide the current status and if modify initial gain or not */
  397. if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
  398. de_digtable.cursta_connectctate = DIG_STA_CONNECT;
  399. else
  400. de_digtable.cursta_connectctate = DIG_STA_DISCONNECT;
  401. /* adjust initial gain according to false alarm counter */
  402. if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
  403. value_igi--;
  404. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
  405. value_igi += 0;
  406. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
  407. value_igi++;
  408. else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
  409. value_igi += 2;
  410. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  411. "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
  412. de_digtable.large_fa_hit, de_digtable.forbidden_igi);
  413. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  414. "dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n",
  415. de_digtable.recover_cnt, de_digtable.rx_gain_range_min);
  416. /* deal with abnorally large false alarm */
  417. if (falsealm_cnt->cnt_all > 10000) {
  418. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  419. "dm_DIG(): Abnormally false alarm case\n");
  420. de_digtable.large_fa_hit++;
  421. if (de_digtable.forbidden_igi < de_digtable.cur_igvalue) {
  422. de_digtable.forbidden_igi = de_digtable.cur_igvalue;
  423. de_digtable.large_fa_hit = 1;
  424. }
  425. if (de_digtable.large_fa_hit >= 3) {
  426. if ((de_digtable.forbidden_igi + 1) > DM_DIG_MAX)
  427. de_digtable.rx_gain_range_min = DM_DIG_MAX;
  428. else
  429. de_digtable.rx_gain_range_min =
  430. (de_digtable.forbidden_igi + 1);
  431. de_digtable.recover_cnt = 3600; /* 3600=2hr */
  432. }
  433. } else {
  434. /* Recovery mechanism for IGI lower bound */
  435. if (de_digtable.recover_cnt != 0) {
  436. de_digtable.recover_cnt--;
  437. } else {
  438. if (de_digtable.large_fa_hit == 0) {
  439. if ((de_digtable.forbidden_igi - 1) <
  440. DM_DIG_FA_LOWER) {
  441. de_digtable.forbidden_igi =
  442. DM_DIG_FA_LOWER;
  443. de_digtable.rx_gain_range_min =
  444. DM_DIG_FA_LOWER;
  445. } else {
  446. de_digtable.forbidden_igi--;
  447. de_digtable.rx_gain_range_min =
  448. (de_digtable.forbidden_igi + 1);
  449. }
  450. } else if (de_digtable.large_fa_hit == 3) {
  451. de_digtable.large_fa_hit = 0;
  452. }
  453. }
  454. }
  455. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  456. "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
  457. de_digtable.large_fa_hit, de_digtable.forbidden_igi);
  458. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  459. "dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n",
  460. de_digtable.recover_cnt, de_digtable.rx_gain_range_min);
  461. if (value_igi > DM_DIG_MAX)
  462. value_igi = DM_DIG_MAX;
  463. else if (value_igi < de_digtable.rx_gain_range_min)
  464. value_igi = de_digtable.rx_gain_range_min;
  465. de_digtable.cur_igvalue = value_igi;
  466. rtl92d_dm_write_dig(hw);
  467. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
  468. rtl92d_dm_cck_packet_detection_thresh(hw);
  469. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
  470. }
  471. static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
  472. {
  473. struct rtl_priv *rtlpriv = rtl_priv(hw);
  474. rtlpriv->dm.dynamic_txpower_enable = true;
  475. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  476. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  477. }
  478. static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
  479. {
  480. struct rtl_priv *rtlpriv = rtl_priv(hw);
  481. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  482. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  483. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  484. long undecorated_smoothed_pwdb;
  485. if ((!rtlpriv->dm.dynamic_txpower_enable)
  486. || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
  487. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  488. return;
  489. }
  490. if ((mac->link_state < MAC80211_LINKED) &&
  491. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  492. RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
  493. "Not connected to any\n");
  494. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  495. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  496. return;
  497. }
  498. if (mac->link_state >= MAC80211_LINKED) {
  499. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  500. undecorated_smoothed_pwdb =
  501. rtlpriv->dm.UNDEC_SM_PWDB;
  502. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  503. "IBSS Client PWDB = 0x%lx\n",
  504. undecorated_smoothed_pwdb);
  505. } else {
  506. undecorated_smoothed_pwdb =
  507. rtlpriv->dm.undecorated_smoothed_pwdb;
  508. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  509. "STA Default Port PWDB = 0x%lx\n",
  510. undecorated_smoothed_pwdb);
  511. }
  512. } else {
  513. undecorated_smoothed_pwdb =
  514. rtlpriv->dm.UNDEC_SM_PWDB;
  515. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  516. "AP Ext Port PWDB = 0x%lx\n",
  517. undecorated_smoothed_pwdb);
  518. }
  519. if (rtlhal->current_bandtype == BAND_ON_5G) {
  520. if (undecorated_smoothed_pwdb >= 0x33) {
  521. rtlpriv->dm.dynamic_txhighpower_lvl =
  522. TXHIGHPWRLEVEL_LEVEL2;
  523. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  524. "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
  525. } else if ((undecorated_smoothed_pwdb < 0x33)
  526. && (undecorated_smoothed_pwdb >= 0x2b)) {
  527. rtlpriv->dm.dynamic_txhighpower_lvl =
  528. TXHIGHPWRLEVEL_LEVEL1;
  529. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  530. "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
  531. } else if (undecorated_smoothed_pwdb < 0x2b) {
  532. rtlpriv->dm.dynamic_txhighpower_lvl =
  533. TXHIGHPWRLEVEL_NORMAL;
  534. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  535. "5G:TxHighPwrLevel_Normal\n");
  536. }
  537. } else {
  538. if (undecorated_smoothed_pwdb >=
  539. TX_POWER_NEAR_FIELD_THRESH_LVL2) {
  540. rtlpriv->dm.dynamic_txhighpower_lvl =
  541. TXHIGHPWRLEVEL_LEVEL2;
  542. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  543. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
  544. } else
  545. if ((undecorated_smoothed_pwdb <
  546. (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
  547. && (undecorated_smoothed_pwdb >=
  548. TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
  549. rtlpriv->dm.dynamic_txhighpower_lvl =
  550. TXHIGHPWRLEVEL_LEVEL1;
  551. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  552. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
  553. } else if (undecorated_smoothed_pwdb <
  554. (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
  555. rtlpriv->dm.dynamic_txhighpower_lvl =
  556. TXHIGHPWRLEVEL_NORMAL;
  557. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  558. "TXHIGHPWRLEVEL_NORMAL\n");
  559. }
  560. }
  561. if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
  562. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  563. "PHY_SetTxPowerLevel8192S() Channel = %d\n",
  564. rtlphy->current_channel);
  565. rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
  566. }
  567. rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
  568. }
  569. static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
  570. {
  571. struct rtl_priv *rtlpriv = rtl_priv(hw);
  572. /* AP & ADHOC & MESH will return tmp */
  573. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  574. return;
  575. /* Indicate Rx signal strength to FW. */
  576. if (rtlpriv->dm.useramask) {
  577. u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb;
  578. temp <<= 16;
  579. temp |= 0x100;
  580. /* fw v12 cmdid 5:use max macid ,for nic ,
  581. * default macid is 0 ,max macid is 1 */
  582. rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
  583. } else {
  584. rtl_write_byte(rtlpriv, 0x4fe,
  585. (u8) rtlpriv->dm.undecorated_smoothed_pwdb);
  586. }
  587. }
  588. void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
  589. {
  590. struct rtl_priv *rtlpriv = rtl_priv(hw);
  591. rtlpriv->dm.current_turbo_edca = false;
  592. rtlpriv->dm.is_any_nonbepkts = false;
  593. rtlpriv->dm.is_cur_rdlstate = false;
  594. }
  595. static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
  596. {
  597. struct rtl_priv *rtlpriv = rtl_priv(hw);
  598. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  599. static u64 last_txok_cnt;
  600. static u64 last_rxok_cnt;
  601. u64 cur_txok_cnt;
  602. u64 cur_rxok_cnt;
  603. u32 edca_be_ul = 0x5ea42b;
  604. u32 edca_be_dl = 0x5ea42b;
  605. if (mac->link_state != MAC80211_LINKED) {
  606. rtlpriv->dm.current_turbo_edca = false;
  607. goto exit;
  608. }
  609. /* Enable BEQ TxOP limit configuration in wireless G-mode. */
  610. /* To check whether we shall force turn on TXOP configuration. */
  611. if ((!rtlpriv->dm.disable_framebursting) &&
  612. (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
  613. rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
  614. rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
  615. /* Force TxOP limit to 0x005e for UL. */
  616. if (!(edca_be_ul & 0xffff0000))
  617. edca_be_ul |= 0x005e0000;
  618. /* Force TxOP limit to 0x005e for DL. */
  619. if (!(edca_be_dl & 0xffff0000))
  620. edca_be_dl |= 0x005e0000;
  621. }
  622. if ((!rtlpriv->dm.is_any_nonbepkts) &&
  623. (!rtlpriv->dm.disable_framebursting)) {
  624. cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
  625. cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
  626. if (cur_rxok_cnt > 4 * cur_txok_cnt) {
  627. if (!rtlpriv->dm.is_cur_rdlstate ||
  628. !rtlpriv->dm.current_turbo_edca) {
  629. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  630. edca_be_dl);
  631. rtlpriv->dm.is_cur_rdlstate = true;
  632. }
  633. } else {
  634. if (rtlpriv->dm.is_cur_rdlstate ||
  635. !rtlpriv->dm.current_turbo_edca) {
  636. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  637. edca_be_ul);
  638. rtlpriv->dm.is_cur_rdlstate = false;
  639. }
  640. }
  641. rtlpriv->dm.current_turbo_edca = true;
  642. } else {
  643. if (rtlpriv->dm.current_turbo_edca) {
  644. u8 tmp = AC0_BE;
  645. rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
  646. (u8 *) (&tmp));
  647. rtlpriv->dm.current_turbo_edca = false;
  648. }
  649. }
  650. exit:
  651. rtlpriv->dm.is_any_nonbepkts = false;
  652. last_txok_cnt = rtlpriv->stats.txbytesunicast;
  653. last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
  654. }
  655. static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
  656. {
  657. struct rtl_priv *rtlpriv = rtl_priv(hw);
  658. u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
  659. 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
  660. 0x0a, 0x09, 0x08, 0x07, 0x06,
  661. 0x05, 0x04, 0x04, 0x03, 0x02
  662. };
  663. int i;
  664. u32 u4tmp;
  665. u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
  666. rtlpriv->dm.thermalvalue_rxgain)]) << 12;
  667. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  668. "===> Rx Gain %x\n", u4tmp);
  669. for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
  670. rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
  671. (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
  672. }
  673. static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
  674. u8 *cck_index_old)
  675. {
  676. struct rtl_priv *rtlpriv = rtl_priv(hw);
  677. int i;
  678. unsigned long flag = 0;
  679. long temp_cck;
  680. /* Query CCK default setting From 0xa24 */
  681. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  682. temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
  683. BMASKDWORD) & BMASKCCK;
  684. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  685. for (i = 0; i < CCK_TABLE_LENGTH; i++) {
  686. if (rtlpriv->dm.cck_inch14) {
  687. if (!memcmp((void *)&temp_cck,
  688. (void *)&cckswing_table_ch14[i][2], 4)) {
  689. *cck_index_old = (u8) i;
  690. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  691. "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
  692. RCCK0_TXFILTER2, temp_cck,
  693. *cck_index_old,
  694. rtlpriv->dm.cck_inch14);
  695. break;
  696. }
  697. } else {
  698. if (!memcmp((void *) &temp_cck,
  699. &cckswing_table_ch1ch13[i][2], 4)) {
  700. *cck_index_old = (u8) i;
  701. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  702. "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
  703. RCCK0_TXFILTER2, temp_cck,
  704. *cck_index_old,
  705. rtlpriv->dm.cck_inch14);
  706. break;
  707. }
  708. }
  709. }
  710. *temp_cckg = temp_cck;
  711. }
  712. static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
  713. bool *internal_pa, u8 thermalvalue, u8 delta,
  714. u8 rf, struct rtl_efuse *rtlefuse,
  715. struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
  716. u8 index_mapping[5][INDEX_MAPPING_NUM],
  717. u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
  718. {
  719. int i;
  720. u8 index;
  721. u8 offset = 0;
  722. for (i = 0; i < rf; i++) {
  723. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  724. rtlhal->interfaceindex == 1) /* MAC 1 5G */
  725. *internal_pa = rtlefuse->internal_pa_5g[1];
  726. else
  727. *internal_pa = rtlefuse->internal_pa_5g[i];
  728. if (*internal_pa) {
  729. if (rtlhal->interfaceindex == 1 || i == rf)
  730. offset = 4;
  731. else
  732. offset = 0;
  733. if (rtlphy->current_channel >= 100 &&
  734. rtlphy->current_channel <= 165)
  735. offset += 2;
  736. } else {
  737. if (rtlhal->interfaceindex == 1 || i == rf)
  738. offset = 2;
  739. else
  740. offset = 0;
  741. }
  742. if (thermalvalue > rtlefuse->eeprom_thermalmeter)
  743. offset++;
  744. if (*internal_pa) {
  745. if (delta > INDEX_MAPPING_NUM - 1)
  746. index = index_mapping_pa[offset]
  747. [INDEX_MAPPING_NUM - 1];
  748. else
  749. index =
  750. index_mapping_pa[offset][delta];
  751. } else {
  752. if (delta > INDEX_MAPPING_NUM - 1)
  753. index =
  754. index_mapping[offset][INDEX_MAPPING_NUM - 1];
  755. else
  756. index = index_mapping[offset][delta];
  757. }
  758. if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
  759. if (*internal_pa && thermalvalue > 0x12) {
  760. ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
  761. ((delta / 2) * 3 + (delta % 2));
  762. } else {
  763. ofdm_index[i] -= index;
  764. }
  765. } else {
  766. ofdm_index[i] += index;
  767. }
  768. }
  769. }
  770. static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
  771. struct ieee80211_hw *hw)
  772. {
  773. struct rtl_priv *rtlpriv = rtl_priv(hw);
  774. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  775. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  776. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  777. u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
  778. u8 offset, thermalvalue_avg_count = 0;
  779. u32 thermalvalue_avg = 0;
  780. bool internal_pa = false;
  781. long ele_a = 0, ele_d, temp_cck, val_x, value32;
  782. long val_y, ele_c = 0;
  783. u8 ofdm_index[2];
  784. u8 cck_index = 0;
  785. u8 ofdm_index_old[2];
  786. u8 cck_index_old = 0;
  787. u8 index;
  788. int i;
  789. bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
  790. u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
  791. u8 indexforchannel =
  792. rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
  793. u8 index_mapping[5][INDEX_MAPPING_NUM] = {
  794. /* 5G, path A/MAC 0, decrease power */
  795. {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  796. /* 5G, path A/MAC 0, increase power */
  797. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  798. /* 5G, path B/MAC 1, decrease power */
  799. {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  800. /* 5G, path B/MAC 1, increase power */
  801. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  802. /* 2.4G, for decreas power */
  803. {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
  804. };
  805. u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
  806. /* 5G, path A/MAC 0, ch36-64, decrease power */
  807. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  808. /* 5G, path A/MAC 0, ch36-64, increase power */
  809. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  810. /* 5G, path A/MAC 0, ch100-165, decrease power */
  811. {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
  812. /* 5G, path A/MAC 0, ch100-165, increase power */
  813. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  814. /* 5G, path B/MAC 1, ch36-64, decrease power */
  815. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  816. /* 5G, path B/MAC 1, ch36-64, increase power */
  817. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  818. /* 5G, path B/MAC 1, ch100-165, decrease power */
  819. {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
  820. /* 5G, path B/MAC 1, ch100-165, increase power */
  821. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  822. };
  823. rtlpriv->dm.txpower_trackinginit = true;
  824. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
  825. thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
  826. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  827. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
  828. thermalvalue,
  829. rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
  830. rtl92d_phy_ap_calibrate(hw, (thermalvalue -
  831. rtlefuse->eeprom_thermalmeter));
  832. if (is2t)
  833. rf = 2;
  834. else
  835. rf = 1;
  836. if (thermalvalue) {
  837. ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  838. BMASKDWORD) & BMASKOFDM_D;
  839. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  840. if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
  841. ofdm_index_old[0] = (u8) i;
  842. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  843. "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
  844. ROFDM0_XATxIQIMBALANCE,
  845. ele_d, ofdm_index_old[0]);
  846. break;
  847. }
  848. }
  849. if (is2t) {
  850. ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
  851. BMASKDWORD) & BMASKOFDM_D;
  852. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  853. if (ele_d ==
  854. (ofdmswing_table[i] & BMASKOFDM_D)) {
  855. ofdm_index_old[1] = (u8) i;
  856. RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
  857. DBG_LOUD,
  858. "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
  859. ROFDM0_XBTxIQIMBALANCE, ele_d,
  860. ofdm_index_old[1]);
  861. break;
  862. }
  863. }
  864. }
  865. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  866. rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
  867. } else {
  868. temp_cck = 0x090e1317;
  869. cck_index_old = 12;
  870. }
  871. if (!rtlpriv->dm.thermalvalue) {
  872. rtlpriv->dm.thermalvalue =
  873. rtlefuse->eeprom_thermalmeter;
  874. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  875. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  876. rtlpriv->dm.thermalvalue_rxgain =
  877. rtlefuse->eeprom_thermalmeter;
  878. for (i = 0; i < rf; i++)
  879. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  880. rtlpriv->dm.cck_index = cck_index_old;
  881. }
  882. if (rtlhal->reloadtxpowerindex) {
  883. for (i = 0; i < rf; i++)
  884. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  885. rtlpriv->dm.cck_index = cck_index_old;
  886. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  887. "reload ofdm index for band switch\n");
  888. }
  889. rtlpriv->dm.thermalvalue_avg
  890. [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
  891. rtlpriv->dm.thermalvalue_avg_index++;
  892. if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
  893. rtlpriv->dm.thermalvalue_avg_index = 0;
  894. for (i = 0; i < AVG_THERMAL_NUM; i++) {
  895. if (rtlpriv->dm.thermalvalue_avg[i]) {
  896. thermalvalue_avg +=
  897. rtlpriv->dm.thermalvalue_avg[i];
  898. thermalvalue_avg_count++;
  899. }
  900. }
  901. if (thermalvalue_avg_count)
  902. thermalvalue = (u8) (thermalvalue_avg /
  903. thermalvalue_avg_count);
  904. if (rtlhal->reloadtxpowerindex) {
  905. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  906. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  907. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  908. rtlhal->reloadtxpowerindex = false;
  909. rtlpriv->dm.done_txpower = false;
  910. } else if (rtlpriv->dm.done_txpower) {
  911. delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
  912. (thermalvalue - rtlpriv->dm.thermalvalue) :
  913. (rtlpriv->dm.thermalvalue - thermalvalue);
  914. } else {
  915. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  916. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  917. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  918. }
  919. delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
  920. (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
  921. (rtlpriv->dm.thermalvalue_lck - thermalvalue);
  922. delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
  923. (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
  924. (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
  925. delta_rxgain =
  926. (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
  927. (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
  928. (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
  929. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  930. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
  931. thermalvalue, rtlpriv->dm.thermalvalue,
  932. rtlefuse->eeprom_thermalmeter, delta, delta_lck,
  933. delta_iqk);
  934. if ((delta_lck > rtlefuse->delta_lck) &&
  935. (rtlefuse->delta_lck != 0)) {
  936. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  937. rtl92d_phy_lc_calibrate(hw);
  938. }
  939. if (delta > 0 && rtlpriv->dm.txpower_track_control) {
  940. rtlpriv->dm.done_txpower = true;
  941. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  942. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  943. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  944. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  945. offset = 4;
  946. if (delta > INDEX_MAPPING_NUM - 1)
  947. index = index_mapping[offset]
  948. [INDEX_MAPPING_NUM - 1];
  949. else
  950. index = index_mapping[offset][delta];
  951. if (thermalvalue > rtlpriv->dm.thermalvalue) {
  952. for (i = 0; i < rf; i++)
  953. ofdm_index[i] -= delta;
  954. cck_index -= delta;
  955. } else {
  956. for (i = 0; i < rf; i++)
  957. ofdm_index[i] += index;
  958. cck_index += index;
  959. }
  960. } else if (rtlhal->current_bandtype == BAND_ON_5G) {
  961. rtl92d_bandtype_5G(rtlhal, ofdm_index,
  962. &internal_pa, thermalvalue,
  963. delta, rf, rtlefuse, rtlpriv,
  964. rtlphy, index_mapping,
  965. index_mapping_internal_pa);
  966. }
  967. if (is2t) {
  968. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  969. "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
  970. rtlpriv->dm.ofdm_index[0],
  971. rtlpriv->dm.ofdm_index[1],
  972. rtlpriv->dm.cck_index);
  973. } else {
  974. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  975. "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
  976. rtlpriv->dm.ofdm_index[0],
  977. rtlpriv->dm.cck_index);
  978. }
  979. for (i = 0; i < rf; i++) {
  980. if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
  981. ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
  982. else if (ofdm_index[i] < ofdm_min_index)
  983. ofdm_index[i] = ofdm_min_index;
  984. }
  985. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  986. if (cck_index > CCK_TABLE_SIZE - 1) {
  987. cck_index = CCK_TABLE_SIZE - 1;
  988. } else if (internal_pa ||
  989. rtlhal->current_bandtype ==
  990. BAND_ON_2_4G) {
  991. if (ofdm_index[i] <
  992. ofdm_min_index_internal_pa)
  993. ofdm_index[i] =
  994. ofdm_min_index_internal_pa;
  995. } else if (cck_index < 0) {
  996. cck_index = 0;
  997. }
  998. }
  999. if (is2t) {
  1000. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1001. "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
  1002. ofdm_index[0], ofdm_index[1],
  1003. cck_index);
  1004. } else {
  1005. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1006. "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
  1007. ofdm_index[0], cck_index);
  1008. }
  1009. ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
  1010. 0xFFC00000) >> 22;
  1011. val_x = rtlphy->iqk_matrix_regsetting
  1012. [indexforchannel].value[0][0];
  1013. val_y = rtlphy->iqk_matrix_regsetting
  1014. [indexforchannel].value[0][1];
  1015. if (val_x != 0) {
  1016. if ((val_x & 0x00000200) != 0)
  1017. val_x = val_x | 0xFFFFFC00;
  1018. ele_a =
  1019. ((val_x * ele_d) >> 8) & 0x000003FF;
  1020. /* new element C = element D x Y */
  1021. if ((val_y & 0x00000200) != 0)
  1022. val_y = val_y | 0xFFFFFC00;
  1023. ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
  1024. /* wirte new elements A, C, D to regC80 and
  1025. * regC94, element B is always 0 */
  1026. value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
  1027. 16) | ele_a;
  1028. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1029. BMASKDWORD, value32);
  1030. value32 = (ele_c & 0x000003C0) >> 6;
  1031. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1032. value32);
  1033. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1034. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
  1035. value32);
  1036. } else {
  1037. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1038. BMASKDWORD,
  1039. ofdmswing_table
  1040. [(u8)ofdm_index[0]]);
  1041. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
  1042. 0x00);
  1043. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1044. BIT(24), 0x00);
  1045. }
  1046. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1047. "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
  1048. rtlhal->interfaceindex,
  1049. val_x, val_y, ele_a, ele_c, ele_d,
  1050. val_x, val_y);
  1051. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  1052. /* Adjust CCK according to IQK result */
  1053. if (!rtlpriv->dm.cck_inch14) {
  1054. rtl_write_byte(rtlpriv, 0xa22,
  1055. cckswing_table_ch1ch13
  1056. [(u8)cck_index][0]);
  1057. rtl_write_byte(rtlpriv, 0xa23,
  1058. cckswing_table_ch1ch13
  1059. [(u8)cck_index][1]);
  1060. rtl_write_byte(rtlpriv, 0xa24,
  1061. cckswing_table_ch1ch13
  1062. [(u8)cck_index][2]);
  1063. rtl_write_byte(rtlpriv, 0xa25,
  1064. cckswing_table_ch1ch13
  1065. [(u8)cck_index][3]);
  1066. rtl_write_byte(rtlpriv, 0xa26,
  1067. cckswing_table_ch1ch13
  1068. [(u8)cck_index][4]);
  1069. rtl_write_byte(rtlpriv, 0xa27,
  1070. cckswing_table_ch1ch13
  1071. [(u8)cck_index][5]);
  1072. rtl_write_byte(rtlpriv, 0xa28,
  1073. cckswing_table_ch1ch13
  1074. [(u8)cck_index][6]);
  1075. rtl_write_byte(rtlpriv, 0xa29,
  1076. cckswing_table_ch1ch13
  1077. [(u8)cck_index][7]);
  1078. } else {
  1079. rtl_write_byte(rtlpriv, 0xa22,
  1080. cckswing_table_ch14
  1081. [(u8)cck_index][0]);
  1082. rtl_write_byte(rtlpriv, 0xa23,
  1083. cckswing_table_ch14
  1084. [(u8)cck_index][1]);
  1085. rtl_write_byte(rtlpriv, 0xa24,
  1086. cckswing_table_ch14
  1087. [(u8)cck_index][2]);
  1088. rtl_write_byte(rtlpriv, 0xa25,
  1089. cckswing_table_ch14
  1090. [(u8)cck_index][3]);
  1091. rtl_write_byte(rtlpriv, 0xa26,
  1092. cckswing_table_ch14
  1093. [(u8)cck_index][4]);
  1094. rtl_write_byte(rtlpriv, 0xa27,
  1095. cckswing_table_ch14
  1096. [(u8)cck_index][5]);
  1097. rtl_write_byte(rtlpriv, 0xa28,
  1098. cckswing_table_ch14
  1099. [(u8)cck_index][6]);
  1100. rtl_write_byte(rtlpriv, 0xa29,
  1101. cckswing_table_ch14
  1102. [(u8)cck_index][7]);
  1103. }
  1104. }
  1105. if (is2t) {
  1106. ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
  1107. 0xFFC00000) >> 22;
  1108. val_x = rtlphy->iqk_matrix_regsetting
  1109. [indexforchannel].value[0][4];
  1110. val_y = rtlphy->iqk_matrix_regsetting
  1111. [indexforchannel].value[0][5];
  1112. if (val_x != 0) {
  1113. if ((val_x & 0x00000200) != 0)
  1114. /* consider minus */
  1115. val_x = val_x | 0xFFFFFC00;
  1116. ele_a = ((val_x * ele_d) >> 8) &
  1117. 0x000003FF;
  1118. /* new element C = element D x Y */
  1119. if ((val_y & 0x00000200) != 0)
  1120. val_y =
  1121. val_y | 0xFFFFFC00;
  1122. ele_c =
  1123. ((val_y *
  1124. ele_d) >> 8) & 0x00003FF;
  1125. /* write new elements A, C, D to regC88
  1126. * and regC9C, element B is always 0
  1127. */
  1128. value32 = (ele_d << 22) |
  1129. ((ele_c & 0x3F) << 16) |
  1130. ele_a;
  1131. rtl_set_bbreg(hw,
  1132. ROFDM0_XBTxIQIMBALANCE,
  1133. BMASKDWORD, value32);
  1134. value32 = (ele_c & 0x000003C0) >> 6;
  1135. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1136. BMASKH4BITS, value32);
  1137. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1138. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1139. BIT(28), value32);
  1140. } else {
  1141. rtl_set_bbreg(hw,
  1142. ROFDM0_XBTxIQIMBALANCE,
  1143. BMASKDWORD,
  1144. ofdmswing_table
  1145. [(u8) ofdm_index[1]]);
  1146. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1147. BMASKH4BITS, 0x00);
  1148. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1149. BIT(28), 0x00);
  1150. }
  1151. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1152. "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
  1153. val_x, val_y, ele_a, ele_c,
  1154. ele_d, val_x, val_y);
  1155. }
  1156. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1157. "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
  1158. rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
  1159. rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
  1160. rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
  1161. BRFREGOFFSETMASK));
  1162. }
  1163. if ((delta_iqk > rtlefuse->delta_iqk) &&
  1164. (rtlefuse->delta_iqk != 0)) {
  1165. rtl92d_phy_reset_iqk_result(hw);
  1166. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  1167. rtl92d_phy_iq_calibrate(hw);
  1168. }
  1169. if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
  1170. && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
  1171. rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
  1172. rtl92d_dm_rxgain_tracking_thermalmeter(hw);
  1173. }
  1174. if (rtlpriv->dm.txpower_track_control)
  1175. rtlpriv->dm.thermalvalue = thermalvalue;
  1176. }
  1177. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
  1178. }
  1179. static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
  1180. {
  1181. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1182. rtlpriv->dm.txpower_tracking = true;
  1183. rtlpriv->dm.txpower_trackinginit = false;
  1184. rtlpriv->dm.txpower_track_control = true;
  1185. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1186. "pMgntInfo->txpower_tracking = %d\n",
  1187. rtlpriv->dm.txpower_tracking);
  1188. }
  1189. void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
  1190. {
  1191. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1192. static u8 tm_trigger;
  1193. if (!rtlpriv->dm.txpower_tracking)
  1194. return;
  1195. if (!tm_trigger) {
  1196. rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
  1197. BIT(16), 0x03);
  1198. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1199. "Trigger 92S Thermal Meter!!\n");
  1200. tm_trigger = 1;
  1201. return;
  1202. } else {
  1203. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1204. "Schedule TxPowerTracking direct call!!\n");
  1205. rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
  1206. tm_trigger = 0;
  1207. }
  1208. }
  1209. void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
  1210. {
  1211. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1212. struct rate_adaptive *ra = &(rtlpriv->ra);
  1213. ra->ratr_state = DM_RATR_STA_INIT;
  1214. ra->pre_ratr_state = DM_RATR_STA_INIT;
  1215. if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
  1216. rtlpriv->dm.useramask = true;
  1217. else
  1218. rtlpriv->dm.useramask = false;
  1219. }
  1220. void rtl92d_dm_init(struct ieee80211_hw *hw)
  1221. {
  1222. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1223. rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
  1224. rtl92d_dm_diginit(hw);
  1225. rtl92d_dm_init_dynamic_txpower(hw);
  1226. rtl92d_dm_init_edca_turbo(hw);
  1227. rtl92d_dm_init_rate_adaptive_mask(hw);
  1228. rtl92d_dm_initialize_txpower_tracking(hw);
  1229. }
  1230. void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
  1231. {
  1232. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  1233. bool fw_current_inpsmode = false;
  1234. bool fwps_awake = true;
  1235. /* 1. RF is OFF. (No need to do DM.)
  1236. * 2. Fw is under power saving mode for FwLPS.
  1237. * (Prevent from SW/FW I/O racing.)
  1238. * 3. IPS workitem is scheduled. (Prevent from IPS sequence
  1239. * to be swapped with DM.
  1240. * 4. RFChangeInProgress is TRUE.
  1241. * (Prevent from broken by IPS/HW/SW Rf off.) */
  1242. if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
  1243. fwps_awake) && (!ppsc->rfchange_inprogress)) {
  1244. rtl92d_dm_pwdb_monitor(hw);
  1245. rtl92d_dm_false_alarm_counter_statistics(hw);
  1246. rtl92d_dm_find_minimum_rssi(hw);
  1247. rtl92d_dm_dig(hw);
  1248. /* rtl92d_dm_dynamic_bb_powersaving(hw); */
  1249. rtl92d_dm_dynamic_txpower(hw);
  1250. /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
  1251. /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
  1252. /* rtl92d_dm_interrupt_migration(hw); */
  1253. rtl92d_dm_check_edca_turbo(hw);
  1254. }
  1255. }