main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
  105. mode = ATH9K_PM_FULL_SLEEP;
  106. else if (sc->ps_enabled &&
  107. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  108. PS_WAIT_FOR_CAB |
  109. PS_WAIT_FOR_PSPOLL_DATA |
  110. PS_WAIT_FOR_TX_ACK)))
  111. mode = ATH9K_PM_NETWORK_SLEEP;
  112. else
  113. goto unlock;
  114. spin_lock(&common->cc_lock);
  115. ath_hw_cycle_counters_update(common);
  116. spin_unlock(&common->cc_lock);
  117. ath9k_hw_setpower(sc->sc_ah, mode);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath_start_ani(struct ath_common *common)
  122. {
  123. struct ath_hw *ah = common->ah;
  124. unsigned long timestamp = jiffies_to_msecs(jiffies);
  125. struct ath_softc *sc = (struct ath_softc *) common->priv;
  126. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  127. return;
  128. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  129. return;
  130. common->ani.longcal_timer = timestamp;
  131. common->ani.shortcal_timer = timestamp;
  132. common->ani.checkani_timer = timestamp;
  133. mod_timer(&common->ani.timer,
  134. jiffies +
  135. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  136. }
  137. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  138. {
  139. struct ath_hw *ah = sc->sc_ah;
  140. struct ath9k_channel *chan = &ah->channels[channel];
  141. struct survey_info *survey = &sc->survey[channel];
  142. if (chan->noisefloor) {
  143. survey->filled |= SURVEY_INFO_NOISE_DBM;
  144. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  145. }
  146. }
  147. /*
  148. * Updates the survey statistics and returns the busy time since last
  149. * update in %, if the measurement duration was long enough for the
  150. * result to be useful, -1 otherwise.
  151. */
  152. static int ath_update_survey_stats(struct ath_softc *sc)
  153. {
  154. struct ath_hw *ah = sc->sc_ah;
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. int pos = ah->curchan - &ah->channels[0];
  157. struct survey_info *survey = &sc->survey[pos];
  158. struct ath_cycle_counters *cc = &common->cc_survey;
  159. unsigned int div = common->clockrate * 1000;
  160. int ret = 0;
  161. if (!ah->curchan)
  162. return -1;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. if (cc->cycles < div)
  176. return -1;
  177. if (cc->cycles > 0)
  178. ret = cc->rx_busy * 100 / cc->cycles;
  179. memset(cc, 0, sizeof(*cc));
  180. ath_update_survey_nf(sc, pos);
  181. return ret;
  182. }
  183. static void __ath_cancel_work(struct ath_softc *sc)
  184. {
  185. cancel_work_sync(&sc->paprd_work);
  186. cancel_work_sync(&sc->hw_check_work);
  187. cancel_delayed_work_sync(&sc->tx_complete_work);
  188. cancel_delayed_work_sync(&sc->hw_pll_work);
  189. }
  190. static void ath_cancel_work(struct ath_softc *sc)
  191. {
  192. __ath_cancel_work(sc);
  193. cancel_work_sync(&sc->hw_reset_work);
  194. }
  195. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  196. {
  197. struct ath_hw *ah = sc->sc_ah;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. bool ret;
  200. ieee80211_stop_queues(sc->hw);
  201. sc->hw_busy_count = 0;
  202. del_timer_sync(&common->ani.timer);
  203. ath9k_debug_samp_bb_mac(sc);
  204. ath9k_hw_disable_interrupts(ah);
  205. ret = ath_drain_all_txq(sc, retry_tx);
  206. if (!ath_stoprecv(sc))
  207. ret = false;
  208. if (!flush) {
  209. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  210. ath_rx_tasklet(sc, 1, true);
  211. ath_rx_tasklet(sc, 1, false);
  212. } else {
  213. ath_flushrecv(sc);
  214. }
  215. return ret;
  216. }
  217. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  218. {
  219. struct ath_hw *ah = sc->sc_ah;
  220. struct ath_common *common = ath9k_hw_common(ah);
  221. if (ath_startrecv(sc) != 0) {
  222. ath_err(common, "Unable to restart recv logic\n");
  223. return false;
  224. }
  225. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  226. sc->config.txpowlimit, &sc->curtxpow);
  227. ath9k_hw_set_interrupts(ah);
  228. ath9k_hw_enable_interrupts(ah);
  229. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  230. if (sc->sc_flags & SC_OP_BEACONS)
  231. ath_set_beacon(sc);
  232. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  234. if (!common->disable_ani)
  235. ath_start_ani(common);
  236. }
  237. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
  238. struct ath_hw_antcomb_conf div_ant_conf;
  239. u8 lna_conf;
  240. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  241. if (sc->ant_rx == 1)
  242. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  243. else
  244. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  245. div_ant_conf.main_lna_conf = lna_conf;
  246. div_ant_conf.alt_lna_conf = lna_conf;
  247. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  248. }
  249. ieee80211_wake_queues(sc->hw);
  250. return true;
  251. }
  252. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  253. bool retry_tx)
  254. {
  255. struct ath_hw *ah = sc->sc_ah;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. struct ath9k_hw_cal_data *caldata = NULL;
  258. bool fastcc = true;
  259. bool flush = false;
  260. int r;
  261. __ath_cancel_work(sc);
  262. spin_lock_bh(&sc->sc_pcu_lock);
  263. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  264. fastcc = false;
  265. caldata = &sc->caldata;
  266. }
  267. if (!hchan) {
  268. fastcc = false;
  269. flush = true;
  270. hchan = ah->curchan;
  271. }
  272. if (fastcc && (ah->chip_fullsleep ||
  273. !ath9k_hw_check_alive(ah)))
  274. fastcc = false;
  275. if (!ath_prepare_reset(sc, retry_tx, flush))
  276. fastcc = false;
  277. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  278. hchan->channel, IS_CHAN_HT40(hchan), fastcc);
  279. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  280. if (r) {
  281. ath_err(common,
  282. "Unable to reset channel, reset status %d\n", r);
  283. goto out;
  284. }
  285. if (!ath_complete_reset(sc, true))
  286. r = -EIO;
  287. out:
  288. spin_unlock_bh(&sc->sc_pcu_lock);
  289. return r;
  290. }
  291. /*
  292. * Set/change channels. If the channel is really being changed, it's done
  293. * by reseting the chip. To accomplish this we must first cleanup any pending
  294. * DMA, then restart stuff.
  295. */
  296. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  297. struct ath9k_channel *hchan)
  298. {
  299. int r;
  300. if (sc->sc_flags & SC_OP_INVALID)
  301. return -EIO;
  302. ath9k_ps_wakeup(sc);
  303. r = ath_reset_internal(sc, hchan, false);
  304. ath9k_ps_restore(sc);
  305. return r;
  306. }
  307. static void ath_paprd_activate(struct ath_softc *sc)
  308. {
  309. struct ath_hw *ah = sc->sc_ah;
  310. struct ath9k_hw_cal_data *caldata = ah->caldata;
  311. int chain;
  312. if (!caldata || !caldata->paprd_done)
  313. return;
  314. ath9k_ps_wakeup(sc);
  315. ar9003_paprd_enable(ah, false);
  316. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  317. if (!(ah->txchainmask & BIT(chain)))
  318. continue;
  319. ar9003_paprd_populate_single_table(ah, caldata, chain);
  320. }
  321. ar9003_paprd_enable(ah, true);
  322. ath9k_ps_restore(sc);
  323. }
  324. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  325. {
  326. struct ieee80211_hw *hw = sc->hw;
  327. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  328. struct ath_hw *ah = sc->sc_ah;
  329. struct ath_common *common = ath9k_hw_common(ah);
  330. struct ath_tx_control txctl;
  331. int time_left;
  332. memset(&txctl, 0, sizeof(txctl));
  333. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  334. memset(tx_info, 0, sizeof(*tx_info));
  335. tx_info->band = hw->conf.channel->band;
  336. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  337. tx_info->control.rates[0].idx = 0;
  338. tx_info->control.rates[0].count = 1;
  339. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  340. tx_info->control.rates[1].idx = -1;
  341. init_completion(&sc->paprd_complete);
  342. txctl.paprd = BIT(chain);
  343. if (ath_tx_start(hw, skb, &txctl) != 0) {
  344. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  345. dev_kfree_skb_any(skb);
  346. return false;
  347. }
  348. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  349. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  350. if (!time_left)
  351. ath_dbg(common, CALIBRATE,
  352. "Timeout waiting for paprd training on TX chain %d\n",
  353. chain);
  354. return !!time_left;
  355. }
  356. void ath_paprd_calibrate(struct work_struct *work)
  357. {
  358. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  359. struct ieee80211_hw *hw = sc->hw;
  360. struct ath_hw *ah = sc->sc_ah;
  361. struct ieee80211_hdr *hdr;
  362. struct sk_buff *skb = NULL;
  363. struct ath9k_hw_cal_data *caldata = ah->caldata;
  364. struct ath_common *common = ath9k_hw_common(ah);
  365. int ftype;
  366. int chain_ok = 0;
  367. int chain;
  368. int len = 1800;
  369. if (!caldata)
  370. return;
  371. ath9k_ps_wakeup(sc);
  372. if (ar9003_paprd_init_table(ah) < 0)
  373. goto fail_paprd;
  374. skb = alloc_skb(len, GFP_KERNEL);
  375. if (!skb)
  376. goto fail_paprd;
  377. skb_put(skb, len);
  378. memset(skb->data, 0, len);
  379. hdr = (struct ieee80211_hdr *)skb->data;
  380. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  381. hdr->frame_control = cpu_to_le16(ftype);
  382. hdr->duration_id = cpu_to_le16(10);
  383. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  384. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  385. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  386. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  387. if (!(ah->txchainmask & BIT(chain)))
  388. continue;
  389. chain_ok = 0;
  390. ath_dbg(common, CALIBRATE,
  391. "Sending PAPRD frame for thermal measurement on chain %d\n",
  392. chain);
  393. if (!ath_paprd_send_frame(sc, skb, chain))
  394. goto fail_paprd;
  395. ar9003_paprd_setup_gain_table(ah, chain);
  396. ath_dbg(common, CALIBRATE,
  397. "Sending PAPRD training frame on chain %d\n", chain);
  398. if (!ath_paprd_send_frame(sc, skb, chain))
  399. goto fail_paprd;
  400. if (!ar9003_paprd_is_done(ah)) {
  401. ath_dbg(common, CALIBRATE,
  402. "PAPRD not yet done on chain %d\n", chain);
  403. break;
  404. }
  405. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  406. ath_dbg(common, CALIBRATE,
  407. "PAPRD create curve failed on chain %d\n",
  408. chain);
  409. break;
  410. }
  411. chain_ok = 1;
  412. }
  413. kfree_skb(skb);
  414. if (chain_ok) {
  415. caldata->paprd_done = true;
  416. ath_paprd_activate(sc);
  417. }
  418. fail_paprd:
  419. ath9k_ps_restore(sc);
  420. }
  421. /*
  422. * This routine performs the periodic noise floor calibration function
  423. * that is used to adjust and optimize the chip performance. This
  424. * takes environmental changes (location, temperature) into account.
  425. * When the task is complete, it reschedules itself depending on the
  426. * appropriate interval that was calculated.
  427. */
  428. void ath_ani_calibrate(unsigned long data)
  429. {
  430. struct ath_softc *sc = (struct ath_softc *)data;
  431. struct ath_hw *ah = sc->sc_ah;
  432. struct ath_common *common = ath9k_hw_common(ah);
  433. bool longcal = false;
  434. bool shortcal = false;
  435. bool aniflag = false;
  436. unsigned int timestamp = jiffies_to_msecs(jiffies);
  437. u32 cal_interval, short_cal_interval, long_cal_interval;
  438. unsigned long flags;
  439. if (ah->caldata && ah->caldata->nfcal_interference)
  440. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  441. else
  442. long_cal_interval = ATH_LONG_CALINTERVAL;
  443. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  444. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  445. /* Only calibrate if awake */
  446. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  447. goto set_timer;
  448. ath9k_ps_wakeup(sc);
  449. /* Long calibration runs independently of short calibration. */
  450. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  451. longcal = true;
  452. common->ani.longcal_timer = timestamp;
  453. }
  454. /* Short calibration applies only while caldone is false */
  455. if (!common->ani.caldone) {
  456. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  457. shortcal = true;
  458. common->ani.shortcal_timer = timestamp;
  459. common->ani.resetcal_timer = timestamp;
  460. }
  461. } else {
  462. if ((timestamp - common->ani.resetcal_timer) >=
  463. ATH_RESTART_CALINTERVAL) {
  464. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  465. if (common->ani.caldone)
  466. common->ani.resetcal_timer = timestamp;
  467. }
  468. }
  469. /* Verify whether we must check ANI */
  470. if (sc->sc_ah->config.enable_ani
  471. && (timestamp - common->ani.checkani_timer) >=
  472. ah->config.ani_poll_interval) {
  473. aniflag = true;
  474. common->ani.checkani_timer = timestamp;
  475. }
  476. /* Call ANI routine if necessary */
  477. if (aniflag) {
  478. spin_lock_irqsave(&common->cc_lock, flags);
  479. ath9k_hw_ani_monitor(ah, ah->curchan);
  480. ath_update_survey_stats(sc);
  481. spin_unlock_irqrestore(&common->cc_lock, flags);
  482. }
  483. /* Perform calibration if necessary */
  484. if (longcal || shortcal) {
  485. common->ani.caldone =
  486. ath9k_hw_calibrate(ah, ah->curchan,
  487. ah->rxchainmask, longcal);
  488. }
  489. ath_dbg(common, ANI,
  490. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  491. jiffies,
  492. longcal ? "long" : "", shortcal ? "short" : "",
  493. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  494. ath9k_ps_restore(sc);
  495. set_timer:
  496. /*
  497. * Set timer interval based on previous results.
  498. * The interval must be the shortest necessary to satisfy ANI,
  499. * short calibration and long calibration.
  500. */
  501. ath9k_debug_samp_bb_mac(sc);
  502. cal_interval = ATH_LONG_CALINTERVAL;
  503. if (sc->sc_ah->config.enable_ani)
  504. cal_interval = min(cal_interval,
  505. (u32)ah->config.ani_poll_interval);
  506. if (!common->ani.caldone)
  507. cal_interval = min(cal_interval, (u32)short_cal_interval);
  508. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  509. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  510. if (!ah->caldata->paprd_done)
  511. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  512. else if (!ah->paprd_table_write_done)
  513. ath_paprd_activate(sc);
  514. }
  515. }
  516. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  517. struct ieee80211_vif *vif)
  518. {
  519. struct ath_node *an;
  520. an = (struct ath_node *)sta->drv_priv;
  521. #ifdef CONFIG_ATH9K_DEBUGFS
  522. spin_lock(&sc->nodes_lock);
  523. list_add(&an->list, &sc->nodes);
  524. spin_unlock(&sc->nodes_lock);
  525. #endif
  526. an->sta = sta;
  527. an->vif = vif;
  528. if (sc->sc_flags & SC_OP_TXAGGR) {
  529. ath_tx_node_init(sc, an);
  530. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  531. sta->ht_cap.ampdu_factor);
  532. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  533. }
  534. }
  535. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  536. {
  537. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  538. #ifdef CONFIG_ATH9K_DEBUGFS
  539. spin_lock(&sc->nodes_lock);
  540. list_del(&an->list);
  541. spin_unlock(&sc->nodes_lock);
  542. an->sta = NULL;
  543. #endif
  544. if (sc->sc_flags & SC_OP_TXAGGR)
  545. ath_tx_node_cleanup(sc, an);
  546. }
  547. void ath9k_tasklet(unsigned long data)
  548. {
  549. struct ath_softc *sc = (struct ath_softc *)data;
  550. struct ath_hw *ah = sc->sc_ah;
  551. struct ath_common *common = ath9k_hw_common(ah);
  552. u32 status = sc->intrstatus;
  553. u32 rxmask;
  554. ath9k_ps_wakeup(sc);
  555. spin_lock(&sc->sc_pcu_lock);
  556. if ((status & ATH9K_INT_FATAL) ||
  557. (status & ATH9K_INT_BB_WATCHDOG)) {
  558. #ifdef CONFIG_ATH9K_DEBUGFS
  559. enum ath_reset_type type;
  560. if (status & ATH9K_INT_FATAL)
  561. type = RESET_TYPE_FATAL_INT;
  562. else
  563. type = RESET_TYPE_BB_WATCHDOG;
  564. RESET_STAT_INC(sc, type);
  565. #endif
  566. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  567. goto out;
  568. }
  569. /*
  570. * Only run the baseband hang check if beacons stop working in AP or
  571. * IBSS mode, because it has a high false positive rate. For station
  572. * mode it should not be necessary, since the upper layers will detect
  573. * this through a beacon miss automatically and the following channel
  574. * change will trigger a hardware reset anyway
  575. */
  576. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  577. !ath9k_hw_check_alive(ah))
  578. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  579. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  580. /*
  581. * TSF sync does not look correct; remain awake to sync with
  582. * the next Beacon.
  583. */
  584. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  585. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  586. }
  587. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  588. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  589. ATH9K_INT_RXORN);
  590. else
  591. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  592. if (status & rxmask) {
  593. /* Check for high priority Rx first */
  594. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  595. (status & ATH9K_INT_RXHP))
  596. ath_rx_tasklet(sc, 0, true);
  597. ath_rx_tasklet(sc, 0, false);
  598. }
  599. if (status & ATH9K_INT_TX) {
  600. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  601. ath_tx_edma_tasklet(sc);
  602. else
  603. ath_tx_tasklet(sc);
  604. }
  605. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  606. if (status & ATH9K_INT_GENTIMER)
  607. ath_gen_timer_isr(sc->sc_ah);
  608. if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI)
  609. ath_mci_intr(sc);
  610. out:
  611. /* re-enable hardware interrupt */
  612. ath9k_hw_enable_interrupts(ah);
  613. spin_unlock(&sc->sc_pcu_lock);
  614. ath9k_ps_restore(sc);
  615. }
  616. irqreturn_t ath_isr(int irq, void *dev)
  617. {
  618. #define SCHED_INTR ( \
  619. ATH9K_INT_FATAL | \
  620. ATH9K_INT_BB_WATCHDOG | \
  621. ATH9K_INT_RXORN | \
  622. ATH9K_INT_RXEOL | \
  623. ATH9K_INT_RX | \
  624. ATH9K_INT_RXLP | \
  625. ATH9K_INT_RXHP | \
  626. ATH9K_INT_TX | \
  627. ATH9K_INT_BMISS | \
  628. ATH9K_INT_CST | \
  629. ATH9K_INT_TSFOOR | \
  630. ATH9K_INT_GENTIMER | \
  631. ATH9K_INT_MCI)
  632. struct ath_softc *sc = dev;
  633. struct ath_hw *ah = sc->sc_ah;
  634. struct ath_common *common = ath9k_hw_common(ah);
  635. enum ath9k_int status;
  636. bool sched = false;
  637. /*
  638. * The hardware is not ready/present, don't
  639. * touch anything. Note this can happen early
  640. * on if the IRQ is shared.
  641. */
  642. if (sc->sc_flags & SC_OP_INVALID)
  643. return IRQ_NONE;
  644. /* shared irq, not for us */
  645. if (!ath9k_hw_intrpend(ah))
  646. return IRQ_NONE;
  647. /*
  648. * Figure out the reason(s) for the interrupt. Note
  649. * that the hal returns a pseudo-ISR that may include
  650. * bits we haven't explicitly enabled so we mask the
  651. * value to insure we only process bits we requested.
  652. */
  653. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  654. status &= ah->imask; /* discard unasked-for bits */
  655. /*
  656. * If there are no status bits set, then this interrupt was not
  657. * for me (should have been caught above).
  658. */
  659. if (!status)
  660. return IRQ_NONE;
  661. /* Cache the status */
  662. sc->intrstatus = status;
  663. if (status & SCHED_INTR)
  664. sched = true;
  665. /*
  666. * If a FATAL or RXORN interrupt is received, we have to reset the
  667. * chip immediately.
  668. */
  669. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  670. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  671. goto chip_reset;
  672. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  673. (status & ATH9K_INT_BB_WATCHDOG)) {
  674. spin_lock(&common->cc_lock);
  675. ath_hw_cycle_counters_update(common);
  676. ar9003_hw_bb_watchdog_dbg_info(ah);
  677. spin_unlock(&common->cc_lock);
  678. goto chip_reset;
  679. }
  680. if (status & ATH9K_INT_SWBA)
  681. tasklet_schedule(&sc->bcon_tasklet);
  682. if (status & ATH9K_INT_TXURN)
  683. ath9k_hw_updatetxtriglevel(ah, true);
  684. if (status & ATH9K_INT_RXEOL) {
  685. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  686. ath9k_hw_set_interrupts(ah);
  687. }
  688. if (status & ATH9K_INT_MIB) {
  689. /*
  690. * Disable interrupts until we service the MIB
  691. * interrupt; otherwise it will continue to
  692. * fire.
  693. */
  694. ath9k_hw_disable_interrupts(ah);
  695. /*
  696. * Let the hal handle the event. We assume
  697. * it will clear whatever condition caused
  698. * the interrupt.
  699. */
  700. spin_lock(&common->cc_lock);
  701. ath9k_hw_proc_mib_event(ah);
  702. spin_unlock(&common->cc_lock);
  703. ath9k_hw_enable_interrupts(ah);
  704. }
  705. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  706. if (status & ATH9K_INT_TIM_TIMER) {
  707. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  708. goto chip_reset;
  709. /* Clear RxAbort bit so that we can
  710. * receive frames */
  711. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  712. ath9k_hw_setrxabort(sc->sc_ah, 0);
  713. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  714. }
  715. chip_reset:
  716. ath_debug_stat_interrupt(sc, status);
  717. if (sched) {
  718. /* turn off every interrupt */
  719. ath9k_hw_disable_interrupts(ah);
  720. tasklet_schedule(&sc->intr_tq);
  721. }
  722. return IRQ_HANDLED;
  723. #undef SCHED_INTR
  724. }
  725. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  726. {
  727. int r;
  728. ath9k_ps_wakeup(sc);
  729. r = ath_reset_internal(sc, NULL, retry_tx);
  730. if (retry_tx) {
  731. int i;
  732. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  733. if (ATH_TXQ_SETUP(sc, i)) {
  734. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  735. ath_txq_schedule(sc, &sc->tx.txq[i]);
  736. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  737. }
  738. }
  739. }
  740. ath9k_ps_restore(sc);
  741. return r;
  742. }
  743. void ath_reset_work(struct work_struct *work)
  744. {
  745. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  746. ath_reset(sc, true);
  747. }
  748. void ath_hw_check(struct work_struct *work)
  749. {
  750. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  751. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  752. unsigned long flags;
  753. int busy;
  754. ath9k_ps_wakeup(sc);
  755. if (ath9k_hw_check_alive(sc->sc_ah))
  756. goto out;
  757. spin_lock_irqsave(&common->cc_lock, flags);
  758. busy = ath_update_survey_stats(sc);
  759. spin_unlock_irqrestore(&common->cc_lock, flags);
  760. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  761. busy, sc->hw_busy_count + 1);
  762. if (busy >= 99) {
  763. if (++sc->hw_busy_count >= 3) {
  764. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  765. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  766. }
  767. } else if (busy >= 0)
  768. sc->hw_busy_count = 0;
  769. out:
  770. ath9k_ps_restore(sc);
  771. }
  772. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  773. {
  774. static int count;
  775. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  776. if (pll_sqsum >= 0x40000) {
  777. count++;
  778. if (count == 3) {
  779. /* Rx is hung for more than 500ms. Reset it */
  780. ath_dbg(common, RESET, "Possible RX hang, resetting\n");
  781. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  782. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  783. count = 0;
  784. }
  785. } else
  786. count = 0;
  787. }
  788. void ath_hw_pll_work(struct work_struct *work)
  789. {
  790. struct ath_softc *sc = container_of(work, struct ath_softc,
  791. hw_pll_work.work);
  792. u32 pll_sqsum;
  793. if (AR_SREV_9485(sc->sc_ah)) {
  794. ath9k_ps_wakeup(sc);
  795. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  796. ath9k_ps_restore(sc);
  797. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  798. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  799. }
  800. }
  801. /**********************/
  802. /* mac80211 callbacks */
  803. /**********************/
  804. static int ath9k_start(struct ieee80211_hw *hw)
  805. {
  806. struct ath_softc *sc = hw->priv;
  807. struct ath_hw *ah = sc->sc_ah;
  808. struct ath_common *common = ath9k_hw_common(ah);
  809. struct ieee80211_channel *curchan = hw->conf.channel;
  810. struct ath9k_channel *init_channel;
  811. int r;
  812. ath_dbg(common, CONFIG,
  813. "Starting driver with initial channel: %d MHz\n",
  814. curchan->center_freq);
  815. ath9k_ps_wakeup(sc);
  816. mutex_lock(&sc->mutex);
  817. /* setup initial channel */
  818. sc->chan_idx = curchan->hw_value;
  819. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  820. /* Reset SERDES registers */
  821. ath9k_hw_configpcipowersave(ah, false);
  822. /*
  823. * The basic interface to setting the hardware in a good
  824. * state is ``reset''. On return the hardware is known to
  825. * be powered up and with interrupts disabled. This must
  826. * be followed by initialization of the appropriate bits
  827. * and then setup of the interrupt mask.
  828. */
  829. spin_lock_bh(&sc->sc_pcu_lock);
  830. atomic_set(&ah->intr_ref_cnt, -1);
  831. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  832. if (r) {
  833. ath_err(common,
  834. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  835. r, curchan->center_freq);
  836. spin_unlock_bh(&sc->sc_pcu_lock);
  837. goto mutex_unlock;
  838. }
  839. /* Setup our intr mask. */
  840. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  841. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  842. ATH9K_INT_GLOBAL;
  843. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  844. ah->imask |= ATH9K_INT_RXHP |
  845. ATH9K_INT_RXLP |
  846. ATH9K_INT_BB_WATCHDOG;
  847. else
  848. ah->imask |= ATH9K_INT_RX;
  849. ah->imask |= ATH9K_INT_GTT;
  850. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  851. ah->imask |= ATH9K_INT_CST;
  852. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  853. ah->imask |= ATH9K_INT_MCI;
  854. sc->sc_flags &= ~SC_OP_INVALID;
  855. sc->sc_ah->is_monitoring = false;
  856. /* Disable BMISS interrupt when we're not associated */
  857. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  858. if (!ath_complete_reset(sc, false)) {
  859. r = -EIO;
  860. spin_unlock_bh(&sc->sc_pcu_lock);
  861. goto mutex_unlock;
  862. }
  863. if (ah->led_pin >= 0) {
  864. ath9k_hw_cfg_output(ah, ah->led_pin,
  865. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  866. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  867. }
  868. /*
  869. * Reset key cache to sane defaults (all entries cleared) instead of
  870. * semi-random values after suspend/resume.
  871. */
  872. ath9k_cmn_init_crypto(sc->sc_ah);
  873. spin_unlock_bh(&sc->sc_pcu_lock);
  874. if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
  875. !ah->btcoex_hw.enabled) {
  876. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  877. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  878. AR_STOMP_LOW_WLAN_WGHT);
  879. ath9k_hw_btcoex_enable(ah);
  880. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  881. ath9k_btcoex_timer_resume(sc);
  882. }
  883. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  884. common->bus_ops->extn_synch_en(common);
  885. mutex_unlock:
  886. mutex_unlock(&sc->mutex);
  887. ath9k_ps_restore(sc);
  888. return r;
  889. }
  890. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  891. {
  892. struct ath_softc *sc = hw->priv;
  893. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  894. struct ath_tx_control txctl;
  895. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  896. if (sc->ps_enabled) {
  897. /*
  898. * mac80211 does not set PM field for normal data frames, so we
  899. * need to update that based on the current PS mode.
  900. */
  901. if (ieee80211_is_data(hdr->frame_control) &&
  902. !ieee80211_is_nullfunc(hdr->frame_control) &&
  903. !ieee80211_has_pm(hdr->frame_control)) {
  904. ath_dbg(common, PS,
  905. "Add PM=1 for a TX frame while in PS mode\n");
  906. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  907. }
  908. }
  909. /*
  910. * Cannot tx while the hardware is in full sleep, it first needs a full
  911. * chip reset to recover from that
  912. */
  913. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  914. goto exit;
  915. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  916. /*
  917. * We are using PS-Poll and mac80211 can request TX while in
  918. * power save mode. Need to wake up hardware for the TX to be
  919. * completed and if needed, also for RX of buffered frames.
  920. */
  921. ath9k_ps_wakeup(sc);
  922. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  923. ath9k_hw_setrxabort(sc->sc_ah, 0);
  924. if (ieee80211_is_pspoll(hdr->frame_control)) {
  925. ath_dbg(common, PS,
  926. "Sending PS-Poll to pick a buffered frame\n");
  927. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  928. } else {
  929. ath_dbg(common, PS, "Wake up to complete TX\n");
  930. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  931. }
  932. /*
  933. * The actual restore operation will happen only after
  934. * the sc_flags bit is cleared. We are just dropping
  935. * the ps_usecount here.
  936. */
  937. ath9k_ps_restore(sc);
  938. }
  939. memset(&txctl, 0, sizeof(struct ath_tx_control));
  940. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  941. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  942. if (ath_tx_start(hw, skb, &txctl) != 0) {
  943. ath_dbg(common, XMIT, "TX failed\n");
  944. goto exit;
  945. }
  946. return;
  947. exit:
  948. dev_kfree_skb_any(skb);
  949. }
  950. static void ath9k_stop(struct ieee80211_hw *hw)
  951. {
  952. struct ath_softc *sc = hw->priv;
  953. struct ath_hw *ah = sc->sc_ah;
  954. struct ath_common *common = ath9k_hw_common(ah);
  955. bool prev_idle;
  956. mutex_lock(&sc->mutex);
  957. ath_cancel_work(sc);
  958. if (sc->sc_flags & SC_OP_INVALID) {
  959. ath_dbg(common, ANY, "Device not present\n");
  960. mutex_unlock(&sc->mutex);
  961. return;
  962. }
  963. /* Ensure HW is awake when we try to shut it down. */
  964. ath9k_ps_wakeup(sc);
  965. if (ah->btcoex_hw.enabled &&
  966. ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
  967. ath9k_hw_btcoex_disable(ah);
  968. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  969. ath9k_btcoex_timer_pause(sc);
  970. ath_mci_flush_profile(&sc->btcoex.mci);
  971. }
  972. spin_lock_bh(&sc->sc_pcu_lock);
  973. /* prevent tasklets to enable interrupts once we disable them */
  974. ah->imask &= ~ATH9K_INT_GLOBAL;
  975. /* make sure h/w will not generate any interrupt
  976. * before setting the invalid flag. */
  977. ath9k_hw_disable_interrupts(ah);
  978. spin_unlock_bh(&sc->sc_pcu_lock);
  979. /* we can now sync irq and kill any running tasklets, since we already
  980. * disabled interrupts and not holding a spin lock */
  981. synchronize_irq(sc->irq);
  982. tasklet_kill(&sc->intr_tq);
  983. tasklet_kill(&sc->bcon_tasklet);
  984. prev_idle = sc->ps_idle;
  985. sc->ps_idle = true;
  986. spin_lock_bh(&sc->sc_pcu_lock);
  987. if (ah->led_pin >= 0) {
  988. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  989. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  990. }
  991. ath_prepare_reset(sc, false, true);
  992. if (sc->rx.frag) {
  993. dev_kfree_skb_any(sc->rx.frag);
  994. sc->rx.frag = NULL;
  995. }
  996. if (!ah->curchan)
  997. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  998. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  999. ath9k_hw_phy_disable(ah);
  1000. ath9k_hw_configpcipowersave(ah, true);
  1001. spin_unlock_bh(&sc->sc_pcu_lock);
  1002. ath9k_ps_restore(sc);
  1003. sc->sc_flags |= SC_OP_INVALID;
  1004. sc->ps_idle = prev_idle;
  1005. mutex_unlock(&sc->mutex);
  1006. ath_dbg(common, CONFIG, "Driver halt\n");
  1007. }
  1008. bool ath9k_uses_beacons(int type)
  1009. {
  1010. switch (type) {
  1011. case NL80211_IFTYPE_AP:
  1012. case NL80211_IFTYPE_ADHOC:
  1013. case NL80211_IFTYPE_MESH_POINT:
  1014. return true;
  1015. default:
  1016. return false;
  1017. }
  1018. }
  1019. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1020. struct ieee80211_vif *vif)
  1021. {
  1022. struct ath_vif *avp = (void *)vif->drv_priv;
  1023. ath9k_set_beaconing_status(sc, false);
  1024. ath_beacon_return(sc, avp);
  1025. ath9k_set_beaconing_status(sc, true);
  1026. sc->sc_flags &= ~SC_OP_BEACONS;
  1027. }
  1028. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1029. {
  1030. struct ath9k_vif_iter_data *iter_data = data;
  1031. int i;
  1032. if (iter_data->hw_macaddr)
  1033. for (i = 0; i < ETH_ALEN; i++)
  1034. iter_data->mask[i] &=
  1035. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1036. switch (vif->type) {
  1037. case NL80211_IFTYPE_AP:
  1038. iter_data->naps++;
  1039. break;
  1040. case NL80211_IFTYPE_STATION:
  1041. iter_data->nstations++;
  1042. break;
  1043. case NL80211_IFTYPE_ADHOC:
  1044. iter_data->nadhocs++;
  1045. break;
  1046. case NL80211_IFTYPE_MESH_POINT:
  1047. iter_data->nmeshes++;
  1048. break;
  1049. case NL80211_IFTYPE_WDS:
  1050. iter_data->nwds++;
  1051. break;
  1052. default:
  1053. iter_data->nothers++;
  1054. break;
  1055. }
  1056. }
  1057. /* Called with sc->mutex held. */
  1058. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1059. struct ieee80211_vif *vif,
  1060. struct ath9k_vif_iter_data *iter_data)
  1061. {
  1062. struct ath_softc *sc = hw->priv;
  1063. struct ath_hw *ah = sc->sc_ah;
  1064. struct ath_common *common = ath9k_hw_common(ah);
  1065. /*
  1066. * Use the hardware MAC address as reference, the hardware uses it
  1067. * together with the BSSID mask when matching addresses.
  1068. */
  1069. memset(iter_data, 0, sizeof(*iter_data));
  1070. iter_data->hw_macaddr = common->macaddr;
  1071. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1072. if (vif)
  1073. ath9k_vif_iter(iter_data, vif->addr, vif);
  1074. /* Get list of all active MAC addresses */
  1075. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1076. iter_data);
  1077. }
  1078. /* Called with sc->mutex held. */
  1079. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1080. struct ieee80211_vif *vif)
  1081. {
  1082. struct ath_softc *sc = hw->priv;
  1083. struct ath_hw *ah = sc->sc_ah;
  1084. struct ath_common *common = ath9k_hw_common(ah);
  1085. struct ath9k_vif_iter_data iter_data;
  1086. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1087. /* Set BSSID mask. */
  1088. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1089. ath_hw_setbssidmask(common);
  1090. /* Set op-mode & TSF */
  1091. if (iter_data.naps > 0) {
  1092. ath9k_hw_set_tsfadjust(ah, 1);
  1093. sc->sc_flags |= SC_OP_TSF_RESET;
  1094. ah->opmode = NL80211_IFTYPE_AP;
  1095. } else {
  1096. ath9k_hw_set_tsfadjust(ah, 0);
  1097. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1098. if (iter_data.nmeshes)
  1099. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1100. else if (iter_data.nwds)
  1101. ah->opmode = NL80211_IFTYPE_AP;
  1102. else if (iter_data.nadhocs)
  1103. ah->opmode = NL80211_IFTYPE_ADHOC;
  1104. else
  1105. ah->opmode = NL80211_IFTYPE_STATION;
  1106. }
  1107. /*
  1108. * Enable MIB interrupts when there are hardware phy counters.
  1109. */
  1110. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1111. if (ah->config.enable_ani)
  1112. ah->imask |= ATH9K_INT_MIB;
  1113. ah->imask |= ATH9K_INT_TSFOOR;
  1114. } else {
  1115. ah->imask &= ~ATH9K_INT_MIB;
  1116. ah->imask &= ~ATH9K_INT_TSFOOR;
  1117. }
  1118. ath9k_hw_set_interrupts(ah);
  1119. /* Set up ANI */
  1120. if (iter_data.naps > 0) {
  1121. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1122. if (!common->disable_ani) {
  1123. sc->sc_flags |= SC_OP_ANI_RUN;
  1124. ath_start_ani(common);
  1125. }
  1126. } else {
  1127. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1128. del_timer_sync(&common->ani.timer);
  1129. }
  1130. }
  1131. /* Called with sc->mutex held, vif counts set up properly. */
  1132. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1133. struct ieee80211_vif *vif)
  1134. {
  1135. struct ath_softc *sc = hw->priv;
  1136. ath9k_calculate_summary_state(hw, vif);
  1137. if (ath9k_uses_beacons(vif->type)) {
  1138. int error;
  1139. /* This may fail because upper levels do not have beacons
  1140. * properly configured yet. That's OK, we assume it
  1141. * will be properly configured and then we will be notified
  1142. * in the info_changed method and set up beacons properly
  1143. * there.
  1144. */
  1145. ath9k_set_beaconing_status(sc, false);
  1146. error = ath_beacon_alloc(sc, vif);
  1147. if (!error)
  1148. ath_beacon_config(sc, vif);
  1149. ath9k_set_beaconing_status(sc, true);
  1150. }
  1151. }
  1152. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1153. struct ieee80211_vif *vif)
  1154. {
  1155. struct ath_softc *sc = hw->priv;
  1156. struct ath_hw *ah = sc->sc_ah;
  1157. struct ath_common *common = ath9k_hw_common(ah);
  1158. int ret = 0;
  1159. ath9k_ps_wakeup(sc);
  1160. mutex_lock(&sc->mutex);
  1161. switch (vif->type) {
  1162. case NL80211_IFTYPE_STATION:
  1163. case NL80211_IFTYPE_WDS:
  1164. case NL80211_IFTYPE_ADHOC:
  1165. case NL80211_IFTYPE_AP:
  1166. case NL80211_IFTYPE_MESH_POINT:
  1167. break;
  1168. default:
  1169. ath_err(common, "Interface type %d not yet supported\n",
  1170. vif->type);
  1171. ret = -EOPNOTSUPP;
  1172. goto out;
  1173. }
  1174. if (ath9k_uses_beacons(vif->type)) {
  1175. if (sc->nbcnvifs >= ATH_BCBUF) {
  1176. ath_err(common, "Not enough beacon buffers when adding"
  1177. " new interface of type: %i\n",
  1178. vif->type);
  1179. ret = -ENOBUFS;
  1180. goto out;
  1181. }
  1182. }
  1183. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1184. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1185. sc->nvifs > 0)) {
  1186. ath_err(common, "Cannot create ADHOC interface when other"
  1187. " interfaces already exist.\n");
  1188. ret = -EINVAL;
  1189. goto out;
  1190. }
  1191. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  1192. sc->nvifs++;
  1193. ath9k_do_vif_add_setup(hw, vif);
  1194. out:
  1195. mutex_unlock(&sc->mutex);
  1196. ath9k_ps_restore(sc);
  1197. return ret;
  1198. }
  1199. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1200. struct ieee80211_vif *vif,
  1201. enum nl80211_iftype new_type,
  1202. bool p2p)
  1203. {
  1204. struct ath_softc *sc = hw->priv;
  1205. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1206. int ret = 0;
  1207. ath_dbg(common, CONFIG, "Change Interface\n");
  1208. mutex_lock(&sc->mutex);
  1209. ath9k_ps_wakeup(sc);
  1210. /* See if new interface type is valid. */
  1211. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1212. (sc->nvifs > 1)) {
  1213. ath_err(common, "When using ADHOC, it must be the only"
  1214. " interface.\n");
  1215. ret = -EINVAL;
  1216. goto out;
  1217. }
  1218. if (ath9k_uses_beacons(new_type) &&
  1219. !ath9k_uses_beacons(vif->type)) {
  1220. if (sc->nbcnvifs >= ATH_BCBUF) {
  1221. ath_err(common, "No beacon slot available\n");
  1222. ret = -ENOBUFS;
  1223. goto out;
  1224. }
  1225. }
  1226. /* Clean up old vif stuff */
  1227. if (ath9k_uses_beacons(vif->type))
  1228. ath9k_reclaim_beacon(sc, vif);
  1229. /* Add new settings */
  1230. vif->type = new_type;
  1231. vif->p2p = p2p;
  1232. ath9k_do_vif_add_setup(hw, vif);
  1233. out:
  1234. ath9k_ps_restore(sc);
  1235. mutex_unlock(&sc->mutex);
  1236. return ret;
  1237. }
  1238. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1239. struct ieee80211_vif *vif)
  1240. {
  1241. struct ath_softc *sc = hw->priv;
  1242. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1243. ath_dbg(common, CONFIG, "Detach Interface\n");
  1244. ath9k_ps_wakeup(sc);
  1245. mutex_lock(&sc->mutex);
  1246. sc->nvifs--;
  1247. /* Reclaim beacon resources */
  1248. if (ath9k_uses_beacons(vif->type))
  1249. ath9k_reclaim_beacon(sc, vif);
  1250. ath9k_calculate_summary_state(hw, NULL);
  1251. mutex_unlock(&sc->mutex);
  1252. ath9k_ps_restore(sc);
  1253. }
  1254. static void ath9k_enable_ps(struct ath_softc *sc)
  1255. {
  1256. struct ath_hw *ah = sc->sc_ah;
  1257. sc->ps_enabled = true;
  1258. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1259. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1260. ah->imask |= ATH9K_INT_TIM_TIMER;
  1261. ath9k_hw_set_interrupts(ah);
  1262. }
  1263. ath9k_hw_setrxabort(ah, 1);
  1264. }
  1265. }
  1266. static void ath9k_disable_ps(struct ath_softc *sc)
  1267. {
  1268. struct ath_hw *ah = sc->sc_ah;
  1269. sc->ps_enabled = false;
  1270. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1271. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1272. ath9k_hw_setrxabort(ah, 0);
  1273. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1274. PS_WAIT_FOR_CAB |
  1275. PS_WAIT_FOR_PSPOLL_DATA |
  1276. PS_WAIT_FOR_TX_ACK);
  1277. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1278. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1279. ath9k_hw_set_interrupts(ah);
  1280. }
  1281. }
  1282. }
  1283. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1284. {
  1285. struct ath_softc *sc = hw->priv;
  1286. struct ath_hw *ah = sc->sc_ah;
  1287. struct ath_common *common = ath9k_hw_common(ah);
  1288. struct ieee80211_conf *conf = &hw->conf;
  1289. ath9k_ps_wakeup(sc);
  1290. mutex_lock(&sc->mutex);
  1291. /*
  1292. * Leave this as the first check because we need to turn on the
  1293. * radio if it was disabled before prior to processing the rest
  1294. * of the changes. Likewise we must only disable the radio towards
  1295. * the end.
  1296. */
  1297. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1298. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1299. if (sc->ps_idle)
  1300. ath_cancel_work(sc);
  1301. }
  1302. /*
  1303. * We just prepare to enable PS. We have to wait until our AP has
  1304. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1305. * those ACKs and end up retransmitting the same null data frames.
  1306. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1307. */
  1308. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1309. unsigned long flags;
  1310. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1311. if (conf->flags & IEEE80211_CONF_PS)
  1312. ath9k_enable_ps(sc);
  1313. else
  1314. ath9k_disable_ps(sc);
  1315. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1316. }
  1317. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1318. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1319. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  1320. sc->sc_ah->is_monitoring = true;
  1321. } else {
  1322. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  1323. sc->sc_ah->is_monitoring = false;
  1324. }
  1325. }
  1326. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1327. struct ieee80211_channel *curchan = hw->conf.channel;
  1328. int pos = curchan->hw_value;
  1329. int old_pos = -1;
  1330. unsigned long flags;
  1331. if (ah->curchan)
  1332. old_pos = ah->curchan - &ah->channels[0];
  1333. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1334. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1335. else
  1336. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1337. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  1338. curchan->center_freq, conf->channel_type);
  1339. /* update survey stats for the old channel before switching */
  1340. spin_lock_irqsave(&common->cc_lock, flags);
  1341. ath_update_survey_stats(sc);
  1342. spin_unlock_irqrestore(&common->cc_lock, flags);
  1343. /*
  1344. * Preserve the current channel values, before updating
  1345. * the same channel
  1346. */
  1347. if (ah->curchan && (old_pos == pos))
  1348. ath9k_hw_getnf(ah, ah->curchan);
  1349. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1350. curchan, conf->channel_type);
  1351. /*
  1352. * If the operating channel changes, change the survey in-use flags
  1353. * along with it.
  1354. * Reset the survey data for the new channel, unless we're switching
  1355. * back to the operating channel from an off-channel operation.
  1356. */
  1357. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1358. sc->cur_survey != &sc->survey[pos]) {
  1359. if (sc->cur_survey)
  1360. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1361. sc->cur_survey = &sc->survey[pos];
  1362. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1363. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1364. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1365. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1366. }
  1367. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1368. ath_err(common, "Unable to set channel\n");
  1369. mutex_unlock(&sc->mutex);
  1370. return -EINVAL;
  1371. }
  1372. /*
  1373. * The most recent snapshot of channel->noisefloor for the old
  1374. * channel is only available after the hardware reset. Copy it to
  1375. * the survey stats now.
  1376. */
  1377. if (old_pos >= 0)
  1378. ath_update_survey_nf(sc, old_pos);
  1379. }
  1380. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1381. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  1382. sc->config.txpowlimit = 2 * conf->power_level;
  1383. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1384. sc->config.txpowlimit, &sc->curtxpow);
  1385. }
  1386. mutex_unlock(&sc->mutex);
  1387. ath9k_ps_restore(sc);
  1388. return 0;
  1389. }
  1390. #define SUPPORTED_FILTERS \
  1391. (FIF_PROMISC_IN_BSS | \
  1392. FIF_ALLMULTI | \
  1393. FIF_CONTROL | \
  1394. FIF_PSPOLL | \
  1395. FIF_OTHER_BSS | \
  1396. FIF_BCN_PRBRESP_PROMISC | \
  1397. FIF_PROBE_REQ | \
  1398. FIF_FCSFAIL)
  1399. /* FIXME: sc->sc_full_reset ? */
  1400. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1401. unsigned int changed_flags,
  1402. unsigned int *total_flags,
  1403. u64 multicast)
  1404. {
  1405. struct ath_softc *sc = hw->priv;
  1406. u32 rfilt;
  1407. changed_flags &= SUPPORTED_FILTERS;
  1408. *total_flags &= SUPPORTED_FILTERS;
  1409. sc->rx.rxfilter = *total_flags;
  1410. ath9k_ps_wakeup(sc);
  1411. rfilt = ath_calcrxfilter(sc);
  1412. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1413. ath9k_ps_restore(sc);
  1414. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  1415. rfilt);
  1416. }
  1417. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1418. struct ieee80211_vif *vif,
  1419. struct ieee80211_sta *sta)
  1420. {
  1421. struct ath_softc *sc = hw->priv;
  1422. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1423. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1424. struct ieee80211_key_conf ps_key = { };
  1425. ath_node_attach(sc, sta, vif);
  1426. if (vif->type != NL80211_IFTYPE_AP &&
  1427. vif->type != NL80211_IFTYPE_AP_VLAN)
  1428. return 0;
  1429. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1430. return 0;
  1431. }
  1432. static void ath9k_del_ps_key(struct ath_softc *sc,
  1433. struct ieee80211_vif *vif,
  1434. struct ieee80211_sta *sta)
  1435. {
  1436. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1437. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1438. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1439. if (!an->ps_key)
  1440. return;
  1441. ath_key_delete(common, &ps_key);
  1442. }
  1443. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1444. struct ieee80211_vif *vif,
  1445. struct ieee80211_sta *sta)
  1446. {
  1447. struct ath_softc *sc = hw->priv;
  1448. ath9k_del_ps_key(sc, vif, sta);
  1449. ath_node_detach(sc, sta);
  1450. return 0;
  1451. }
  1452. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1453. struct ieee80211_vif *vif,
  1454. enum sta_notify_cmd cmd,
  1455. struct ieee80211_sta *sta)
  1456. {
  1457. struct ath_softc *sc = hw->priv;
  1458. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1459. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1460. return;
  1461. switch (cmd) {
  1462. case STA_NOTIFY_SLEEP:
  1463. an->sleeping = true;
  1464. ath_tx_aggr_sleep(sta, sc, an);
  1465. break;
  1466. case STA_NOTIFY_AWAKE:
  1467. an->sleeping = false;
  1468. ath_tx_aggr_wakeup(sc, an);
  1469. break;
  1470. }
  1471. }
  1472. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1473. struct ieee80211_vif *vif, u16 queue,
  1474. const struct ieee80211_tx_queue_params *params)
  1475. {
  1476. struct ath_softc *sc = hw->priv;
  1477. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1478. struct ath_txq *txq;
  1479. struct ath9k_tx_queue_info qi;
  1480. int ret = 0;
  1481. if (queue >= WME_NUM_AC)
  1482. return 0;
  1483. txq = sc->tx.txq_map[queue];
  1484. ath9k_ps_wakeup(sc);
  1485. mutex_lock(&sc->mutex);
  1486. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1487. qi.tqi_aifs = params->aifs;
  1488. qi.tqi_cwmin = params->cw_min;
  1489. qi.tqi_cwmax = params->cw_max;
  1490. qi.tqi_burstTime = params->txop;
  1491. ath_dbg(common, CONFIG,
  1492. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1493. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1494. params->cw_max, params->txop);
  1495. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1496. if (ret)
  1497. ath_err(common, "TXQ Update failed\n");
  1498. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1499. if (queue == WME_AC_BE && !ret)
  1500. ath_beaconq_config(sc);
  1501. mutex_unlock(&sc->mutex);
  1502. ath9k_ps_restore(sc);
  1503. return ret;
  1504. }
  1505. static int ath9k_set_key(struct ieee80211_hw *hw,
  1506. enum set_key_cmd cmd,
  1507. struct ieee80211_vif *vif,
  1508. struct ieee80211_sta *sta,
  1509. struct ieee80211_key_conf *key)
  1510. {
  1511. struct ath_softc *sc = hw->priv;
  1512. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1513. int ret = 0;
  1514. if (ath9k_modparam_nohwcrypt)
  1515. return -ENOSPC;
  1516. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1517. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1518. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1519. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1520. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1521. /*
  1522. * For now, disable hw crypto for the RSN IBSS group keys. This
  1523. * could be optimized in the future to use a modified key cache
  1524. * design to support per-STA RX GTK, but until that gets
  1525. * implemented, use of software crypto for group addressed
  1526. * frames is a acceptable to allow RSN IBSS to be used.
  1527. */
  1528. return -EOPNOTSUPP;
  1529. }
  1530. mutex_lock(&sc->mutex);
  1531. ath9k_ps_wakeup(sc);
  1532. ath_dbg(common, CONFIG, "Set HW Key\n");
  1533. switch (cmd) {
  1534. case SET_KEY:
  1535. if (sta)
  1536. ath9k_del_ps_key(sc, vif, sta);
  1537. ret = ath_key_config(common, vif, sta, key);
  1538. if (ret >= 0) {
  1539. key->hw_key_idx = ret;
  1540. /* push IV and Michael MIC generation to stack */
  1541. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1542. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1543. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1544. if (sc->sc_ah->sw_mgmt_crypto &&
  1545. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1546. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1547. ret = 0;
  1548. }
  1549. break;
  1550. case DISABLE_KEY:
  1551. ath_key_delete(common, key);
  1552. break;
  1553. default:
  1554. ret = -EINVAL;
  1555. }
  1556. ath9k_ps_restore(sc);
  1557. mutex_unlock(&sc->mutex);
  1558. return ret;
  1559. }
  1560. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1561. {
  1562. struct ath_softc *sc = data;
  1563. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1564. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1565. struct ath_vif *avp = (void *)vif->drv_priv;
  1566. /*
  1567. * Skip iteration if primary station vif's bss info
  1568. * was not changed
  1569. */
  1570. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1571. return;
  1572. if (bss_conf->assoc) {
  1573. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1574. avp->primary_sta_vif = true;
  1575. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1576. common->curaid = bss_conf->aid;
  1577. ath9k_hw_write_associd(sc->sc_ah);
  1578. ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
  1579. bss_conf->aid, common->curbssid);
  1580. ath_beacon_config(sc, vif);
  1581. /*
  1582. * Request a re-configuration of Beacon related timers
  1583. * on the receipt of the first Beacon frame (i.e.,
  1584. * after time sync with the AP).
  1585. */
  1586. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1587. /* Reset rssi stats */
  1588. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1589. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1590. if (!common->disable_ani) {
  1591. sc->sc_flags |= SC_OP_ANI_RUN;
  1592. ath_start_ani(common);
  1593. }
  1594. }
  1595. }
  1596. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1597. {
  1598. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1599. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1600. struct ath_vif *avp = (void *)vif->drv_priv;
  1601. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1602. return;
  1603. /* Reconfigure bss info */
  1604. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1605. ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
  1606. common->curaid, common->curbssid);
  1607. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1608. avp->primary_sta_vif = false;
  1609. memset(common->curbssid, 0, ETH_ALEN);
  1610. common->curaid = 0;
  1611. }
  1612. ieee80211_iterate_active_interfaces_atomic(
  1613. sc->hw, ath9k_bss_iter, sc);
  1614. /*
  1615. * None of station vifs are associated.
  1616. * Clear bssid & aid
  1617. */
  1618. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1619. ath9k_hw_write_associd(sc->sc_ah);
  1620. /* Stop ANI */
  1621. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1622. del_timer_sync(&common->ani.timer);
  1623. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1624. }
  1625. }
  1626. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1627. struct ieee80211_vif *vif,
  1628. struct ieee80211_bss_conf *bss_conf,
  1629. u32 changed)
  1630. {
  1631. struct ath_softc *sc = hw->priv;
  1632. struct ath_hw *ah = sc->sc_ah;
  1633. struct ath_common *common = ath9k_hw_common(ah);
  1634. struct ath_vif *avp = (void *)vif->drv_priv;
  1635. int slottime;
  1636. int error;
  1637. ath9k_ps_wakeup(sc);
  1638. mutex_lock(&sc->mutex);
  1639. if (changed & BSS_CHANGED_BSSID) {
  1640. ath9k_config_bss(sc, vif);
  1641. ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
  1642. common->curbssid, common->curaid);
  1643. }
  1644. if (changed & BSS_CHANGED_IBSS) {
  1645. /* There can be only one vif available */
  1646. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1647. common->curaid = bss_conf->aid;
  1648. ath9k_hw_write_associd(sc->sc_ah);
  1649. if (bss_conf->ibss_joined) {
  1650. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1651. if (!common->disable_ani) {
  1652. sc->sc_flags |= SC_OP_ANI_RUN;
  1653. ath_start_ani(common);
  1654. }
  1655. } else {
  1656. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1657. del_timer_sync(&common->ani.timer);
  1658. }
  1659. }
  1660. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1661. if ((changed & BSS_CHANGED_BEACON) ||
  1662. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1663. ath9k_set_beaconing_status(sc, false);
  1664. error = ath_beacon_alloc(sc, vif);
  1665. if (!error)
  1666. ath_beacon_config(sc, vif);
  1667. ath9k_set_beaconing_status(sc, true);
  1668. }
  1669. if (changed & BSS_CHANGED_ERP_SLOT) {
  1670. if (bss_conf->use_short_slot)
  1671. slottime = 9;
  1672. else
  1673. slottime = 20;
  1674. if (vif->type == NL80211_IFTYPE_AP) {
  1675. /*
  1676. * Defer update, so that connected stations can adjust
  1677. * their settings at the same time.
  1678. * See beacon.c for more details
  1679. */
  1680. sc->beacon.slottime = slottime;
  1681. sc->beacon.updateslot = UPDATE;
  1682. } else {
  1683. ah->slottime = slottime;
  1684. ath9k_hw_init_global_settings(ah);
  1685. }
  1686. }
  1687. /* Disable transmission of beacons */
  1688. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1689. !bss_conf->enable_beacon) {
  1690. ath9k_set_beaconing_status(sc, false);
  1691. avp->is_bslot_active = false;
  1692. ath9k_set_beaconing_status(sc, true);
  1693. }
  1694. if (changed & BSS_CHANGED_BEACON_INT) {
  1695. /*
  1696. * In case of AP mode, the HW TSF has to be reset
  1697. * when the beacon interval changes.
  1698. */
  1699. if (vif->type == NL80211_IFTYPE_AP) {
  1700. sc->sc_flags |= SC_OP_TSF_RESET;
  1701. ath9k_set_beaconing_status(sc, false);
  1702. error = ath_beacon_alloc(sc, vif);
  1703. if (!error)
  1704. ath_beacon_config(sc, vif);
  1705. ath9k_set_beaconing_status(sc, true);
  1706. } else
  1707. ath_beacon_config(sc, vif);
  1708. }
  1709. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1710. ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n",
  1711. bss_conf->use_short_preamble);
  1712. if (bss_conf->use_short_preamble)
  1713. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1714. else
  1715. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1716. }
  1717. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1718. ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n",
  1719. bss_conf->use_cts_prot);
  1720. if (bss_conf->use_cts_prot &&
  1721. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1722. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1723. else
  1724. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1725. }
  1726. mutex_unlock(&sc->mutex);
  1727. ath9k_ps_restore(sc);
  1728. }
  1729. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1730. {
  1731. struct ath_softc *sc = hw->priv;
  1732. u64 tsf;
  1733. mutex_lock(&sc->mutex);
  1734. ath9k_ps_wakeup(sc);
  1735. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1736. ath9k_ps_restore(sc);
  1737. mutex_unlock(&sc->mutex);
  1738. return tsf;
  1739. }
  1740. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1741. struct ieee80211_vif *vif,
  1742. u64 tsf)
  1743. {
  1744. struct ath_softc *sc = hw->priv;
  1745. mutex_lock(&sc->mutex);
  1746. ath9k_ps_wakeup(sc);
  1747. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1748. ath9k_ps_restore(sc);
  1749. mutex_unlock(&sc->mutex);
  1750. }
  1751. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1752. {
  1753. struct ath_softc *sc = hw->priv;
  1754. mutex_lock(&sc->mutex);
  1755. ath9k_ps_wakeup(sc);
  1756. ath9k_hw_reset_tsf(sc->sc_ah);
  1757. ath9k_ps_restore(sc);
  1758. mutex_unlock(&sc->mutex);
  1759. }
  1760. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1761. struct ieee80211_vif *vif,
  1762. enum ieee80211_ampdu_mlme_action action,
  1763. struct ieee80211_sta *sta,
  1764. u16 tid, u16 *ssn, u8 buf_size)
  1765. {
  1766. struct ath_softc *sc = hw->priv;
  1767. int ret = 0;
  1768. local_bh_disable();
  1769. switch (action) {
  1770. case IEEE80211_AMPDU_RX_START:
  1771. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1772. ret = -ENOTSUPP;
  1773. break;
  1774. case IEEE80211_AMPDU_RX_STOP:
  1775. break;
  1776. case IEEE80211_AMPDU_TX_START:
  1777. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1778. return -EOPNOTSUPP;
  1779. ath9k_ps_wakeup(sc);
  1780. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1781. if (!ret)
  1782. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1783. ath9k_ps_restore(sc);
  1784. break;
  1785. case IEEE80211_AMPDU_TX_STOP:
  1786. ath9k_ps_wakeup(sc);
  1787. ath_tx_aggr_stop(sc, sta, tid);
  1788. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1789. ath9k_ps_restore(sc);
  1790. break;
  1791. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1792. ath9k_ps_wakeup(sc);
  1793. ath_tx_aggr_resume(sc, sta, tid);
  1794. ath9k_ps_restore(sc);
  1795. break;
  1796. default:
  1797. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1798. }
  1799. local_bh_enable();
  1800. return ret;
  1801. }
  1802. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1803. struct survey_info *survey)
  1804. {
  1805. struct ath_softc *sc = hw->priv;
  1806. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1807. struct ieee80211_supported_band *sband;
  1808. struct ieee80211_channel *chan;
  1809. unsigned long flags;
  1810. int pos;
  1811. spin_lock_irqsave(&common->cc_lock, flags);
  1812. if (idx == 0)
  1813. ath_update_survey_stats(sc);
  1814. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1815. if (sband && idx >= sband->n_channels) {
  1816. idx -= sband->n_channels;
  1817. sband = NULL;
  1818. }
  1819. if (!sband)
  1820. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1821. if (!sband || idx >= sband->n_channels) {
  1822. spin_unlock_irqrestore(&common->cc_lock, flags);
  1823. return -ENOENT;
  1824. }
  1825. chan = &sband->channels[idx];
  1826. pos = chan->hw_value;
  1827. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1828. survey->channel = chan;
  1829. spin_unlock_irqrestore(&common->cc_lock, flags);
  1830. return 0;
  1831. }
  1832. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1833. {
  1834. struct ath_softc *sc = hw->priv;
  1835. struct ath_hw *ah = sc->sc_ah;
  1836. mutex_lock(&sc->mutex);
  1837. ah->coverage_class = coverage_class;
  1838. ath9k_ps_wakeup(sc);
  1839. ath9k_hw_init_global_settings(ah);
  1840. ath9k_ps_restore(sc);
  1841. mutex_unlock(&sc->mutex);
  1842. }
  1843. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1844. {
  1845. struct ath_softc *sc = hw->priv;
  1846. struct ath_hw *ah = sc->sc_ah;
  1847. struct ath_common *common = ath9k_hw_common(ah);
  1848. int timeout = 200; /* ms */
  1849. int i, j;
  1850. bool drain_txq;
  1851. mutex_lock(&sc->mutex);
  1852. cancel_delayed_work_sync(&sc->tx_complete_work);
  1853. if (ah->ah_flags & AH_UNPLUGGED) {
  1854. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1855. mutex_unlock(&sc->mutex);
  1856. return;
  1857. }
  1858. if (sc->sc_flags & SC_OP_INVALID) {
  1859. ath_dbg(common, ANY, "Device not present\n");
  1860. mutex_unlock(&sc->mutex);
  1861. return;
  1862. }
  1863. for (j = 0; j < timeout; j++) {
  1864. bool npend = false;
  1865. if (j)
  1866. usleep_range(1000, 2000);
  1867. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1868. if (!ATH_TXQ_SETUP(sc, i))
  1869. continue;
  1870. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1871. if (npend)
  1872. break;
  1873. }
  1874. if (!npend)
  1875. break;
  1876. }
  1877. if (drop) {
  1878. ath9k_ps_wakeup(sc);
  1879. spin_lock_bh(&sc->sc_pcu_lock);
  1880. drain_txq = ath_drain_all_txq(sc, false);
  1881. spin_unlock_bh(&sc->sc_pcu_lock);
  1882. if (!drain_txq)
  1883. ath_reset(sc, false);
  1884. ath9k_ps_restore(sc);
  1885. ieee80211_wake_queues(hw);
  1886. }
  1887. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1888. mutex_unlock(&sc->mutex);
  1889. }
  1890. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1891. {
  1892. struct ath_softc *sc = hw->priv;
  1893. int i;
  1894. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1895. if (!ATH_TXQ_SETUP(sc, i))
  1896. continue;
  1897. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1898. return true;
  1899. }
  1900. return false;
  1901. }
  1902. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1903. {
  1904. struct ath_softc *sc = hw->priv;
  1905. struct ath_hw *ah = sc->sc_ah;
  1906. struct ieee80211_vif *vif;
  1907. struct ath_vif *avp;
  1908. struct ath_buf *bf;
  1909. struct ath_tx_status ts;
  1910. int status;
  1911. vif = sc->beacon.bslot[0];
  1912. if (!vif)
  1913. return 0;
  1914. avp = (void *)vif->drv_priv;
  1915. if (!avp->is_bslot_active)
  1916. return 0;
  1917. if (!sc->beacon.tx_processed) {
  1918. tasklet_disable(&sc->bcon_tasklet);
  1919. bf = avp->av_bcbuf;
  1920. if (!bf || !bf->bf_mpdu)
  1921. goto skip;
  1922. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1923. if (status == -EINPROGRESS)
  1924. goto skip;
  1925. sc->beacon.tx_processed = true;
  1926. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1927. skip:
  1928. tasklet_enable(&sc->bcon_tasklet);
  1929. }
  1930. return sc->beacon.tx_last;
  1931. }
  1932. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1933. struct ieee80211_low_level_stats *stats)
  1934. {
  1935. struct ath_softc *sc = hw->priv;
  1936. struct ath_hw *ah = sc->sc_ah;
  1937. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1938. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1939. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1940. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1941. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1942. return 0;
  1943. }
  1944. static u32 fill_chainmask(u32 cap, u32 new)
  1945. {
  1946. u32 filled = 0;
  1947. int i;
  1948. for (i = 0; cap && new; i++, cap >>= 1) {
  1949. if (!(cap & BIT(0)))
  1950. continue;
  1951. if (new & BIT(0))
  1952. filled |= BIT(i);
  1953. new >>= 1;
  1954. }
  1955. return filled;
  1956. }
  1957. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1958. {
  1959. struct ath_softc *sc = hw->priv;
  1960. struct ath_hw *ah = sc->sc_ah;
  1961. if (!rx_ant || !tx_ant)
  1962. return -EINVAL;
  1963. sc->ant_rx = rx_ant;
  1964. sc->ant_tx = tx_ant;
  1965. if (ah->caps.rx_chainmask == 1)
  1966. return 0;
  1967. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1968. if (AR_SREV_9100(ah))
  1969. ah->rxchainmask = 0x7;
  1970. else
  1971. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1972. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1973. ath9k_reload_chainmask_settings(sc);
  1974. return 0;
  1975. }
  1976. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1977. {
  1978. struct ath_softc *sc = hw->priv;
  1979. *tx_ant = sc->ant_tx;
  1980. *rx_ant = sc->ant_rx;
  1981. return 0;
  1982. }
  1983. struct ieee80211_ops ath9k_ops = {
  1984. .tx = ath9k_tx,
  1985. .start = ath9k_start,
  1986. .stop = ath9k_stop,
  1987. .add_interface = ath9k_add_interface,
  1988. .change_interface = ath9k_change_interface,
  1989. .remove_interface = ath9k_remove_interface,
  1990. .config = ath9k_config,
  1991. .configure_filter = ath9k_configure_filter,
  1992. .sta_add = ath9k_sta_add,
  1993. .sta_remove = ath9k_sta_remove,
  1994. .sta_notify = ath9k_sta_notify,
  1995. .conf_tx = ath9k_conf_tx,
  1996. .bss_info_changed = ath9k_bss_info_changed,
  1997. .set_key = ath9k_set_key,
  1998. .get_tsf = ath9k_get_tsf,
  1999. .set_tsf = ath9k_set_tsf,
  2000. .reset_tsf = ath9k_reset_tsf,
  2001. .ampdu_action = ath9k_ampdu_action,
  2002. .get_survey = ath9k_get_survey,
  2003. .rfkill_poll = ath9k_rfkill_poll_state,
  2004. .set_coverage_class = ath9k_set_coverage_class,
  2005. .flush = ath9k_flush,
  2006. .tx_frames_pending = ath9k_tx_frames_pending,
  2007. .tx_last_beacon = ath9k_tx_last_beacon,
  2008. .get_stats = ath9k_get_stats,
  2009. .set_antenna = ath9k_set_antenna,
  2010. .get_antenna = ath9k_get_antenna,
  2011. };