nic.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382
  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2006-2011 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #ifndef EFX_NIC_H
  11. #define EFX_NIC_H
  12. #include <linux/i2c-algo-bit.h>
  13. #include "net_driver.h"
  14. #include "efx.h"
  15. #include "mcdi.h"
  16. #include "spi.h"
  17. /*
  18. * Falcon hardware control
  19. */
  20. enum {
  21. EFX_REV_FALCON_A0 = 0,
  22. EFX_REV_FALCON_A1 = 1,
  23. EFX_REV_FALCON_B0 = 2,
  24. EFX_REV_SIENA_A0 = 3,
  25. };
  26. static inline int efx_nic_rev(struct efx_nic *efx)
  27. {
  28. return efx->type->revision;
  29. }
  30. extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
  31. static inline bool efx_nic_has_mc(struct efx_nic *efx)
  32. {
  33. return efx_nic_rev(efx) >= EFX_REV_SIENA_A0;
  34. }
  35. /* NIC has two interlinked PCI functions for the same port. */
  36. static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
  37. {
  38. return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
  39. }
  40. enum {
  41. PHY_TYPE_NONE = 0,
  42. PHY_TYPE_TXC43128 = 1,
  43. PHY_TYPE_88E1111 = 2,
  44. PHY_TYPE_SFX7101 = 3,
  45. PHY_TYPE_QT2022C2 = 4,
  46. PHY_TYPE_PM8358 = 6,
  47. PHY_TYPE_SFT9001A = 8,
  48. PHY_TYPE_QT2025C = 9,
  49. PHY_TYPE_SFT9001B = 10,
  50. };
  51. #define FALCON_XMAC_LOOPBACKS \
  52. ((1 << LOOPBACK_XGMII) | \
  53. (1 << LOOPBACK_XGXS) | \
  54. (1 << LOOPBACK_XAUI))
  55. #define FALCON_GMAC_LOOPBACKS \
  56. (1 << LOOPBACK_GMAC)
  57. /* Alignment of PCIe DMA boundaries (4KB) */
  58. #define EFX_PAGE_SIZE 4096
  59. /* Size and alignment of buffer table entries (same) */
  60. #define EFX_BUF_SIZE EFX_PAGE_SIZE
  61. /**
  62. * struct falcon_board_type - board operations and type information
  63. * @id: Board type id, as found in NVRAM
  64. * @ref_model: Model number of Solarflare reference design
  65. * @gen_type: Generic board type description
  66. * @init: Allocate resources and initialise peripheral hardware
  67. * @init_phy: Do board-specific PHY initialisation
  68. * @fini: Shut down hardware and free resources
  69. * @set_id_led: Set state of identifying LED or revert to automatic function
  70. * @monitor: Board-specific health check function
  71. */
  72. struct falcon_board_type {
  73. u8 id;
  74. const char *ref_model;
  75. const char *gen_type;
  76. int (*init) (struct efx_nic *nic);
  77. void (*init_phy) (struct efx_nic *efx);
  78. void (*fini) (struct efx_nic *nic);
  79. void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
  80. int (*monitor) (struct efx_nic *nic);
  81. };
  82. /**
  83. * struct falcon_board - board information
  84. * @type: Type of board
  85. * @major: Major rev. ('A', 'B' ...)
  86. * @minor: Minor rev. (0, 1, ...)
  87. * @i2c_adap: I2C adapter for on-board peripherals
  88. * @i2c_data: Data for bit-banging algorithm
  89. * @hwmon_client: I2C client for hardware monitor
  90. * @ioexp_client: I2C client for power/port control
  91. */
  92. struct falcon_board {
  93. const struct falcon_board_type *type;
  94. int major;
  95. int minor;
  96. struct i2c_adapter i2c_adap;
  97. struct i2c_algo_bit_data i2c_data;
  98. struct i2c_client *hwmon_client, *ioexp_client;
  99. };
  100. /**
  101. * struct falcon_nic_data - Falcon NIC state
  102. * @pci_dev2: Secondary function of Falcon A
  103. * @board: Board state and functions
  104. * @stats_disable_count: Nest count for disabling statistics fetches
  105. * @stats_pending: Is there a pending DMA of MAC statistics.
  106. * @stats_timer: A timer for regularly fetching MAC statistics.
  107. * @stats_dma_done: Pointer to the flag which indicates DMA completion.
  108. * @spi_flash: SPI flash device
  109. * @spi_eeprom: SPI EEPROM device
  110. * @spi_lock: SPI bus lock
  111. * @mdio_lock: MDIO bus lock
  112. * @xmac_poll_required: XMAC link state needs polling
  113. */
  114. struct falcon_nic_data {
  115. struct pci_dev *pci_dev2;
  116. struct falcon_board board;
  117. unsigned int stats_disable_count;
  118. bool stats_pending;
  119. struct timer_list stats_timer;
  120. u32 *stats_dma_done;
  121. struct efx_spi_device spi_flash;
  122. struct efx_spi_device spi_eeprom;
  123. struct mutex spi_lock;
  124. struct mutex mdio_lock;
  125. bool xmac_poll_required;
  126. };
  127. static inline struct falcon_board *falcon_board(struct efx_nic *efx)
  128. {
  129. struct falcon_nic_data *data = efx->nic_data;
  130. return &data->board;
  131. }
  132. /**
  133. * struct siena_nic_data - Siena NIC state
  134. * @mcdi: Management-Controller-to-Driver Interface
  135. * @wol_filter_id: Wake-on-LAN packet filter id
  136. * @hwmon: Hardware monitor state
  137. */
  138. struct siena_nic_data {
  139. struct efx_mcdi_iface mcdi;
  140. int wol_filter_id;
  141. #ifdef CONFIG_SFC_MCDI_MON
  142. struct efx_mcdi_mon hwmon;
  143. #endif
  144. };
  145. #ifdef CONFIG_SFC_MCDI_MON
  146. static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
  147. {
  148. struct siena_nic_data *nic_data;
  149. EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  150. nic_data = efx->nic_data;
  151. return &nic_data->hwmon;
  152. }
  153. #endif
  154. /*
  155. * On the SFC9000 family each port is associated with 1 PCI physical
  156. * function (PF) handled by sfc and a configurable number of virtual
  157. * functions (VFs) that may be handled by some other driver, often in
  158. * a VM guest. The queue pointer registers are mapped in both PF and
  159. * VF BARs such that an 8K region provides access to a single RX, TX
  160. * and event queue (collectively a Virtual Interface, VI or VNIC).
  161. *
  162. * The PF has access to all 1024 VIs while VFs are mapped to VIs
  163. * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
  164. * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
  165. * The number of VIs and the VI_SCALE value are configurable but must
  166. * be established at boot time by firmware.
  167. */
  168. /* Maximum VI_SCALE parameter supported by Siena */
  169. #define EFX_VI_SCALE_MAX 6
  170. /* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
  171. * so this is the smallest allowed value. */
  172. #define EFX_VI_BASE 128U
  173. /* Maximum number of VFs allowed */
  174. #define EFX_VF_COUNT_MAX 127
  175. /* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
  176. #define EFX_MAX_VF_EVQ_SIZE 8192UL
  177. /* The number of buffer table entries reserved for each VI on a VF */
  178. #define EFX_VF_BUFTBL_PER_VI \
  179. ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
  180. sizeof(efx_qword_t) / EFX_BUF_SIZE)
  181. #ifdef CONFIG_SFC_SRIOV
  182. static inline bool efx_sriov_wanted(struct efx_nic *efx)
  183. {
  184. return efx->vf_count != 0;
  185. }
  186. static inline bool efx_sriov_enabled(struct efx_nic *efx)
  187. {
  188. return efx->vf_init_count != 0;
  189. }
  190. static inline unsigned int efx_vf_size(struct efx_nic *efx)
  191. {
  192. return 1 << efx->vi_scale;
  193. }
  194. extern int efx_init_sriov(void);
  195. extern void efx_sriov_probe(struct efx_nic *efx);
  196. extern int efx_sriov_init(struct efx_nic *efx);
  197. extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
  198. extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
  199. extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
  200. extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
  201. extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
  202. extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
  203. extern void efx_sriov_reset(struct efx_nic *efx);
  204. extern void efx_sriov_fini(struct efx_nic *efx);
  205. extern void efx_fini_sriov(void);
  206. #else
  207. static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
  208. static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
  209. static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
  210. static inline int efx_init_sriov(void) { return 0; }
  211. static inline void efx_sriov_probe(struct efx_nic *efx) {}
  212. static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
  213. static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
  214. static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
  215. efx_qword_t *event) {}
  216. static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
  217. efx_qword_t *event) {}
  218. static inline void efx_sriov_event(struct efx_channel *channel,
  219. efx_qword_t *event) {}
  220. static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
  221. static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
  222. static inline void efx_sriov_reset(struct efx_nic *efx) {}
  223. static inline void efx_sriov_fini(struct efx_nic *efx) {}
  224. static inline void efx_fini_sriov(void) {}
  225. #endif
  226. extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
  227. extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
  228. u16 vlan, u8 qos);
  229. extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
  230. struct ifla_vf_info *ivf);
  231. extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
  232. bool spoofchk);
  233. extern const struct efx_nic_type falcon_a1_nic_type;
  234. extern const struct efx_nic_type falcon_b0_nic_type;
  235. extern const struct efx_nic_type siena_a0_nic_type;
  236. /**************************************************************************
  237. *
  238. * Externs
  239. *
  240. **************************************************************************
  241. */
  242. extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
  243. /* TX data path */
  244. extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
  245. extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
  246. extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
  247. extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
  248. extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
  249. /* RX data path */
  250. extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
  251. extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
  252. extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
  253. extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
  254. extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
  255. extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
  256. /* Event data path */
  257. extern int efx_nic_probe_eventq(struct efx_channel *channel);
  258. extern void efx_nic_init_eventq(struct efx_channel *channel);
  259. extern void efx_nic_fini_eventq(struct efx_channel *channel);
  260. extern void efx_nic_remove_eventq(struct efx_channel *channel);
  261. extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
  262. extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
  263. extern bool efx_nic_event_present(struct efx_channel *channel);
  264. /* MAC/PHY */
  265. extern void falcon_drain_tx_fifo(struct efx_nic *efx);
  266. extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
  267. extern bool falcon_xmac_check_fault(struct efx_nic *efx);
  268. extern int falcon_reconfigure_xmac(struct efx_nic *efx);
  269. extern void falcon_update_stats_xmac(struct efx_nic *efx);
  270. /* Interrupts and test events */
  271. extern int efx_nic_init_interrupt(struct efx_nic *efx);
  272. extern void efx_nic_enable_interrupts(struct efx_nic *efx);
  273. extern void efx_nic_generate_test_event(struct efx_channel *channel);
  274. extern void efx_nic_generate_interrupt(struct efx_nic *efx);
  275. extern void efx_nic_disable_interrupts(struct efx_nic *efx);
  276. extern void efx_nic_fini_interrupt(struct efx_nic *efx);
  277. extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
  278. extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
  279. extern void falcon_irq_ack_a1(struct efx_nic *efx);
  280. /* Global Resources */
  281. extern int efx_nic_flush_queues(struct efx_nic *efx);
  282. extern void falcon_start_nic_stats(struct efx_nic *efx);
  283. extern void falcon_stop_nic_stats(struct efx_nic *efx);
  284. extern void falcon_setup_xaui(struct efx_nic *efx);
  285. extern int falcon_reset_xaui(struct efx_nic *efx);
  286. extern void
  287. efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
  288. extern void efx_nic_init_common(struct efx_nic *efx);
  289. extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
  290. int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
  291. unsigned int len);
  292. void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
  293. /* Tests */
  294. struct efx_nic_register_test {
  295. unsigned address;
  296. efx_oword_t mask;
  297. };
  298. extern int efx_nic_test_registers(struct efx_nic *efx,
  299. const struct efx_nic_register_test *regs,
  300. size_t n_regs);
  301. extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
  302. extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
  303. /**************************************************************************
  304. *
  305. * Falcon MAC stats
  306. *
  307. **************************************************************************
  308. */
  309. #define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
  310. #define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
  311. /* Retrieve statistic from statistics block */
  312. #define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
  313. if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
  314. (efx)->mac_stats.efx_stat += le16_to_cpu( \
  315. *((__force __le16 *) \
  316. (efx->stats_buffer.addr + \
  317. FALCON_STAT_OFFSET(falcon_stat)))); \
  318. else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
  319. (efx)->mac_stats.efx_stat += le32_to_cpu( \
  320. *((__force __le32 *) \
  321. (efx->stats_buffer.addr + \
  322. FALCON_STAT_OFFSET(falcon_stat)))); \
  323. else \
  324. (efx)->mac_stats.efx_stat += le64_to_cpu( \
  325. *((__force __le64 *) \
  326. (efx->stats_buffer.addr + \
  327. FALCON_STAT_OFFSET(falcon_stat)))); \
  328. } while (0)
  329. #define FALCON_MAC_STATS_SIZE 0x100
  330. #define MAC_DATA_LBN 0
  331. #define MAC_DATA_WIDTH 32
  332. extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
  333. efx_qword_t *event);
  334. extern void falcon_poll_xmac(struct efx_nic *efx);
  335. #endif /* EFX_NIC_H */