ixgbe_dcb_nl.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804
  1. /*******************************************************************************
  2. Intel 10 Gigabit PCI Express Linux driver
  3. Copyright(c) 1999 - 2012 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "ixgbe.h"
  22. #include <linux/dcbnl.h>
  23. #include "ixgbe_dcb_82598.h"
  24. #include "ixgbe_dcb_82599.h"
  25. /* Callbacks for DCB netlink in the kernel */
  26. #define BIT_DCB_MODE 0x01
  27. #define BIT_PFC 0x02
  28. #define BIT_PG_RX 0x04
  29. #define BIT_PG_TX 0x08
  30. #define BIT_APP_UPCHG 0x10
  31. #define BIT_LINKSPEED 0x80
  32. /* Responses for the DCB_C_SET_ALL command */
  33. #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
  34. #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
  35. #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
  36. int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
  37. struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
  38. {
  39. struct tc_configuration *src_tc_cfg = NULL;
  40. struct tc_configuration *dst_tc_cfg = NULL;
  41. int i;
  42. if (!src_dcb_cfg || !dst_dcb_cfg)
  43. return -EINVAL;
  44. for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
  45. src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
  46. dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
  47. dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
  48. src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
  49. dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
  50. src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
  51. dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
  52. src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
  53. dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
  54. src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
  55. dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
  56. src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
  57. dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
  58. src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
  59. dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
  60. src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
  61. dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
  62. src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
  63. }
  64. for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
  65. dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
  66. [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
  67. [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
  68. dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
  69. [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
  70. [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
  71. }
  72. for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
  73. dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
  74. src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
  75. }
  76. dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
  77. return 0;
  78. }
  79. static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
  80. {
  81. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  82. return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
  83. }
  84. static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
  85. {
  86. int err = 0;
  87. u8 prio_tc[MAX_USER_PRIORITY] = {0};
  88. int i;
  89. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  90. /* Fail command if not in CEE mode */
  91. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
  92. return 1;
  93. /* verify there is something to do, if not then exit */
  94. if (!!state != !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
  95. goto out;
  96. if (state > 0) {
  97. err = ixgbe_setup_tc(netdev, adapter->dcb_cfg.num_tcs.pg_tcs);
  98. ixgbe_dcb_unpack_map(&adapter->dcb_cfg, DCB_TX_CONFIG, prio_tc);
  99. } else {
  100. err = ixgbe_setup_tc(netdev, 0);
  101. }
  102. if (err)
  103. goto out;
  104. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  105. netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
  106. out:
  107. return err ? 1 : 0;
  108. }
  109. static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  110. u8 *perm_addr)
  111. {
  112. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  113. int i, j;
  114. memset(perm_addr, 0xff, MAX_ADDR_LEN);
  115. for (i = 0; i < netdev->addr_len; i++)
  116. perm_addr[i] = adapter->hw.mac.perm_addr[i];
  117. switch (adapter->hw.mac.type) {
  118. case ixgbe_mac_82599EB:
  119. case ixgbe_mac_X540:
  120. for (j = 0; j < netdev->addr_len; j++, i++)
  121. perm_addr[i] = adapter->hw.mac.san_addr[j];
  122. break;
  123. default:
  124. break;
  125. }
  126. }
  127. static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
  128. u8 prio, u8 bwg_id, u8 bw_pct,
  129. u8 up_map)
  130. {
  131. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  132. if (prio != DCB_ATTR_VALUE_UNDEFINED)
  133. adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
  134. if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
  135. adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
  136. if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
  137. adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
  138. bw_pct;
  139. if (up_map != DCB_ATTR_VALUE_UNDEFINED)
  140. adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
  141. up_map;
  142. if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
  143. adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
  144. (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
  145. adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
  146. (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
  147. adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
  148. (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
  149. adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap))
  150. adapter->dcb_set_bitmap |= BIT_PG_TX;
  151. if (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
  152. adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap)
  153. adapter->dcb_set_bitmap |= BIT_PFC | BIT_APP_UPCHG;
  154. }
  155. static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
  156. u8 bw_pct)
  157. {
  158. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  159. adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
  160. if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
  161. adapter->dcb_cfg.bw_percentage[0][bwg_id])
  162. adapter->dcb_set_bitmap |= BIT_PG_TX;
  163. }
  164. static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
  165. u8 prio, u8 bwg_id, u8 bw_pct,
  166. u8 up_map)
  167. {
  168. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  169. if (prio != DCB_ATTR_VALUE_UNDEFINED)
  170. adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
  171. if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
  172. adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
  173. if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
  174. adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
  175. bw_pct;
  176. if (up_map != DCB_ATTR_VALUE_UNDEFINED)
  177. adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
  178. up_map;
  179. if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
  180. adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
  181. (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
  182. adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
  183. (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
  184. adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
  185. (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
  186. adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap))
  187. adapter->dcb_set_bitmap |= BIT_PG_RX;
  188. if (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
  189. adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap)
  190. adapter->dcb_set_bitmap |= BIT_PFC;
  191. }
  192. static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
  193. u8 bw_pct)
  194. {
  195. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  196. adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
  197. if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
  198. adapter->dcb_cfg.bw_percentage[1][bwg_id])
  199. adapter->dcb_set_bitmap |= BIT_PG_RX;
  200. }
  201. static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
  202. u8 *prio, u8 *bwg_id, u8 *bw_pct,
  203. u8 *up_map)
  204. {
  205. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  206. *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
  207. *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
  208. *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
  209. *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
  210. }
  211. static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
  212. u8 *bw_pct)
  213. {
  214. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  215. *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
  216. }
  217. static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
  218. u8 *prio, u8 *bwg_id, u8 *bw_pct,
  219. u8 *up_map)
  220. {
  221. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  222. *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
  223. *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
  224. *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
  225. *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
  226. }
  227. static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
  228. u8 *bw_pct)
  229. {
  230. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  231. *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
  232. }
  233. static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
  234. u8 setting)
  235. {
  236. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  237. adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
  238. if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
  239. adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
  240. adapter->dcb_set_bitmap |= BIT_PFC;
  241. adapter->temp_dcb_cfg.pfc_mode_enable = true;
  242. }
  243. }
  244. static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
  245. u8 *setting)
  246. {
  247. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  248. *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
  249. }
  250. #ifdef IXGBE_FCOE
  251. static void ixgbe_dcbnl_devreset(struct net_device *dev)
  252. {
  253. struct ixgbe_adapter *adapter = netdev_priv(dev);
  254. while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
  255. usleep_range(1000, 2000);
  256. if (netif_running(dev))
  257. dev->netdev_ops->ndo_stop(dev);
  258. ixgbe_clear_interrupt_scheme(adapter);
  259. ixgbe_init_interrupt_scheme(adapter);
  260. if (netif_running(dev))
  261. dev->netdev_ops->ndo_open(dev);
  262. clear_bit(__IXGBE_RESETTING, &adapter->state);
  263. }
  264. #endif
  265. static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
  266. {
  267. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  268. int ret, i;
  269. #ifdef IXGBE_FCOE
  270. struct dcb_app app = {
  271. .selector = DCB_APP_IDTYPE_ETHTYPE,
  272. .protocol = ETH_P_FCOE,
  273. };
  274. u8 up;
  275. /* In IEEE mode, use the IEEE Ethertype selector value */
  276. if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) {
  277. app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
  278. up = dcb_ieee_getapp_mask(netdev, &app);
  279. } else {
  280. up = dcb_getapp(netdev, &app);
  281. }
  282. #endif
  283. /* Fail command if not in CEE mode */
  284. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
  285. return 1;
  286. ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
  287. MAX_TRAFFIC_CLASS);
  288. if (ret)
  289. return DCB_NO_HW_CHG;
  290. if (adapter->dcb_cfg.pfc_mode_enable) {
  291. switch (adapter->hw.mac.type) {
  292. case ixgbe_mac_82599EB:
  293. case ixgbe_mac_X540:
  294. if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
  295. adapter->last_lfc_mode =
  296. adapter->hw.fc.current_mode;
  297. break;
  298. default:
  299. break;
  300. }
  301. adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
  302. } else {
  303. switch (adapter->hw.mac.type) {
  304. case ixgbe_mac_82598EB:
  305. adapter->hw.fc.requested_mode = ixgbe_fc_none;
  306. break;
  307. case ixgbe_mac_82599EB:
  308. case ixgbe_mac_X540:
  309. adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
  310. break;
  311. default:
  312. break;
  313. }
  314. }
  315. if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
  316. u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
  317. u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
  318. /* Priority to TC mapping in CEE case default to 1:1 */
  319. u8 prio_tc[MAX_USER_PRIORITY];
  320. int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  321. #ifdef IXGBE_FCOE
  322. if (adapter->netdev->features & NETIF_F_FCOE_MTU)
  323. max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
  324. #endif
  325. ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
  326. max_frame, DCB_TX_CONFIG);
  327. ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
  328. max_frame, DCB_RX_CONFIG);
  329. ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
  330. DCB_TX_CONFIG, refill);
  331. ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
  332. ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
  333. DCB_TX_CONFIG, bwg_id);
  334. ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
  335. DCB_TX_CONFIG, prio_type);
  336. ixgbe_dcb_unpack_map(&adapter->dcb_cfg,
  337. DCB_TX_CONFIG, prio_tc);
  338. ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
  339. bwg_id, prio_type, prio_tc);
  340. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  341. netdev_set_prio_tc_map(netdev, i, prio_tc[i]);
  342. }
  343. if (adapter->dcb_set_bitmap & BIT_PFC) {
  344. u8 pfc_en;
  345. u8 prio_tc[MAX_USER_PRIORITY];
  346. ixgbe_dcb_unpack_map(&adapter->dcb_cfg,
  347. DCB_TX_CONFIG, prio_tc);
  348. ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
  349. ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en, prio_tc);
  350. ret = DCB_HW_CHG;
  351. }
  352. if (adapter->dcb_cfg.pfc_mode_enable)
  353. adapter->hw.fc.current_mode = ixgbe_fc_pfc;
  354. #ifdef IXGBE_FCOE
  355. /* Reprogam FCoE hardware offloads when the traffic class
  356. * FCoE is using changes. This happens if the APP info
  357. * changes or the up2tc mapping is updated.
  358. */
  359. if ((up && !(up & (1 << adapter->fcoe.up))) ||
  360. (adapter->dcb_set_bitmap & BIT_APP_UPCHG)) {
  361. adapter->fcoe.up = ffs(up) - 1;
  362. ixgbe_dcbnl_devreset(netdev);
  363. ret = DCB_HW_CHG_RST;
  364. }
  365. #endif
  366. adapter->dcb_set_bitmap = 0x00;
  367. return ret;
  368. }
  369. static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
  370. {
  371. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  372. switch (capid) {
  373. case DCB_CAP_ATTR_PG:
  374. *cap = true;
  375. break;
  376. case DCB_CAP_ATTR_PFC:
  377. *cap = true;
  378. break;
  379. case DCB_CAP_ATTR_UP2TC:
  380. *cap = false;
  381. break;
  382. case DCB_CAP_ATTR_PG_TCS:
  383. *cap = 0x80;
  384. break;
  385. case DCB_CAP_ATTR_PFC_TCS:
  386. *cap = 0x80;
  387. break;
  388. case DCB_CAP_ATTR_GSP:
  389. *cap = true;
  390. break;
  391. case DCB_CAP_ATTR_BCN:
  392. *cap = false;
  393. break;
  394. case DCB_CAP_ATTR_DCBX:
  395. *cap = adapter->dcbx_cap;
  396. break;
  397. default:
  398. *cap = false;
  399. break;
  400. }
  401. return 0;
  402. }
  403. static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
  404. {
  405. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  406. u8 rval = 0;
  407. if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
  408. switch (tcid) {
  409. case DCB_NUMTCS_ATTR_PG:
  410. *num = adapter->dcb_cfg.num_tcs.pg_tcs;
  411. break;
  412. case DCB_NUMTCS_ATTR_PFC:
  413. *num = adapter->dcb_cfg.num_tcs.pfc_tcs;
  414. break;
  415. default:
  416. rval = -EINVAL;
  417. break;
  418. }
  419. } else {
  420. rval = -EINVAL;
  421. }
  422. return rval;
  423. }
  424. static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
  425. {
  426. return -EINVAL;
  427. }
  428. static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
  429. {
  430. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  431. return adapter->dcb_cfg.pfc_mode_enable;
  432. }
  433. static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
  434. {
  435. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  436. adapter->temp_dcb_cfg.pfc_mode_enable = state;
  437. if (adapter->temp_dcb_cfg.pfc_mode_enable !=
  438. adapter->dcb_cfg.pfc_mode_enable)
  439. adapter->dcb_set_bitmap |= BIT_PFC;
  440. }
  441. /**
  442. * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
  443. * @netdev : the corresponding netdev
  444. * @idtype : identifies the id as ether type or TCP/UDP port number
  445. * @id: id is either ether type or TCP/UDP port number
  446. *
  447. * Returns : on success, returns a non-zero 802.1p user priority bitmap
  448. * otherwise returns 0 as the invalid user priority bitmap to indicate an
  449. * error.
  450. */
  451. static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
  452. {
  453. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  454. struct dcb_app app = {
  455. .selector = idtype,
  456. .protocol = id,
  457. };
  458. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
  459. return 0;
  460. return dcb_getapp(netdev, &app);
  461. }
  462. static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
  463. struct ieee_ets *ets)
  464. {
  465. struct ixgbe_adapter *adapter = netdev_priv(dev);
  466. struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
  467. ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs;
  468. /* No IEEE PFC settings available */
  469. if (!my_ets)
  470. return 0;
  471. ets->cbs = my_ets->cbs;
  472. memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
  473. memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
  474. memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
  475. memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
  476. return 0;
  477. }
  478. static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
  479. struct ieee_ets *ets)
  480. {
  481. struct ixgbe_adapter *adapter = netdev_priv(dev);
  482. int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
  483. int i, err = 0;
  484. __u8 max_tc = 0;
  485. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
  486. return -EINVAL;
  487. if (!adapter->ixgbe_ieee_ets) {
  488. adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
  489. GFP_KERNEL);
  490. if (!adapter->ixgbe_ieee_ets)
  491. return -ENOMEM;
  492. }
  493. memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
  494. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  495. if (ets->prio_tc[i] > max_tc)
  496. max_tc = ets->prio_tc[i];
  497. }
  498. if (max_tc)
  499. max_tc++;
  500. if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs)
  501. return -EINVAL;
  502. if (max_tc != netdev_get_num_tc(dev))
  503. err = ixgbe_setup_tc(dev, max_tc);
  504. if (err)
  505. goto err_out;
  506. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  507. netdev_set_prio_tc_map(dev, i, ets->prio_tc[i]);
  508. err = ixgbe_dcb_hw_ets(&adapter->hw, ets, max_frame);
  509. err_out:
  510. return err;
  511. }
  512. static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
  513. struct ieee_pfc *pfc)
  514. {
  515. struct ixgbe_adapter *adapter = netdev_priv(dev);
  516. struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
  517. int i;
  518. pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs;
  519. /* No IEEE PFC settings available */
  520. if (!my_pfc)
  521. return 0;
  522. pfc->pfc_en = my_pfc->pfc_en;
  523. pfc->mbc = my_pfc->mbc;
  524. pfc->delay = my_pfc->delay;
  525. for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
  526. pfc->requests[i] = adapter->stats.pxoffrxc[i];
  527. pfc->indications[i] = adapter->stats.pxofftxc[i];
  528. }
  529. return 0;
  530. }
  531. static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
  532. struct ieee_pfc *pfc)
  533. {
  534. struct ixgbe_adapter *adapter = netdev_priv(dev);
  535. u8 *prio_tc;
  536. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
  537. return -EINVAL;
  538. if (!adapter->ixgbe_ieee_pfc) {
  539. adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
  540. GFP_KERNEL);
  541. if (!adapter->ixgbe_ieee_pfc)
  542. return -ENOMEM;
  543. }
  544. prio_tc = adapter->ixgbe_ieee_ets->prio_tc;
  545. memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
  546. return ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en, prio_tc);
  547. }
  548. static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,
  549. struct dcb_app *app)
  550. {
  551. struct ixgbe_adapter *adapter = netdev_priv(dev);
  552. int err = -EINVAL;
  553. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
  554. return err;
  555. err = dcb_ieee_setapp(dev, app);
  556. #ifdef IXGBE_FCOE
  557. if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
  558. app->protocol == ETH_P_FCOE) {
  559. u8 app_mask = dcb_ieee_getapp_mask(dev, app);
  560. if (app_mask & (1 << adapter->fcoe.up))
  561. return err;
  562. adapter->fcoe.up = app->priority;
  563. ixgbe_dcbnl_devreset(dev);
  564. }
  565. #endif
  566. return 0;
  567. }
  568. static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,
  569. struct dcb_app *app)
  570. {
  571. struct ixgbe_adapter *adapter = netdev_priv(dev);
  572. int err;
  573. if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
  574. return -EINVAL;
  575. err = dcb_ieee_delapp(dev, app);
  576. #ifdef IXGBE_FCOE
  577. if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
  578. app->protocol == ETH_P_FCOE) {
  579. u8 app_mask = dcb_ieee_getapp_mask(dev, app);
  580. if (app_mask & (1 << adapter->fcoe.up))
  581. return err;
  582. adapter->fcoe.up = app_mask ?
  583. ffs(app_mask) - 1 : IXGBE_FCOE_DEFTC;
  584. ixgbe_dcbnl_devreset(dev);
  585. }
  586. #endif
  587. return err;
  588. }
  589. static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)
  590. {
  591. struct ixgbe_adapter *adapter = netdev_priv(dev);
  592. return adapter->dcbx_cap;
  593. }
  594. static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)
  595. {
  596. struct ixgbe_adapter *adapter = netdev_priv(dev);
  597. struct ieee_ets ets = {0};
  598. struct ieee_pfc pfc = {0};
  599. int err = 0;
  600. /* no support for LLD_MANAGED modes or CEE+IEEE */
  601. if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
  602. ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) ||
  603. !(mode & DCB_CAP_DCBX_HOST))
  604. return 1;
  605. if (mode == adapter->dcbx_cap)
  606. return 0;
  607. adapter->dcbx_cap = mode;
  608. /* ETS and PFC defaults */
  609. ets.ets_cap = 8;
  610. pfc.pfc_cap = 8;
  611. if (mode & DCB_CAP_DCBX_VER_IEEE) {
  612. ixgbe_dcbnl_ieee_setets(dev, &ets);
  613. ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
  614. } else if (mode & DCB_CAP_DCBX_VER_CEE) {
  615. u8 mask = BIT_PFC | BIT_PG_TX | BIT_PG_RX | BIT_APP_UPCHG;
  616. adapter->dcb_set_bitmap |= mask;
  617. ixgbe_dcbnl_set_all(dev);
  618. } else {
  619. /* Drop into single TC mode strict priority as this
  620. * indicates CEE and IEEE versions are disabled
  621. */
  622. ixgbe_dcbnl_ieee_setets(dev, &ets);
  623. ixgbe_dcbnl_ieee_setpfc(dev, &pfc);
  624. err = ixgbe_setup_tc(dev, 0);
  625. }
  626. return err ? 1 : 0;
  627. }
  628. const struct dcbnl_rtnl_ops dcbnl_ops = {
  629. .ieee_getets = ixgbe_dcbnl_ieee_getets,
  630. .ieee_setets = ixgbe_dcbnl_ieee_setets,
  631. .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
  632. .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
  633. .ieee_setapp = ixgbe_dcbnl_ieee_setapp,
  634. .ieee_delapp = ixgbe_dcbnl_ieee_delapp,
  635. .getstate = ixgbe_dcbnl_get_state,
  636. .setstate = ixgbe_dcbnl_set_state,
  637. .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
  638. .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
  639. .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
  640. .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
  641. .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
  642. .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
  643. .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
  644. .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
  645. .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
  646. .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
  647. .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
  648. .setall = ixgbe_dcbnl_set_all,
  649. .getcap = ixgbe_dcbnl_getcap,
  650. .getnumtcs = ixgbe_dcbnl_getnumtcs,
  651. .setnumtcs = ixgbe_dcbnl_setnumtcs,
  652. .getpfcstate = ixgbe_dcbnl_getpfcstate,
  653. .setpfcstate = ixgbe_dcbnl_setpfcstate,
  654. .getapp = ixgbe_dcbnl_getapp,
  655. .getdcbx = ixgbe_dcbnl_getdcbx,
  656. .setdcbx = ixgbe_dcbnl_setdcbx,
  657. };