patch_hdmi.c 75 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. struct hdmi_spec_per_cvt {
  45. hda_nid_t cvt_nid;
  46. int assigned;
  47. unsigned int channels_min;
  48. unsigned int channels_max;
  49. u32 rates;
  50. u64 formats;
  51. unsigned int maxbps;
  52. };
  53. /* max. connections to a widget */
  54. #define HDA_MAX_CONNECTIONS 32
  55. struct hdmi_spec_per_pin {
  56. hda_nid_t pin_nid;
  57. int num_mux_nids;
  58. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  59. struct hda_codec *codec;
  60. struct hdmi_eld sink_eld;
  61. struct delayed_work work;
  62. struct snd_kcontrol *eld_ctl;
  63. int repoll_count;
  64. bool non_pcm;
  65. bool chmap_set; /* channel-map override by ALSA API? */
  66. unsigned char chmap[8]; /* ALSA API channel-map */
  67. char pcm_name[8]; /* filled in build_pcm callbacks */
  68. };
  69. struct hdmi_spec {
  70. int num_cvts;
  71. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  72. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  73. int num_pins;
  74. struct snd_array pins; /* struct hdmi_spec_per_pin */
  75. struct snd_array pcm_rec; /* struct hda_pcm */
  76. unsigned int channels_max; /* max over all cvts */
  77. struct hdmi_eld temp_eld;
  78. /*
  79. * Non-generic ATI/NVIDIA specific
  80. */
  81. struct hda_multi_out multiout;
  82. struct hda_pcm_stream pcm_playback;
  83. };
  84. struct hdmi_audio_infoframe {
  85. u8 type; /* 0x84 */
  86. u8 ver; /* 0x01 */
  87. u8 len; /* 0x0a */
  88. u8 checksum;
  89. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  90. u8 SS01_SF24;
  91. u8 CXT04;
  92. u8 CA;
  93. u8 LFEPBL01_LSV36_DM_INH7;
  94. };
  95. struct dp_audio_infoframe {
  96. u8 type; /* 0x84 */
  97. u8 len; /* 0x1b */
  98. u8 ver; /* 0x11 << 2 */
  99. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  100. u8 SS01_SF24;
  101. u8 CXT04;
  102. u8 CA;
  103. u8 LFEPBL01_LSV36_DM_INH7;
  104. };
  105. union audio_infoframe {
  106. struct hdmi_audio_infoframe hdmi;
  107. struct dp_audio_infoframe dp;
  108. u8 bytes[0];
  109. };
  110. /*
  111. * CEA speaker placement:
  112. *
  113. * FLH FCH FRH
  114. * FLW FL FLC FC FRC FR FRW
  115. *
  116. * LFE
  117. * TC
  118. *
  119. * RL RLC RC RRC RR
  120. *
  121. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  122. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  123. */
  124. enum cea_speaker_placement {
  125. FL = (1 << 0), /* Front Left */
  126. FC = (1 << 1), /* Front Center */
  127. FR = (1 << 2), /* Front Right */
  128. FLC = (1 << 3), /* Front Left Center */
  129. FRC = (1 << 4), /* Front Right Center */
  130. RL = (1 << 5), /* Rear Left */
  131. RC = (1 << 6), /* Rear Center */
  132. RR = (1 << 7), /* Rear Right */
  133. RLC = (1 << 8), /* Rear Left Center */
  134. RRC = (1 << 9), /* Rear Right Center */
  135. LFE = (1 << 10), /* Low Frequency Effect */
  136. FLW = (1 << 11), /* Front Left Wide */
  137. FRW = (1 << 12), /* Front Right Wide */
  138. FLH = (1 << 13), /* Front Left High */
  139. FCH = (1 << 14), /* Front Center High */
  140. FRH = (1 << 15), /* Front Right High */
  141. TC = (1 << 16), /* Top Center */
  142. };
  143. /*
  144. * ELD SA bits in the CEA Speaker Allocation data block
  145. */
  146. static int eld_speaker_allocation_bits[] = {
  147. [0] = FL | FR,
  148. [1] = LFE,
  149. [2] = FC,
  150. [3] = RL | RR,
  151. [4] = RC,
  152. [5] = FLC | FRC,
  153. [6] = RLC | RRC,
  154. /* the following are not defined in ELD yet */
  155. [7] = FLW | FRW,
  156. [8] = FLH | FRH,
  157. [9] = TC,
  158. [10] = FCH,
  159. };
  160. struct cea_channel_speaker_allocation {
  161. int ca_index;
  162. int speakers[8];
  163. /* derived values, just for convenience */
  164. int channels;
  165. int spk_mask;
  166. };
  167. /*
  168. * ALSA sequence is:
  169. *
  170. * surround40 surround41 surround50 surround51 surround71
  171. * ch0 front left = = = =
  172. * ch1 front right = = = =
  173. * ch2 rear left = = = =
  174. * ch3 rear right = = = =
  175. * ch4 LFE center center center
  176. * ch5 LFE LFE
  177. * ch6 side left
  178. * ch7 side right
  179. *
  180. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  181. */
  182. static int hdmi_channel_mapping[0x32][8] = {
  183. /* stereo */
  184. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  185. /* 2.1 */
  186. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  187. /* Dolby Surround */
  188. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  189. /* surround40 */
  190. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  191. /* 4ch */
  192. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  193. /* surround41 */
  194. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  195. /* surround50 */
  196. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  197. /* surround51 */
  198. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  199. /* 7.1 */
  200. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  201. };
  202. /*
  203. * This is an ordered list!
  204. *
  205. * The preceding ones have better chances to be selected by
  206. * hdmi_channel_allocation().
  207. */
  208. static struct cea_channel_speaker_allocation channel_allocations[] = {
  209. /* channel: 7 6 5 4 3 2 1 0 */
  210. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  211. /* 2.1 */
  212. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  213. /* Dolby Surround */
  214. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  215. /* surround40 */
  216. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  217. /* surround41 */
  218. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  219. /* surround50 */
  220. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  221. /* surround51 */
  222. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  223. /* 6.1 */
  224. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  225. /* surround71 */
  226. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  227. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  228. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  229. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  230. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  231. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  232. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  233. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  234. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  235. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  236. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  237. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  238. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  239. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  240. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  241. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  242. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  243. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  244. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  245. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  246. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  247. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  248. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  249. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  250. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  251. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  252. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  253. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  254. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  255. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  256. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  257. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  258. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  259. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  260. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  261. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  262. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  263. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  264. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  265. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  266. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  267. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  268. };
  269. /*
  270. * HDMI routines
  271. */
  272. #define get_pin(spec, idx) \
  273. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  274. #define get_cvt(spec, idx) \
  275. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  276. #define get_pcm_rec(spec, idx) \
  277. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  278. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  279. {
  280. int pin_idx;
  281. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  282. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  283. return pin_idx;
  284. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  285. return -EINVAL;
  286. }
  287. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  288. struct hda_pcm_stream *hinfo)
  289. {
  290. int pin_idx;
  291. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  292. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  293. return pin_idx;
  294. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  295. return -EINVAL;
  296. }
  297. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  298. {
  299. int cvt_idx;
  300. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  301. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  302. return cvt_idx;
  303. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  304. return -EINVAL;
  305. }
  306. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  307. struct snd_ctl_elem_info *uinfo)
  308. {
  309. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  310. struct hdmi_spec *spec = codec->spec;
  311. struct hdmi_eld *eld;
  312. int pin_idx;
  313. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  314. pin_idx = kcontrol->private_value;
  315. eld = &get_pin(spec, pin_idx)->sink_eld;
  316. mutex_lock(&eld->lock);
  317. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  318. mutex_unlock(&eld->lock);
  319. return 0;
  320. }
  321. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  322. struct snd_ctl_elem_value *ucontrol)
  323. {
  324. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  325. struct hdmi_spec *spec = codec->spec;
  326. struct hdmi_eld *eld;
  327. int pin_idx;
  328. pin_idx = kcontrol->private_value;
  329. eld = &get_pin(spec, pin_idx)->sink_eld;
  330. mutex_lock(&eld->lock);
  331. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  332. mutex_unlock(&eld->lock);
  333. snd_BUG();
  334. return -EINVAL;
  335. }
  336. memset(ucontrol->value.bytes.data, 0,
  337. ARRAY_SIZE(ucontrol->value.bytes.data));
  338. if (eld->eld_valid)
  339. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  340. eld->eld_size);
  341. mutex_unlock(&eld->lock);
  342. return 0;
  343. }
  344. static struct snd_kcontrol_new eld_bytes_ctl = {
  345. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  346. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  347. .name = "ELD",
  348. .info = hdmi_eld_ctl_info,
  349. .get = hdmi_eld_ctl_get,
  350. };
  351. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  352. int device)
  353. {
  354. struct snd_kcontrol *kctl;
  355. struct hdmi_spec *spec = codec->spec;
  356. int err;
  357. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  358. if (!kctl)
  359. return -ENOMEM;
  360. kctl->private_value = pin_idx;
  361. kctl->id.device = device;
  362. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  363. if (err < 0)
  364. return err;
  365. get_pin(spec, pin_idx)->eld_ctl = kctl;
  366. return 0;
  367. }
  368. #ifdef BE_PARANOID
  369. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  370. int *packet_index, int *byte_index)
  371. {
  372. int val;
  373. val = snd_hda_codec_read(codec, pin_nid, 0,
  374. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  375. *packet_index = val >> 5;
  376. *byte_index = val & 0x1f;
  377. }
  378. #endif
  379. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  380. int packet_index, int byte_index)
  381. {
  382. int val;
  383. val = (packet_index << 5) | (byte_index & 0x1f);
  384. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  385. }
  386. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  387. unsigned char val)
  388. {
  389. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  390. }
  391. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  392. {
  393. /* Unmute */
  394. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  395. snd_hda_codec_write(codec, pin_nid, 0,
  396. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  397. /* Enable pin out: some machines with GM965 gets broken output when
  398. * the pin is disabled or changed while using with HDMI
  399. */
  400. snd_hda_codec_write(codec, pin_nid, 0,
  401. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  402. }
  403. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  404. {
  405. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  406. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  407. }
  408. static void hdmi_set_channel_count(struct hda_codec *codec,
  409. hda_nid_t cvt_nid, int chs)
  410. {
  411. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  412. snd_hda_codec_write(codec, cvt_nid, 0,
  413. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  414. }
  415. /*
  416. * Channel mapping routines
  417. */
  418. /*
  419. * Compute derived values in channel_allocations[].
  420. */
  421. static void init_channel_allocations(void)
  422. {
  423. int i, j;
  424. struct cea_channel_speaker_allocation *p;
  425. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  426. p = channel_allocations + i;
  427. p->channels = 0;
  428. p->spk_mask = 0;
  429. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  430. if (p->speakers[j]) {
  431. p->channels++;
  432. p->spk_mask |= p->speakers[j];
  433. }
  434. }
  435. }
  436. static int get_channel_allocation_order(int ca)
  437. {
  438. int i;
  439. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  440. if (channel_allocations[i].ca_index == ca)
  441. break;
  442. }
  443. return i;
  444. }
  445. /*
  446. * The transformation takes two steps:
  447. *
  448. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  449. * spk_mask => (channel_allocations[]) => ai->CA
  450. *
  451. * TODO: it could select the wrong CA from multiple candidates.
  452. */
  453. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  454. {
  455. int i;
  456. int ca = 0;
  457. int spk_mask = 0;
  458. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  459. /*
  460. * CA defaults to 0 for basic stereo audio
  461. */
  462. if (channels <= 2)
  463. return 0;
  464. /*
  465. * expand ELD's speaker allocation mask
  466. *
  467. * ELD tells the speaker mask in a compact(paired) form,
  468. * expand ELD's notions to match the ones used by Audio InfoFrame.
  469. */
  470. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  471. if (eld->info.spk_alloc & (1 << i))
  472. spk_mask |= eld_speaker_allocation_bits[i];
  473. }
  474. /* search for the first working match in the CA table */
  475. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  476. if (channels == channel_allocations[i].channels &&
  477. (spk_mask & channel_allocations[i].spk_mask) ==
  478. channel_allocations[i].spk_mask) {
  479. ca = channel_allocations[i].ca_index;
  480. break;
  481. }
  482. }
  483. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  484. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  485. ca, channels, buf);
  486. return ca;
  487. }
  488. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  489. hda_nid_t pin_nid)
  490. {
  491. #ifdef CONFIG_SND_DEBUG_VERBOSE
  492. int i;
  493. int slot;
  494. for (i = 0; i < 8; i++) {
  495. slot = snd_hda_codec_read(codec, pin_nid, 0,
  496. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  497. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  498. slot >> 4, slot & 0xf);
  499. }
  500. #endif
  501. }
  502. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  503. hda_nid_t pin_nid,
  504. bool non_pcm,
  505. int ca)
  506. {
  507. int i;
  508. int err;
  509. int order;
  510. int non_pcm_mapping[8];
  511. order = get_channel_allocation_order(ca);
  512. if (hdmi_channel_mapping[ca][1] == 0) {
  513. for (i = 0; i < channel_allocations[order].channels; i++)
  514. hdmi_channel_mapping[ca][i] = i | (i << 4);
  515. for (; i < 8; i++)
  516. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  517. }
  518. if (non_pcm) {
  519. for (i = 0; i < channel_allocations[order].channels; i++)
  520. non_pcm_mapping[i] = i | (i << 4);
  521. for (; i < 8; i++)
  522. non_pcm_mapping[i] = 0xf | (i << 4);
  523. }
  524. for (i = 0; i < 8; i++) {
  525. err = snd_hda_codec_write(codec, pin_nid, 0,
  526. AC_VERB_SET_HDMI_CHAN_SLOT,
  527. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  528. if (err) {
  529. snd_printdd(KERN_NOTICE
  530. "HDMI: channel mapping failed\n");
  531. break;
  532. }
  533. }
  534. hdmi_debug_channel_mapping(codec, pin_nid);
  535. }
  536. struct channel_map_table {
  537. unsigned char map; /* ALSA API channel map position */
  538. unsigned char cea_slot; /* CEA slot value */
  539. int spk_mask; /* speaker position bit mask */
  540. };
  541. static struct channel_map_table map_tables[] = {
  542. { SNDRV_CHMAP_FL, 0x00, FL },
  543. { SNDRV_CHMAP_FR, 0x01, FR },
  544. { SNDRV_CHMAP_RL, 0x04, RL },
  545. { SNDRV_CHMAP_RR, 0x05, RR },
  546. { SNDRV_CHMAP_LFE, 0x02, LFE },
  547. { SNDRV_CHMAP_FC, 0x03, FC },
  548. { SNDRV_CHMAP_RLC, 0x06, RLC },
  549. { SNDRV_CHMAP_RRC, 0x07, RRC },
  550. {} /* terminator */
  551. };
  552. /* from ALSA API channel position to speaker bit mask */
  553. static int to_spk_mask(unsigned char c)
  554. {
  555. struct channel_map_table *t = map_tables;
  556. for (; t->map; t++) {
  557. if (t->map == c)
  558. return t->spk_mask;
  559. }
  560. return 0;
  561. }
  562. /* from ALSA API channel position to CEA slot */
  563. static int to_cea_slot(unsigned char c)
  564. {
  565. struct channel_map_table *t = map_tables;
  566. for (; t->map; t++) {
  567. if (t->map == c)
  568. return t->cea_slot;
  569. }
  570. return 0x0f;
  571. }
  572. /* from CEA slot to ALSA API channel position */
  573. static int from_cea_slot(unsigned char c)
  574. {
  575. struct channel_map_table *t = map_tables;
  576. for (; t->map; t++) {
  577. if (t->cea_slot == c)
  578. return t->map;
  579. }
  580. return 0;
  581. }
  582. /* from speaker bit mask to ALSA API channel position */
  583. static int spk_to_chmap(int spk)
  584. {
  585. struct channel_map_table *t = map_tables;
  586. for (; t->map; t++) {
  587. if (t->spk_mask == spk)
  588. return t->map;
  589. }
  590. return 0;
  591. }
  592. /* get the CA index corresponding to the given ALSA API channel map */
  593. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  594. {
  595. int i, spks = 0, spk_mask = 0;
  596. for (i = 0; i < chs; i++) {
  597. int mask = to_spk_mask(map[i]);
  598. if (mask) {
  599. spk_mask |= mask;
  600. spks++;
  601. }
  602. }
  603. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  604. if ((chs == channel_allocations[i].channels ||
  605. spks == channel_allocations[i].channels) &&
  606. (spk_mask & channel_allocations[i].spk_mask) ==
  607. channel_allocations[i].spk_mask)
  608. return channel_allocations[i].ca_index;
  609. }
  610. return -1;
  611. }
  612. /* set up the channel slots for the given ALSA API channel map */
  613. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  614. hda_nid_t pin_nid,
  615. int chs, unsigned char *map)
  616. {
  617. int i;
  618. for (i = 0; i < 8; i++) {
  619. int val, err;
  620. if (i < chs)
  621. val = to_cea_slot(map[i]);
  622. else
  623. val = 0xf;
  624. val |= (i << 4);
  625. err = snd_hda_codec_write(codec, pin_nid, 0,
  626. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  627. if (err)
  628. return -EINVAL;
  629. }
  630. return 0;
  631. }
  632. /* store ALSA API channel map from the current default map */
  633. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  634. {
  635. int i;
  636. for (i = 0; i < 8; i++) {
  637. if (i < channel_allocations[ca].channels)
  638. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  639. else
  640. map[i] = 0;
  641. }
  642. }
  643. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  644. hda_nid_t pin_nid, bool non_pcm, int ca,
  645. int channels, unsigned char *map,
  646. bool chmap_set)
  647. {
  648. if (!non_pcm && chmap_set) {
  649. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  650. channels, map);
  651. } else {
  652. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  653. hdmi_setup_fake_chmap(map, ca);
  654. }
  655. }
  656. /*
  657. * Audio InfoFrame routines
  658. */
  659. /*
  660. * Enable Audio InfoFrame Transmission
  661. */
  662. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  663. hda_nid_t pin_nid)
  664. {
  665. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  666. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  667. AC_DIPXMIT_BEST);
  668. }
  669. /*
  670. * Disable Audio InfoFrame Transmission
  671. */
  672. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  673. hda_nid_t pin_nid)
  674. {
  675. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  676. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  677. AC_DIPXMIT_DISABLE);
  678. }
  679. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  680. {
  681. #ifdef CONFIG_SND_DEBUG_VERBOSE
  682. int i;
  683. int size;
  684. size = snd_hdmi_get_eld_size(codec, pin_nid);
  685. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  686. for (i = 0; i < 8; i++) {
  687. size = snd_hda_codec_read(codec, pin_nid, 0,
  688. AC_VERB_GET_HDMI_DIP_SIZE, i);
  689. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  690. }
  691. #endif
  692. }
  693. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  694. {
  695. #ifdef BE_PARANOID
  696. int i, j;
  697. int size;
  698. int pi, bi;
  699. for (i = 0; i < 8; i++) {
  700. size = snd_hda_codec_read(codec, pin_nid, 0,
  701. AC_VERB_GET_HDMI_DIP_SIZE, i);
  702. if (size == 0)
  703. continue;
  704. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  705. for (j = 1; j < 1000; j++) {
  706. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  707. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  708. if (pi != i)
  709. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  710. bi, pi, i);
  711. if (bi == 0) /* byte index wrapped around */
  712. break;
  713. }
  714. snd_printd(KERN_INFO
  715. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  716. i, size, j);
  717. }
  718. #endif
  719. }
  720. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  721. {
  722. u8 *bytes = (u8 *)hdmi_ai;
  723. u8 sum = 0;
  724. int i;
  725. hdmi_ai->checksum = 0;
  726. for (i = 0; i < sizeof(*hdmi_ai); i++)
  727. sum += bytes[i];
  728. hdmi_ai->checksum = -sum;
  729. }
  730. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  731. hda_nid_t pin_nid,
  732. u8 *dip, int size)
  733. {
  734. int i;
  735. hdmi_debug_dip_size(codec, pin_nid);
  736. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  737. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  738. for (i = 0; i < size; i++)
  739. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  740. }
  741. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  742. u8 *dip, int size)
  743. {
  744. u8 val;
  745. int i;
  746. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  747. != AC_DIPXMIT_BEST)
  748. return false;
  749. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  750. for (i = 0; i < size; i++) {
  751. val = snd_hda_codec_read(codec, pin_nid, 0,
  752. AC_VERB_GET_HDMI_DIP_DATA, 0);
  753. if (val != dip[i])
  754. return false;
  755. }
  756. return true;
  757. }
  758. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  759. bool non_pcm,
  760. struct snd_pcm_substream *substream)
  761. {
  762. struct hdmi_spec *spec = codec->spec;
  763. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  764. hda_nid_t pin_nid = per_pin->pin_nid;
  765. int channels = substream->runtime->channels;
  766. struct hdmi_eld *eld;
  767. int ca;
  768. union audio_infoframe ai;
  769. eld = &per_pin->sink_eld;
  770. if (!eld->monitor_present)
  771. return;
  772. if (!non_pcm && per_pin->chmap_set)
  773. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  774. else
  775. ca = hdmi_channel_allocation(eld, channels);
  776. if (ca < 0)
  777. ca = 0;
  778. memset(&ai, 0, sizeof(ai));
  779. if (eld->info.conn_type == 0) { /* HDMI */
  780. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  781. hdmi_ai->type = 0x84;
  782. hdmi_ai->ver = 0x01;
  783. hdmi_ai->len = 0x0a;
  784. hdmi_ai->CC02_CT47 = channels - 1;
  785. hdmi_ai->CA = ca;
  786. hdmi_checksum_audio_infoframe(hdmi_ai);
  787. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  788. struct dp_audio_infoframe *dp_ai = &ai.dp;
  789. dp_ai->type = 0x84;
  790. dp_ai->len = 0x1b;
  791. dp_ai->ver = 0x11 << 2;
  792. dp_ai->CC02_CT47 = channels - 1;
  793. dp_ai->CA = ca;
  794. } else {
  795. snd_printd("HDMI: unknown connection type at pin %d\n",
  796. pin_nid);
  797. return;
  798. }
  799. /*
  800. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  801. * sizeof(*dp_ai) to avoid partial match/update problems when
  802. * the user switches between HDMI/DP monitors.
  803. */
  804. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  805. sizeof(ai))) {
  806. snd_printdd("hdmi_setup_audio_infoframe: "
  807. "pin=%d channels=%d\n",
  808. pin_nid,
  809. channels);
  810. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  811. channels, per_pin->chmap,
  812. per_pin->chmap_set);
  813. hdmi_stop_infoframe_trans(codec, pin_nid);
  814. hdmi_fill_audio_infoframe(codec, pin_nid,
  815. ai.bytes, sizeof(ai));
  816. hdmi_start_infoframe_trans(codec, pin_nid);
  817. } else {
  818. /* For non-pcm audio switch, setup new channel mapping
  819. * accordingly */
  820. if (per_pin->non_pcm != non_pcm)
  821. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  822. channels, per_pin->chmap,
  823. per_pin->chmap_set);
  824. }
  825. per_pin->non_pcm = non_pcm;
  826. }
  827. /*
  828. * Unsolicited events
  829. */
  830. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  831. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  832. {
  833. struct hdmi_spec *spec = codec->spec;
  834. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  835. int pin_nid;
  836. int pin_idx;
  837. struct hda_jack_tbl *jack;
  838. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  839. if (!jack)
  840. return;
  841. pin_nid = jack->nid;
  842. jack->jack_dirty = 1;
  843. _snd_printd(SND_PR_VERBOSE,
  844. "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  845. codec->addr, pin_nid,
  846. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  847. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  848. if (pin_idx < 0)
  849. return;
  850. hdmi_present_sense(get_pin(spec, pin_idx), 1);
  851. snd_hda_jack_report_sync(codec);
  852. }
  853. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  854. {
  855. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  856. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  857. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  858. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  859. printk(KERN_INFO
  860. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  861. codec->addr,
  862. tag,
  863. subtag,
  864. cp_state,
  865. cp_ready);
  866. /* TODO */
  867. if (cp_state)
  868. ;
  869. if (cp_ready)
  870. ;
  871. }
  872. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  873. {
  874. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  875. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  876. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  877. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  878. return;
  879. }
  880. if (subtag == 0)
  881. hdmi_intrinsic_event(codec, res);
  882. else
  883. hdmi_non_intrinsic_event(codec, res);
  884. }
  885. static void haswell_verify_pin_D0(struct hda_codec *codec,
  886. hda_nid_t cvt_nid, hda_nid_t nid)
  887. {
  888. int pwr, lamp, ramp;
  889. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  890. * thus pins could only choose converter 0 for use. Make sure the
  891. * converters are in correct power state */
  892. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  893. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  894. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  895. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  896. AC_PWRST_D0);
  897. msleep(40);
  898. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  899. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  900. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  901. }
  902. lamp = snd_hda_codec_read(codec, nid, 0,
  903. AC_VERB_GET_AMP_GAIN_MUTE,
  904. AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
  905. ramp = snd_hda_codec_read(codec, nid, 0,
  906. AC_VERB_GET_AMP_GAIN_MUTE,
  907. AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
  908. if (lamp != ramp) {
  909. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  910. AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
  911. lamp = snd_hda_codec_read(codec, nid, 0,
  912. AC_VERB_GET_AMP_GAIN_MUTE,
  913. AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
  914. ramp = snd_hda_codec_read(codec, nid, 0,
  915. AC_VERB_GET_AMP_GAIN_MUTE,
  916. AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
  917. snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
  918. }
  919. }
  920. /*
  921. * Callbacks
  922. */
  923. /* HBR should be Non-PCM, 8 channels */
  924. #define is_hbr_format(format) \
  925. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  926. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  927. hda_nid_t pin_nid, u32 stream_tag, int format)
  928. {
  929. int pinctl;
  930. int new_pinctl = 0;
  931. if (codec->vendor_id == 0x80862807)
  932. haswell_verify_pin_D0(codec, cvt_nid, pin_nid);
  933. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  934. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  935. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  936. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  937. if (is_hbr_format(format))
  938. new_pinctl |= AC_PINCTL_EPT_HBR;
  939. else
  940. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  941. snd_printdd("hdmi_setup_stream: "
  942. "NID=0x%x, %spinctl=0x%x\n",
  943. pin_nid,
  944. pinctl == new_pinctl ? "" : "new-",
  945. new_pinctl);
  946. if (pinctl != new_pinctl)
  947. snd_hda_codec_write(codec, pin_nid, 0,
  948. AC_VERB_SET_PIN_WIDGET_CONTROL,
  949. new_pinctl);
  950. }
  951. if (is_hbr_format(format) && !new_pinctl) {
  952. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  953. return -EINVAL;
  954. }
  955. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  956. return 0;
  957. }
  958. static int hdmi_choose_cvt(struct hda_codec *codec,
  959. int pin_idx, int *cvt_id, int *mux_id)
  960. {
  961. struct hdmi_spec *spec = codec->spec;
  962. struct hdmi_spec_per_pin *per_pin;
  963. struct hdmi_spec_per_cvt *per_cvt = NULL;
  964. int cvt_idx, mux_idx = 0;
  965. per_pin = get_pin(spec, pin_idx);
  966. /* Dynamically assign converter to stream */
  967. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  968. per_cvt = get_cvt(spec, cvt_idx);
  969. /* Must not already be assigned */
  970. if (per_cvt->assigned)
  971. continue;
  972. /* Must be in pin's mux's list of converters */
  973. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  974. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  975. break;
  976. /* Not in mux list */
  977. if (mux_idx == per_pin->num_mux_nids)
  978. continue;
  979. break;
  980. }
  981. /* No free converters */
  982. if (cvt_idx == spec->num_cvts)
  983. return -ENODEV;
  984. if (cvt_id)
  985. *cvt_id = cvt_idx;
  986. if (mux_id)
  987. *mux_id = mux_idx;
  988. return 0;
  989. }
  990. static void haswell_config_cvts(struct hda_codec *codec,
  991. int pin_id, int mux_id)
  992. {
  993. struct hdmi_spec *spec = codec->spec;
  994. struct hdmi_spec_per_pin *per_pin;
  995. int pin_idx, mux_idx;
  996. int curr;
  997. int err;
  998. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  999. per_pin = get_pin(spec, pin_idx);
  1000. if (pin_idx == pin_id)
  1001. continue;
  1002. curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
  1003. AC_VERB_GET_CONNECT_SEL, 0);
  1004. /* Choose another unused converter */
  1005. if (curr == mux_id) {
  1006. err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx);
  1007. if (err < 0)
  1008. return;
  1009. snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx);
  1010. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1011. AC_VERB_SET_CONNECT_SEL,
  1012. mux_idx);
  1013. }
  1014. }
  1015. }
  1016. /*
  1017. * HDA PCM callbacks
  1018. */
  1019. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1020. struct hda_codec *codec,
  1021. struct snd_pcm_substream *substream)
  1022. {
  1023. struct hdmi_spec *spec = codec->spec;
  1024. struct snd_pcm_runtime *runtime = substream->runtime;
  1025. int pin_idx, cvt_idx, mux_idx = 0;
  1026. struct hdmi_spec_per_pin *per_pin;
  1027. struct hdmi_eld *eld;
  1028. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1029. int err;
  1030. /* Validate hinfo */
  1031. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1032. if (snd_BUG_ON(pin_idx < 0))
  1033. return -EINVAL;
  1034. per_pin = get_pin(spec, pin_idx);
  1035. eld = &per_pin->sink_eld;
  1036. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1037. if (err < 0)
  1038. return err;
  1039. per_cvt = get_cvt(spec, cvt_idx);
  1040. /* Claim converter */
  1041. per_cvt->assigned = 1;
  1042. hinfo->nid = per_cvt->cvt_nid;
  1043. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1044. AC_VERB_SET_CONNECT_SEL,
  1045. mux_idx);
  1046. /* configure unused pins to choose other converters */
  1047. if (codec->vendor_id == 0x80862807)
  1048. haswell_config_cvts(codec, pin_idx, mux_idx);
  1049. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1050. /* Initially set the converter's capabilities */
  1051. hinfo->channels_min = per_cvt->channels_min;
  1052. hinfo->channels_max = per_cvt->channels_max;
  1053. hinfo->rates = per_cvt->rates;
  1054. hinfo->formats = per_cvt->formats;
  1055. hinfo->maxbps = per_cvt->maxbps;
  1056. /* Restrict capabilities by ELD if this isn't disabled */
  1057. if (!static_hdmi_pcm && eld->eld_valid) {
  1058. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1059. if (hinfo->channels_min > hinfo->channels_max ||
  1060. !hinfo->rates || !hinfo->formats) {
  1061. per_cvt->assigned = 0;
  1062. hinfo->nid = 0;
  1063. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1064. return -ENODEV;
  1065. }
  1066. }
  1067. /* Store the updated parameters */
  1068. runtime->hw.channels_min = hinfo->channels_min;
  1069. runtime->hw.channels_max = hinfo->channels_max;
  1070. runtime->hw.formats = hinfo->formats;
  1071. runtime->hw.rates = hinfo->rates;
  1072. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1073. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1074. return 0;
  1075. }
  1076. /*
  1077. * HDA/HDMI auto parsing
  1078. */
  1079. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1080. {
  1081. struct hdmi_spec *spec = codec->spec;
  1082. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1083. hda_nid_t pin_nid = per_pin->pin_nid;
  1084. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1085. snd_printk(KERN_WARNING
  1086. "HDMI: pin %d wcaps %#x "
  1087. "does not support connection list\n",
  1088. pin_nid, get_wcaps(codec, pin_nid));
  1089. return -EINVAL;
  1090. }
  1091. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1092. per_pin->mux_nids,
  1093. HDA_MAX_CONNECTIONS);
  1094. return 0;
  1095. }
  1096. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1097. {
  1098. struct hda_codec *codec = per_pin->codec;
  1099. struct hdmi_spec *spec = codec->spec;
  1100. struct hdmi_eld *eld = &spec->temp_eld;
  1101. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1102. hda_nid_t pin_nid = per_pin->pin_nid;
  1103. /*
  1104. * Always execute a GetPinSense verb here, even when called from
  1105. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1106. * response's PD bit is not the real PD value, but indicates that
  1107. * the real PD value changed. An older version of the HD-audio
  1108. * specification worked this way. Hence, we just ignore the data in
  1109. * the unsolicited response to avoid custom WARs.
  1110. */
  1111. int present = snd_hda_pin_sense(codec, pin_nid);
  1112. bool update_eld = false;
  1113. bool eld_changed = false;
  1114. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1115. if (pin_eld->monitor_present)
  1116. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1117. else
  1118. eld->eld_valid = false;
  1119. _snd_printd(SND_PR_VERBOSE,
  1120. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1121. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1122. if (eld->eld_valid) {
  1123. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1124. &eld->eld_size) < 0)
  1125. eld->eld_valid = false;
  1126. else {
  1127. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1128. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1129. eld->eld_size) < 0)
  1130. eld->eld_valid = false;
  1131. }
  1132. if (eld->eld_valid) {
  1133. snd_hdmi_show_eld(&eld->info);
  1134. update_eld = true;
  1135. }
  1136. else if (repoll) {
  1137. queue_delayed_work(codec->bus->workq,
  1138. &per_pin->work,
  1139. msecs_to_jiffies(300));
  1140. return;
  1141. }
  1142. }
  1143. mutex_lock(&pin_eld->lock);
  1144. if (pin_eld->eld_valid && !eld->eld_valid) {
  1145. update_eld = true;
  1146. eld_changed = true;
  1147. }
  1148. if (update_eld) {
  1149. pin_eld->eld_valid = eld->eld_valid;
  1150. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1151. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1152. eld->eld_size) != 0;
  1153. if (eld_changed)
  1154. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1155. eld->eld_size);
  1156. pin_eld->eld_size = eld->eld_size;
  1157. pin_eld->info = eld->info;
  1158. }
  1159. mutex_unlock(&pin_eld->lock);
  1160. if (eld_changed)
  1161. snd_ctl_notify(codec->bus->card,
  1162. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1163. &per_pin->eld_ctl->id);
  1164. }
  1165. static void hdmi_repoll_eld(struct work_struct *work)
  1166. {
  1167. struct hdmi_spec_per_pin *per_pin =
  1168. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1169. if (per_pin->repoll_count++ > 6)
  1170. per_pin->repoll_count = 0;
  1171. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1172. }
  1173. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1174. hda_nid_t nid);
  1175. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1176. {
  1177. struct hdmi_spec *spec = codec->spec;
  1178. unsigned int caps, config;
  1179. int pin_idx;
  1180. struct hdmi_spec_per_pin *per_pin;
  1181. int err;
  1182. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1183. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1184. return 0;
  1185. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1186. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1187. return 0;
  1188. if (codec->vendor_id == 0x80862807)
  1189. intel_haswell_fixup_connect_list(codec, pin_nid);
  1190. pin_idx = spec->num_pins;
  1191. per_pin = snd_array_new(&spec->pins);
  1192. if (!per_pin)
  1193. return -ENOMEM;
  1194. per_pin->pin_nid = pin_nid;
  1195. per_pin->non_pcm = false;
  1196. err = hdmi_read_pin_conn(codec, pin_idx);
  1197. if (err < 0)
  1198. return err;
  1199. spec->num_pins++;
  1200. return 0;
  1201. }
  1202. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1203. {
  1204. struct hdmi_spec *spec = codec->spec;
  1205. struct hdmi_spec_per_cvt *per_cvt;
  1206. unsigned int chans;
  1207. int err;
  1208. chans = get_wcaps(codec, cvt_nid);
  1209. chans = get_wcaps_channels(chans);
  1210. per_cvt = snd_array_new(&spec->cvts);
  1211. if (!per_cvt)
  1212. return -ENOMEM;
  1213. per_cvt->cvt_nid = cvt_nid;
  1214. per_cvt->channels_min = 2;
  1215. if (chans <= 16) {
  1216. per_cvt->channels_max = chans;
  1217. if (chans > spec->channels_max)
  1218. spec->channels_max = chans;
  1219. }
  1220. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1221. &per_cvt->rates,
  1222. &per_cvt->formats,
  1223. &per_cvt->maxbps);
  1224. if (err < 0)
  1225. return err;
  1226. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1227. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1228. spec->num_cvts++;
  1229. return 0;
  1230. }
  1231. static int hdmi_parse_codec(struct hda_codec *codec)
  1232. {
  1233. hda_nid_t nid;
  1234. int i, nodes;
  1235. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1236. if (!nid || nodes < 0) {
  1237. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1238. return -EINVAL;
  1239. }
  1240. for (i = 0; i < nodes; i++, nid++) {
  1241. unsigned int caps;
  1242. unsigned int type;
  1243. caps = get_wcaps(codec, nid);
  1244. type = get_wcaps_type(caps);
  1245. if (!(caps & AC_WCAP_DIGITAL))
  1246. continue;
  1247. switch (type) {
  1248. case AC_WID_AUD_OUT:
  1249. hdmi_add_cvt(codec, nid);
  1250. break;
  1251. case AC_WID_PIN:
  1252. hdmi_add_pin(codec, nid);
  1253. break;
  1254. }
  1255. }
  1256. #ifdef CONFIG_PM
  1257. /* We're seeing some problems with unsolicited hot plug events on
  1258. * PantherPoint after S3, if this is not enabled */
  1259. if (codec->vendor_id == 0x80862806)
  1260. codec->bus->power_keep_link_on = 1;
  1261. /*
  1262. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1263. * can be lost and presence sense verb will become inaccurate if the
  1264. * HDA link is powered off at hot plug or hw initialization time.
  1265. */
  1266. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1267. AC_PWRST_EPSS))
  1268. codec->bus->power_keep_link_on = 1;
  1269. #endif
  1270. return 0;
  1271. }
  1272. /*
  1273. */
  1274. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1275. {
  1276. struct hda_spdif_out *spdif;
  1277. bool non_pcm;
  1278. mutex_lock(&codec->spdif_mutex);
  1279. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1280. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1281. mutex_unlock(&codec->spdif_mutex);
  1282. return non_pcm;
  1283. }
  1284. /*
  1285. * HDMI callbacks
  1286. */
  1287. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1288. struct hda_codec *codec,
  1289. unsigned int stream_tag,
  1290. unsigned int format,
  1291. struct snd_pcm_substream *substream)
  1292. {
  1293. hda_nid_t cvt_nid = hinfo->nid;
  1294. struct hdmi_spec *spec = codec->spec;
  1295. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1296. hda_nid_t pin_nid = get_pin(spec, pin_idx)->pin_nid;
  1297. bool non_pcm;
  1298. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1299. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1300. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1301. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1302. }
  1303. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1304. struct hda_codec *codec,
  1305. struct snd_pcm_substream *substream)
  1306. {
  1307. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1308. return 0;
  1309. }
  1310. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1311. struct hda_codec *codec,
  1312. struct snd_pcm_substream *substream)
  1313. {
  1314. struct hdmi_spec *spec = codec->spec;
  1315. int cvt_idx, pin_idx;
  1316. struct hdmi_spec_per_cvt *per_cvt;
  1317. struct hdmi_spec_per_pin *per_pin;
  1318. if (hinfo->nid) {
  1319. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1320. if (snd_BUG_ON(cvt_idx < 0))
  1321. return -EINVAL;
  1322. per_cvt = get_cvt(spec, cvt_idx);
  1323. snd_BUG_ON(!per_cvt->assigned);
  1324. per_cvt->assigned = 0;
  1325. hinfo->nid = 0;
  1326. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1327. if (snd_BUG_ON(pin_idx < 0))
  1328. return -EINVAL;
  1329. per_pin = get_pin(spec, pin_idx);
  1330. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1331. per_pin->chmap_set = false;
  1332. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1333. }
  1334. return 0;
  1335. }
  1336. static const struct hda_pcm_ops generic_ops = {
  1337. .open = hdmi_pcm_open,
  1338. .close = hdmi_pcm_close,
  1339. .prepare = generic_hdmi_playback_pcm_prepare,
  1340. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1341. };
  1342. /*
  1343. * ALSA API channel-map control callbacks
  1344. */
  1345. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1346. struct snd_ctl_elem_info *uinfo)
  1347. {
  1348. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1349. struct hda_codec *codec = info->private_data;
  1350. struct hdmi_spec *spec = codec->spec;
  1351. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1352. uinfo->count = spec->channels_max;
  1353. uinfo->value.integer.min = 0;
  1354. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1355. return 0;
  1356. }
  1357. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1358. unsigned int size, unsigned int __user *tlv)
  1359. {
  1360. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1361. struct hda_codec *codec = info->private_data;
  1362. struct hdmi_spec *spec = codec->spec;
  1363. const unsigned int valid_mask =
  1364. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1365. unsigned int __user *dst;
  1366. int chs, count = 0;
  1367. if (size < 8)
  1368. return -ENOMEM;
  1369. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1370. return -EFAULT;
  1371. size -= 8;
  1372. dst = tlv + 2;
  1373. for (chs = 2; chs <= spec->channels_max; chs++) {
  1374. int i, c;
  1375. struct cea_channel_speaker_allocation *cap;
  1376. cap = channel_allocations;
  1377. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1378. int chs_bytes = chs * 4;
  1379. if (cap->channels != chs)
  1380. continue;
  1381. if (cap->spk_mask & ~valid_mask)
  1382. continue;
  1383. if (size < 8)
  1384. return -ENOMEM;
  1385. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1386. put_user(chs_bytes, dst + 1))
  1387. return -EFAULT;
  1388. dst += 2;
  1389. size -= 8;
  1390. count += 8;
  1391. if (size < chs_bytes)
  1392. return -ENOMEM;
  1393. size -= chs_bytes;
  1394. count += chs_bytes;
  1395. for (c = 7; c >= 0; c--) {
  1396. int spk = cap->speakers[c];
  1397. if (!spk)
  1398. continue;
  1399. if (put_user(spk_to_chmap(spk), dst))
  1400. return -EFAULT;
  1401. dst++;
  1402. }
  1403. }
  1404. }
  1405. if (put_user(count, tlv + 1))
  1406. return -EFAULT;
  1407. return 0;
  1408. }
  1409. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1410. struct snd_ctl_elem_value *ucontrol)
  1411. {
  1412. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1413. struct hda_codec *codec = info->private_data;
  1414. struct hdmi_spec *spec = codec->spec;
  1415. int pin_idx = kcontrol->private_value;
  1416. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1417. int i;
  1418. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1419. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1420. return 0;
  1421. }
  1422. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1423. struct snd_ctl_elem_value *ucontrol)
  1424. {
  1425. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1426. struct hda_codec *codec = info->private_data;
  1427. struct hdmi_spec *spec = codec->spec;
  1428. int pin_idx = kcontrol->private_value;
  1429. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1430. unsigned int ctl_idx;
  1431. struct snd_pcm_substream *substream;
  1432. unsigned char chmap[8];
  1433. int i, ca, prepared = 0;
  1434. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1435. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1436. if (!substream || !substream->runtime)
  1437. return 0; /* just for avoiding error from alsactl restore */
  1438. switch (substream->runtime->status->state) {
  1439. case SNDRV_PCM_STATE_OPEN:
  1440. case SNDRV_PCM_STATE_SETUP:
  1441. break;
  1442. case SNDRV_PCM_STATE_PREPARED:
  1443. prepared = 1;
  1444. break;
  1445. default:
  1446. return -EBUSY;
  1447. }
  1448. memset(chmap, 0, sizeof(chmap));
  1449. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1450. chmap[i] = ucontrol->value.integer.value[i];
  1451. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1452. return 0;
  1453. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1454. if (ca < 0)
  1455. return -EINVAL;
  1456. per_pin->chmap_set = true;
  1457. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1458. if (prepared)
  1459. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1460. substream);
  1461. return 0;
  1462. }
  1463. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1464. {
  1465. struct hdmi_spec *spec = codec->spec;
  1466. int pin_idx;
  1467. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1468. struct hda_pcm *info;
  1469. struct hda_pcm_stream *pstr;
  1470. struct hdmi_spec_per_pin *per_pin;
  1471. per_pin = get_pin(spec, pin_idx);
  1472. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1473. info = snd_array_new(&spec->pcm_rec);
  1474. if (!info)
  1475. return -ENOMEM;
  1476. info->name = per_pin->pcm_name;
  1477. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1478. info->own_chmap = true;
  1479. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1480. pstr->substreams = 1;
  1481. pstr->ops = generic_ops;
  1482. /* other pstr fields are set in open */
  1483. }
  1484. codec->num_pcms = spec->num_pins;
  1485. codec->pcm_info = spec->pcm_rec.list;
  1486. return 0;
  1487. }
  1488. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1489. {
  1490. char hdmi_str[32] = "HDMI/DP";
  1491. struct hdmi_spec *spec = codec->spec;
  1492. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1493. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1494. if (pcmdev > 0)
  1495. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1496. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1497. strncat(hdmi_str, " Phantom",
  1498. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1499. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1500. }
  1501. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1502. {
  1503. struct hdmi_spec *spec = codec->spec;
  1504. int err;
  1505. int pin_idx;
  1506. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1507. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1508. err = generic_hdmi_build_jack(codec, pin_idx);
  1509. if (err < 0)
  1510. return err;
  1511. err = snd_hda_create_dig_out_ctls(codec,
  1512. per_pin->pin_nid,
  1513. per_pin->mux_nids[0],
  1514. HDA_PCM_TYPE_HDMI);
  1515. if (err < 0)
  1516. return err;
  1517. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1518. /* add control for ELD Bytes */
  1519. err = hdmi_create_eld_ctl(codec, pin_idx,
  1520. get_pcm_rec(spec, pin_idx)->device);
  1521. if (err < 0)
  1522. return err;
  1523. hdmi_present_sense(per_pin, 0);
  1524. }
  1525. /* add channel maps */
  1526. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1527. struct snd_pcm_chmap *chmap;
  1528. struct snd_kcontrol *kctl;
  1529. int i;
  1530. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1531. SNDRV_PCM_STREAM_PLAYBACK,
  1532. NULL, 0, pin_idx, &chmap);
  1533. if (err < 0)
  1534. return err;
  1535. /* override handlers */
  1536. chmap->private_data = codec;
  1537. kctl = chmap->kctl;
  1538. for (i = 0; i < kctl->count; i++)
  1539. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1540. kctl->info = hdmi_chmap_ctl_info;
  1541. kctl->get = hdmi_chmap_ctl_get;
  1542. kctl->put = hdmi_chmap_ctl_put;
  1543. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1544. }
  1545. return 0;
  1546. }
  1547. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1548. {
  1549. struct hdmi_spec *spec = codec->spec;
  1550. int pin_idx;
  1551. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1552. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1553. struct hdmi_eld *eld = &per_pin->sink_eld;
  1554. per_pin->codec = codec;
  1555. mutex_init(&eld->lock);
  1556. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1557. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1558. }
  1559. return 0;
  1560. }
  1561. static int generic_hdmi_init(struct hda_codec *codec)
  1562. {
  1563. struct hdmi_spec *spec = codec->spec;
  1564. int pin_idx;
  1565. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1566. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1567. hda_nid_t pin_nid = per_pin->pin_nid;
  1568. hdmi_init_pin(codec, pin_nid);
  1569. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1570. }
  1571. return 0;
  1572. }
  1573. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1574. {
  1575. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1576. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1577. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1578. }
  1579. static void hdmi_array_free(struct hdmi_spec *spec)
  1580. {
  1581. snd_array_free(&spec->pins);
  1582. snd_array_free(&spec->cvts);
  1583. snd_array_free(&spec->pcm_rec);
  1584. }
  1585. static void generic_hdmi_free(struct hda_codec *codec)
  1586. {
  1587. struct hdmi_spec *spec = codec->spec;
  1588. int pin_idx;
  1589. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1590. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1591. struct hdmi_eld *eld = &per_pin->sink_eld;
  1592. cancel_delayed_work(&per_pin->work);
  1593. snd_hda_eld_proc_free(codec, eld);
  1594. }
  1595. flush_workqueue(codec->bus->workq);
  1596. hdmi_array_free(spec);
  1597. kfree(spec);
  1598. }
  1599. #ifdef CONFIG_PM
  1600. static int generic_hdmi_resume(struct hda_codec *codec)
  1601. {
  1602. struct hdmi_spec *spec = codec->spec;
  1603. int pin_idx;
  1604. generic_hdmi_init(codec);
  1605. snd_hda_codec_resume_amp(codec);
  1606. snd_hda_codec_resume_cache(codec);
  1607. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1608. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1609. hdmi_present_sense(per_pin, 1);
  1610. }
  1611. return 0;
  1612. }
  1613. #endif
  1614. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1615. .init = generic_hdmi_init,
  1616. .free = generic_hdmi_free,
  1617. .build_pcms = generic_hdmi_build_pcms,
  1618. .build_controls = generic_hdmi_build_controls,
  1619. .unsol_event = hdmi_unsol_event,
  1620. #ifdef CONFIG_PM
  1621. .resume = generic_hdmi_resume,
  1622. #endif
  1623. };
  1624. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1625. hda_nid_t nid)
  1626. {
  1627. struct hdmi_spec *spec = codec->spec;
  1628. hda_nid_t conns[4];
  1629. int nconns;
  1630. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1631. if (nconns == spec->num_cvts &&
  1632. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1633. return;
  1634. /* override pins connection list */
  1635. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1636. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1637. }
  1638. #define INTEL_VENDOR_NID 0x08
  1639. #define INTEL_GET_VENDOR_VERB 0xf81
  1640. #define INTEL_SET_VENDOR_VERB 0x781
  1641. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1642. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1643. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1644. bool update_tree)
  1645. {
  1646. unsigned int vendor_param;
  1647. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1648. INTEL_GET_VENDOR_VERB, 0);
  1649. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1650. return;
  1651. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1652. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1653. INTEL_SET_VENDOR_VERB, vendor_param);
  1654. if (vendor_param == -1)
  1655. return;
  1656. if (update_tree)
  1657. snd_hda_codec_update_widgets(codec);
  1658. }
  1659. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1660. {
  1661. unsigned int vendor_param;
  1662. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1663. INTEL_GET_VENDOR_VERB, 0);
  1664. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1665. return;
  1666. /* enable DP1.2 mode */
  1667. vendor_param |= INTEL_EN_DP12;
  1668. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1669. INTEL_SET_VENDOR_VERB, vendor_param);
  1670. }
  1671. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1672. * Otherwise you may get severe h/w communication errors.
  1673. */
  1674. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1675. unsigned int power_state)
  1676. {
  1677. if (power_state == AC_PWRST_D0) {
  1678. intel_haswell_enable_all_pins(codec, false);
  1679. intel_haswell_fixup_enable_dp12(codec);
  1680. }
  1681. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1682. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1683. }
  1684. static int patch_generic_hdmi(struct hda_codec *codec)
  1685. {
  1686. struct hdmi_spec *spec;
  1687. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1688. if (spec == NULL)
  1689. return -ENOMEM;
  1690. codec->spec = spec;
  1691. hdmi_array_init(spec, 4);
  1692. if (codec->vendor_id == 0x80862807) {
  1693. intel_haswell_enable_all_pins(codec, true);
  1694. intel_haswell_fixup_enable_dp12(codec);
  1695. }
  1696. if (hdmi_parse_codec(codec) < 0) {
  1697. codec->spec = NULL;
  1698. kfree(spec);
  1699. return -EINVAL;
  1700. }
  1701. codec->patch_ops = generic_hdmi_patch_ops;
  1702. if (codec->vendor_id == 0x80862807)
  1703. codec->patch_ops.set_power_state = haswell_set_power_state;
  1704. generic_hdmi_init_per_pins(codec);
  1705. init_channel_allocations();
  1706. return 0;
  1707. }
  1708. /*
  1709. * Shared non-generic implementations
  1710. */
  1711. static int simple_playback_build_pcms(struct hda_codec *codec)
  1712. {
  1713. struct hdmi_spec *spec = codec->spec;
  1714. struct hda_pcm *info;
  1715. unsigned int chans;
  1716. struct hda_pcm_stream *pstr;
  1717. struct hdmi_spec_per_cvt *per_cvt;
  1718. per_cvt = get_cvt(spec, 0);
  1719. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1720. chans = get_wcaps_channels(chans);
  1721. info = snd_array_new(&spec->pcm_rec);
  1722. if (!info)
  1723. return -ENOMEM;
  1724. info->name = get_pin(spec, 0)->pcm_name;
  1725. sprintf(info->name, "HDMI 0");
  1726. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1727. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1728. *pstr = spec->pcm_playback;
  1729. pstr->nid = per_cvt->cvt_nid;
  1730. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1731. pstr->channels_max = chans;
  1732. codec->num_pcms = 1;
  1733. codec->pcm_info = info;
  1734. return 0;
  1735. }
  1736. /* unsolicited event for jack sensing */
  1737. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1738. unsigned int res)
  1739. {
  1740. snd_hda_jack_set_dirty_all(codec);
  1741. snd_hda_jack_report_sync(codec);
  1742. }
  1743. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1744. * as long as spec->pins[] is set correctly
  1745. */
  1746. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1747. static int simple_playback_build_controls(struct hda_codec *codec)
  1748. {
  1749. struct hdmi_spec *spec = codec->spec;
  1750. struct hdmi_spec_per_cvt *per_cvt;
  1751. int err;
  1752. per_cvt = get_cvt(spec, 0);
  1753. err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
  1754. per_cvt->cvt_nid);
  1755. if (err < 0)
  1756. return err;
  1757. return simple_hdmi_build_jack(codec, 0);
  1758. }
  1759. static int simple_playback_init(struct hda_codec *codec)
  1760. {
  1761. struct hdmi_spec *spec = codec->spec;
  1762. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  1763. hda_nid_t pin = per_pin->pin_nid;
  1764. snd_hda_codec_write(codec, pin, 0,
  1765. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1766. /* some codecs require to unmute the pin */
  1767. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1768. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1769. AMP_OUT_UNMUTE);
  1770. snd_hda_jack_detect_enable(codec, pin, pin);
  1771. return 0;
  1772. }
  1773. static void simple_playback_free(struct hda_codec *codec)
  1774. {
  1775. struct hdmi_spec *spec = codec->spec;
  1776. hdmi_array_free(spec);
  1777. kfree(spec);
  1778. }
  1779. /*
  1780. * Nvidia specific implementations
  1781. */
  1782. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1783. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1784. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1785. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1786. #define nvhdmi_master_con_nid_7x 0x04
  1787. #define nvhdmi_master_pin_nid_7x 0x05
  1788. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1789. /*front, rear, clfe, rear_surr */
  1790. 0x6, 0x8, 0xa, 0xc,
  1791. };
  1792. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1793. /* set audio protect on */
  1794. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1795. /* enable digital output on pin widget */
  1796. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1797. {} /* terminator */
  1798. };
  1799. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1800. /* set audio protect on */
  1801. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1802. /* enable digital output on pin widget */
  1803. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1804. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1805. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1806. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1807. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1808. {} /* terminator */
  1809. };
  1810. #ifdef LIMITED_RATE_FMT_SUPPORT
  1811. /* support only the safe format and rate */
  1812. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1813. #define SUPPORTED_MAXBPS 16
  1814. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1815. #else
  1816. /* support all rates and formats */
  1817. #define SUPPORTED_RATES \
  1818. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1819. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1820. SNDRV_PCM_RATE_192000)
  1821. #define SUPPORTED_MAXBPS 24
  1822. #define SUPPORTED_FORMATS \
  1823. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1824. #endif
  1825. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1826. {
  1827. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1828. return 0;
  1829. }
  1830. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1831. {
  1832. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1833. return 0;
  1834. }
  1835. static unsigned int channels_2_6_8[] = {
  1836. 2, 6, 8
  1837. };
  1838. static unsigned int channels_2_8[] = {
  1839. 2, 8
  1840. };
  1841. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1842. .count = ARRAY_SIZE(channels_2_6_8),
  1843. .list = channels_2_6_8,
  1844. .mask = 0,
  1845. };
  1846. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1847. .count = ARRAY_SIZE(channels_2_8),
  1848. .list = channels_2_8,
  1849. .mask = 0,
  1850. };
  1851. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1852. struct hda_codec *codec,
  1853. struct snd_pcm_substream *substream)
  1854. {
  1855. struct hdmi_spec *spec = codec->spec;
  1856. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1857. switch (codec->preset->id) {
  1858. case 0x10de0002:
  1859. case 0x10de0003:
  1860. case 0x10de0005:
  1861. case 0x10de0006:
  1862. hw_constraints_channels = &hw_constraints_2_8_channels;
  1863. break;
  1864. case 0x10de0007:
  1865. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1866. break;
  1867. default:
  1868. break;
  1869. }
  1870. if (hw_constraints_channels != NULL) {
  1871. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1872. SNDRV_PCM_HW_PARAM_CHANNELS,
  1873. hw_constraints_channels);
  1874. } else {
  1875. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1876. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1877. }
  1878. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1879. }
  1880. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1881. struct hda_codec *codec,
  1882. struct snd_pcm_substream *substream)
  1883. {
  1884. struct hdmi_spec *spec = codec->spec;
  1885. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1886. }
  1887. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1888. struct hda_codec *codec,
  1889. unsigned int stream_tag,
  1890. unsigned int format,
  1891. struct snd_pcm_substream *substream)
  1892. {
  1893. struct hdmi_spec *spec = codec->spec;
  1894. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1895. stream_tag, format, substream);
  1896. }
  1897. static const struct hda_pcm_stream simple_pcm_playback = {
  1898. .substreams = 1,
  1899. .channels_min = 2,
  1900. .channels_max = 2,
  1901. .ops = {
  1902. .open = simple_playback_pcm_open,
  1903. .close = simple_playback_pcm_close,
  1904. .prepare = simple_playback_pcm_prepare
  1905. },
  1906. };
  1907. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1908. .build_controls = simple_playback_build_controls,
  1909. .build_pcms = simple_playback_build_pcms,
  1910. .init = simple_playback_init,
  1911. .free = simple_playback_free,
  1912. .unsol_event = simple_hdmi_unsol_event,
  1913. };
  1914. static int patch_simple_hdmi(struct hda_codec *codec,
  1915. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1916. {
  1917. struct hdmi_spec *spec;
  1918. struct hdmi_spec_per_cvt *per_cvt;
  1919. struct hdmi_spec_per_pin *per_pin;
  1920. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1921. if (!spec)
  1922. return -ENOMEM;
  1923. codec->spec = spec;
  1924. hdmi_array_init(spec, 1);
  1925. spec->multiout.num_dacs = 0; /* no analog */
  1926. spec->multiout.max_channels = 2;
  1927. spec->multiout.dig_out_nid = cvt_nid;
  1928. spec->num_cvts = 1;
  1929. spec->num_pins = 1;
  1930. per_pin = snd_array_new(&spec->pins);
  1931. per_cvt = snd_array_new(&spec->cvts);
  1932. if (!per_pin || !per_cvt) {
  1933. simple_playback_free(codec);
  1934. return -ENOMEM;
  1935. }
  1936. per_cvt->cvt_nid = cvt_nid;
  1937. per_pin->pin_nid = pin_nid;
  1938. spec->pcm_playback = simple_pcm_playback;
  1939. codec->patch_ops = simple_hdmi_patch_ops;
  1940. return 0;
  1941. }
  1942. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1943. int channels)
  1944. {
  1945. unsigned int chanmask;
  1946. int chan = channels ? (channels - 1) : 1;
  1947. switch (channels) {
  1948. default:
  1949. case 0:
  1950. case 2:
  1951. chanmask = 0x00;
  1952. break;
  1953. case 4:
  1954. chanmask = 0x08;
  1955. break;
  1956. case 6:
  1957. chanmask = 0x0b;
  1958. break;
  1959. case 8:
  1960. chanmask = 0x13;
  1961. break;
  1962. }
  1963. /* Set the audio infoframe channel allocation and checksum fields. The
  1964. * channel count is computed implicitly by the hardware. */
  1965. snd_hda_codec_write(codec, 0x1, 0,
  1966. Nv_VERB_SET_Channel_Allocation, chanmask);
  1967. snd_hda_codec_write(codec, 0x1, 0,
  1968. Nv_VERB_SET_Info_Frame_Checksum,
  1969. (0x71 - chan - chanmask));
  1970. }
  1971. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1972. struct hda_codec *codec,
  1973. struct snd_pcm_substream *substream)
  1974. {
  1975. struct hdmi_spec *spec = codec->spec;
  1976. int i;
  1977. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1978. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1979. for (i = 0; i < 4; i++) {
  1980. /* set the stream id */
  1981. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1982. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1983. /* set the stream format */
  1984. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1985. AC_VERB_SET_STREAM_FORMAT, 0);
  1986. }
  1987. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  1988. * streams are disabled. */
  1989. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1990. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1991. }
  1992. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  1993. struct hda_codec *codec,
  1994. unsigned int stream_tag,
  1995. unsigned int format,
  1996. struct snd_pcm_substream *substream)
  1997. {
  1998. int chs;
  1999. unsigned int dataDCC2, channel_id;
  2000. int i;
  2001. struct hdmi_spec *spec = codec->spec;
  2002. struct hda_spdif_out *spdif;
  2003. struct hdmi_spec_per_cvt *per_cvt;
  2004. mutex_lock(&codec->spdif_mutex);
  2005. per_cvt = get_cvt(spec, 0);
  2006. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2007. chs = substream->runtime->channels;
  2008. dataDCC2 = 0x2;
  2009. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2010. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2011. snd_hda_codec_write(codec,
  2012. nvhdmi_master_con_nid_7x,
  2013. 0,
  2014. AC_VERB_SET_DIGI_CONVERT_1,
  2015. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2016. /* set the stream id */
  2017. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2018. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2019. /* set the stream format */
  2020. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2021. AC_VERB_SET_STREAM_FORMAT, format);
  2022. /* turn on again (if needed) */
  2023. /* enable and set the channel status audio/data flag */
  2024. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2025. snd_hda_codec_write(codec,
  2026. nvhdmi_master_con_nid_7x,
  2027. 0,
  2028. AC_VERB_SET_DIGI_CONVERT_1,
  2029. spdif->ctls & 0xff);
  2030. snd_hda_codec_write(codec,
  2031. nvhdmi_master_con_nid_7x,
  2032. 0,
  2033. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2034. }
  2035. for (i = 0; i < 4; i++) {
  2036. if (chs == 2)
  2037. channel_id = 0;
  2038. else
  2039. channel_id = i * 2;
  2040. /* turn off SPDIF once;
  2041. *otherwise the IEC958 bits won't be updated
  2042. */
  2043. if (codec->spdif_status_reset &&
  2044. (spdif->ctls & AC_DIG1_ENABLE))
  2045. snd_hda_codec_write(codec,
  2046. nvhdmi_con_nids_7x[i],
  2047. 0,
  2048. AC_VERB_SET_DIGI_CONVERT_1,
  2049. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2050. /* set the stream id */
  2051. snd_hda_codec_write(codec,
  2052. nvhdmi_con_nids_7x[i],
  2053. 0,
  2054. AC_VERB_SET_CHANNEL_STREAMID,
  2055. (stream_tag << 4) | channel_id);
  2056. /* set the stream format */
  2057. snd_hda_codec_write(codec,
  2058. nvhdmi_con_nids_7x[i],
  2059. 0,
  2060. AC_VERB_SET_STREAM_FORMAT,
  2061. format);
  2062. /* turn on again (if needed) */
  2063. /* enable and set the channel status audio/data flag */
  2064. if (codec->spdif_status_reset &&
  2065. (spdif->ctls & AC_DIG1_ENABLE)) {
  2066. snd_hda_codec_write(codec,
  2067. nvhdmi_con_nids_7x[i],
  2068. 0,
  2069. AC_VERB_SET_DIGI_CONVERT_1,
  2070. spdif->ctls & 0xff);
  2071. snd_hda_codec_write(codec,
  2072. nvhdmi_con_nids_7x[i],
  2073. 0,
  2074. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2075. }
  2076. }
  2077. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2078. mutex_unlock(&codec->spdif_mutex);
  2079. return 0;
  2080. }
  2081. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2082. .substreams = 1,
  2083. .channels_min = 2,
  2084. .channels_max = 8,
  2085. .nid = nvhdmi_master_con_nid_7x,
  2086. .rates = SUPPORTED_RATES,
  2087. .maxbps = SUPPORTED_MAXBPS,
  2088. .formats = SUPPORTED_FORMATS,
  2089. .ops = {
  2090. .open = simple_playback_pcm_open,
  2091. .close = nvhdmi_8ch_7x_pcm_close,
  2092. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2093. },
  2094. };
  2095. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2096. {
  2097. struct hdmi_spec *spec;
  2098. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2099. nvhdmi_master_pin_nid_7x);
  2100. if (err < 0)
  2101. return err;
  2102. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2103. /* override the PCM rates, etc, as the codec doesn't give full list */
  2104. spec = codec->spec;
  2105. spec->pcm_playback.rates = SUPPORTED_RATES;
  2106. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2107. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2108. return 0;
  2109. }
  2110. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2111. {
  2112. struct hdmi_spec *spec = codec->spec;
  2113. int err = simple_playback_build_pcms(codec);
  2114. if (!err) {
  2115. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2116. info->own_chmap = true;
  2117. }
  2118. return err;
  2119. }
  2120. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2121. {
  2122. struct hdmi_spec *spec = codec->spec;
  2123. struct hda_pcm *info;
  2124. struct snd_pcm_chmap *chmap;
  2125. int err;
  2126. err = simple_playback_build_controls(codec);
  2127. if (err < 0)
  2128. return err;
  2129. /* add channel maps */
  2130. info = get_pcm_rec(spec, 0);
  2131. err = snd_pcm_add_chmap_ctls(info->pcm,
  2132. SNDRV_PCM_STREAM_PLAYBACK,
  2133. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2134. if (err < 0)
  2135. return err;
  2136. switch (codec->preset->id) {
  2137. case 0x10de0002:
  2138. case 0x10de0003:
  2139. case 0x10de0005:
  2140. case 0x10de0006:
  2141. chmap->channel_mask = (1U << 2) | (1U << 8);
  2142. break;
  2143. case 0x10de0007:
  2144. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2145. }
  2146. return 0;
  2147. }
  2148. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2149. {
  2150. struct hdmi_spec *spec;
  2151. int err = patch_nvhdmi_2ch(codec);
  2152. if (err < 0)
  2153. return err;
  2154. spec = codec->spec;
  2155. spec->multiout.max_channels = 8;
  2156. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2157. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2158. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2159. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2160. /* Initialize the audio infoframe channel mask and checksum to something
  2161. * valid */
  2162. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2163. return 0;
  2164. }
  2165. /*
  2166. * ATI-specific implementations
  2167. *
  2168. * FIXME: we may omit the whole this and use the generic code once after
  2169. * it's confirmed to work.
  2170. */
  2171. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2172. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2173. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2174. struct hda_codec *codec,
  2175. unsigned int stream_tag,
  2176. unsigned int format,
  2177. struct snd_pcm_substream *substream)
  2178. {
  2179. struct hdmi_spec *spec = codec->spec;
  2180. struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
  2181. int chans = substream->runtime->channels;
  2182. int i, err;
  2183. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2184. substream);
  2185. if (err < 0)
  2186. return err;
  2187. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2188. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2189. /* FIXME: XXX */
  2190. for (i = 0; i < chans; i++) {
  2191. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2192. AC_VERB_SET_HDMI_CHAN_SLOT,
  2193. (i << 4) | i);
  2194. }
  2195. return 0;
  2196. }
  2197. static int patch_atihdmi(struct hda_codec *codec)
  2198. {
  2199. struct hdmi_spec *spec;
  2200. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2201. if (err < 0)
  2202. return err;
  2203. spec = codec->spec;
  2204. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2205. return 0;
  2206. }
  2207. /* VIA HDMI Implementation */
  2208. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2209. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2210. static int patch_via_hdmi(struct hda_codec *codec)
  2211. {
  2212. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2213. }
  2214. /*
  2215. * patch entries
  2216. */
  2217. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2218. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2219. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2220. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2221. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2222. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2223. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2224. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2225. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2226. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2227. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2228. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2229. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2230. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2231. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2232. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2233. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2234. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2235. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2236. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2237. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2238. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2239. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2240. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2241. /* 17 is known to be absent */
  2242. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2243. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2244. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2245. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2246. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2247. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2248. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2249. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2250. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2251. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2252. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2253. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
  2254. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2255. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2256. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2257. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2258. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2259. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2260. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2261. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2262. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2263. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2264. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2265. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2266. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2267. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2268. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2269. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2270. {} /* terminator */
  2271. };
  2272. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2273. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2274. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2275. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2276. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2277. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2278. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2279. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2280. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2281. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2282. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2283. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2284. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2285. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2286. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2287. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2288. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2289. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2290. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2291. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2292. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2293. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2294. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2295. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2296. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2297. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2298. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2299. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2300. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2301. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2302. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2303. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2304. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2305. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2306. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2307. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2308. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2309. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2310. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2311. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2312. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2313. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2314. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2315. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2316. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2317. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2318. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2319. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2320. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2321. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2322. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2323. MODULE_LICENSE("GPL");
  2324. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2325. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2326. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2327. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2328. static struct hda_codec_preset_list intel_list = {
  2329. .preset = snd_hda_preset_hdmi,
  2330. .owner = THIS_MODULE,
  2331. };
  2332. static int __init patch_hdmi_init(void)
  2333. {
  2334. return snd_hda_add_codec_preset(&intel_list);
  2335. }
  2336. static void __exit patch_hdmi_exit(void)
  2337. {
  2338. snd_hda_delete_codec_preset(&intel_list);
  2339. }
  2340. module_init(patch_hdmi_init)
  2341. module_exit(patch_hdmi_exit)