patch_cirrus.c 26 KB

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  1. /*
  2. * HD audio interface patch for Cirrus Logic CS420x chip
  3. *
  4. * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This driver is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This driver is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/slab.h>
  22. #include <linux/pci.h>
  23. #include <linux/module.h>
  24. #include <sound/core.h>
  25. #include <sound/tlv.h>
  26. #include "hda_codec.h"
  27. #include "hda_local.h"
  28. #include "hda_auto_parser.h"
  29. #include "hda_jack.h"
  30. #include "hda_generic.h"
  31. /*
  32. */
  33. struct cs_spec {
  34. struct hda_gen_spec gen;
  35. unsigned int gpio_mask;
  36. unsigned int gpio_dir;
  37. unsigned int gpio_data;
  38. unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
  39. unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
  40. /* CS421x */
  41. unsigned int spdif_detect:1;
  42. unsigned int spdif_present:1;
  43. unsigned int sense_b:1;
  44. hda_nid_t vendor_nid;
  45. };
  46. /* available models with CS420x */
  47. enum {
  48. CS420X_MBP53,
  49. CS420X_MBP55,
  50. CS420X_IMAC27,
  51. CS420X_GPIO_13,
  52. CS420X_GPIO_23,
  53. CS420X_MBP101,
  54. CS420X_MBP81,
  55. CS420X_MBA42,
  56. CS420X_AUTO,
  57. /* aliases */
  58. CS420X_IMAC27_122 = CS420X_GPIO_23,
  59. CS420X_APPLE = CS420X_GPIO_13,
  60. };
  61. /* CS421x boards */
  62. enum {
  63. CS421X_CDB4210,
  64. CS421X_SENSE_B,
  65. CS421X_STUMPY,
  66. };
  67. /* Vendor-specific processing widget */
  68. #define CS420X_VENDOR_NID 0x11
  69. #define CS_DIG_OUT1_PIN_NID 0x10
  70. #define CS_DIG_OUT2_PIN_NID 0x15
  71. #define CS_DMIC1_PIN_NID 0x0e
  72. #define CS_DMIC2_PIN_NID 0x12
  73. /* coef indices */
  74. #define IDX_SPDIF_STAT 0x0000
  75. #define IDX_SPDIF_CTL 0x0001
  76. #define IDX_ADC_CFG 0x0002
  77. /* SZC bitmask, 4 modes below:
  78. * 0 = immediate,
  79. * 1 = digital immediate, analog zero-cross
  80. * 2 = digtail & analog soft-ramp
  81. * 3 = digital soft-ramp, analog zero-cross
  82. */
  83. #define CS_COEF_ADC_SZC_MASK (3 << 0)
  84. #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
  85. #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
  86. /* PGA mode: 0 = differential, 1 = signle-ended */
  87. #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
  88. #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
  89. #define IDX_DAC_CFG 0x0003
  90. /* SZC bitmask, 4 modes below:
  91. * 0 = Immediate
  92. * 1 = zero-cross
  93. * 2 = soft-ramp
  94. * 3 = soft-ramp on zero-cross
  95. */
  96. #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
  97. #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
  98. #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
  99. #define IDX_BEEP_CFG 0x0004
  100. /* 0x0008 - test reg key */
  101. /* 0x0009 - 0x0014 -> 12 test regs */
  102. /* 0x0015 - visibility reg */
  103. /*
  104. * Cirrus Logic CS4210
  105. *
  106. * 1 DAC => HP(sense) / Speakers,
  107. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  108. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  109. */
  110. #define CS4210_DAC_NID 0x02
  111. #define CS4210_ADC_NID 0x03
  112. #define CS4210_VENDOR_NID 0x0B
  113. #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
  114. #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
  115. #define CS421X_IDX_DEV_CFG 0x01
  116. #define CS421X_IDX_ADC_CFG 0x02
  117. #define CS421X_IDX_DAC_CFG 0x03
  118. #define CS421X_IDX_SPK_CTL 0x04
  119. #define SPDIF_EVENT 0x04
  120. /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
  121. #define CS4213_VENDOR_NID 0x09
  122. static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
  123. {
  124. struct cs_spec *spec = codec->spec;
  125. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  126. AC_VERB_SET_COEF_INDEX, idx);
  127. return snd_hda_codec_read(codec, spec->vendor_nid, 0,
  128. AC_VERB_GET_PROC_COEF, 0);
  129. }
  130. static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
  131. unsigned int coef)
  132. {
  133. struct cs_spec *spec = codec->spec;
  134. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  135. AC_VERB_SET_COEF_INDEX, idx);
  136. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  137. AC_VERB_SET_PROC_COEF, coef);
  138. }
  139. /*
  140. * auto-mute and auto-mic switching
  141. * CS421x auto-output redirecting
  142. * HP/SPK/SPDIF
  143. */
  144. static void cs_automute(struct hda_codec *codec)
  145. {
  146. struct cs_spec *spec = codec->spec;
  147. /* mute HPs if spdif jack (SENSE_B) is present */
  148. spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
  149. snd_hda_gen_update_outputs(codec);
  150. if (spec->gpio_eapd_hp) {
  151. spec->gpio_data = spec->gen.hp_jack_present ?
  152. spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
  153. snd_hda_codec_write(codec, 0x01, 0,
  154. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  155. }
  156. }
  157. static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
  158. {
  159. unsigned int val;
  160. val = snd_hda_codec_get_pincfg(codec, nid);
  161. return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
  162. }
  163. static void init_input_coef(struct hda_codec *codec)
  164. {
  165. struct cs_spec *spec = codec->spec;
  166. unsigned int coef;
  167. /* CS420x has multiple ADC, CS421x has single ADC */
  168. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  169. coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
  170. if (is_active_pin(codec, CS_DMIC2_PIN_NID))
  171. coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
  172. if (is_active_pin(codec, CS_DMIC1_PIN_NID))
  173. coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
  174. * No effect if SPDIF_OUT2 is
  175. * selected in IDX_SPDIF_CTL.
  176. */
  177. cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
  178. }
  179. }
  180. static const struct hda_verb cs_coef_init_verbs[] = {
  181. {0x11, AC_VERB_SET_PROC_STATE, 1},
  182. {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
  183. {0x11, AC_VERB_SET_PROC_COEF,
  184. (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
  185. | 0x0040 /* Mute DACs on FIFO error */
  186. | 0x1000 /* Enable DACs High Pass Filter */
  187. | 0x0400 /* Disable Coefficient Auto increment */
  188. )},
  189. /* ADC1/2 - Digital and Analog Soft Ramp */
  190. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  191. {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
  192. /* Beep */
  193. {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
  194. {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
  195. {} /* terminator */
  196. };
  197. /* Errata: CS4207 rev C0/C1/C2 Silicon
  198. *
  199. * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
  200. *
  201. * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
  202. * may be excessive (up to an additional 200 μA), which is most easily
  203. * observed while the part is being held in reset (RESET# active low).
  204. *
  205. * Root Cause: At initial powerup of the device, the logic that drives
  206. * the clock and write enable to the S/PDIF SRC RAMs is not properly
  207. * initialized.
  208. * Certain random patterns will cause a steady leakage current in those
  209. * RAM cells. The issue will resolve once the SRCs are used (turned on).
  210. *
  211. * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
  212. * blocks, which will alleviate the issue.
  213. */
  214. static const struct hda_verb cs_errata_init_verbs[] = {
  215. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  216. {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  217. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  218. {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
  219. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  220. {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
  221. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  222. {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
  223. {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
  224. {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
  225. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  226. {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
  227. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  228. {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
  229. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  230. {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
  231. {0x11, AC_VERB_SET_PROC_STATE, 0x00},
  232. #if 0 /* Don't to set to D3 as we are in power-up sequence */
  233. {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
  234. {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
  235. /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
  236. #endif
  237. {} /* terminator */
  238. };
  239. /* SPDIF setup */
  240. static void init_digital_coef(struct hda_codec *codec)
  241. {
  242. unsigned int coef;
  243. coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
  244. coef |= 0x0008; /* Replace with mute on error */
  245. if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
  246. coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
  247. * SPDIF_OUT2 is shared with GPIO1 and
  248. * DMIC_SDA2.
  249. */
  250. cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
  251. }
  252. static int cs_init(struct hda_codec *codec)
  253. {
  254. struct cs_spec *spec = codec->spec;
  255. /* init_verb sequence for C0/C1/C2 errata*/
  256. snd_hda_sequence_write(codec, cs_errata_init_verbs);
  257. snd_hda_sequence_write(codec, cs_coef_init_verbs);
  258. snd_hda_gen_init(codec);
  259. if (spec->gpio_mask) {
  260. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  261. spec->gpio_mask);
  262. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  263. spec->gpio_dir);
  264. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  265. spec->gpio_data);
  266. }
  267. init_input_coef(codec);
  268. init_digital_coef(codec);
  269. return 0;
  270. }
  271. #define cs_free snd_hda_gen_free
  272. static const struct hda_codec_ops cs_patch_ops = {
  273. .build_controls = snd_hda_gen_build_controls,
  274. .build_pcms = snd_hda_gen_build_pcms,
  275. .init = cs_init,
  276. .free = cs_free,
  277. .unsol_event = snd_hda_jack_unsol_event,
  278. };
  279. static int cs_parse_auto_config(struct hda_codec *codec)
  280. {
  281. struct cs_spec *spec = codec->spec;
  282. int err;
  283. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  284. if (err < 0)
  285. return err;
  286. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  287. if (err < 0)
  288. return err;
  289. return 0;
  290. }
  291. static const struct hda_model_fixup cs420x_models[] = {
  292. { .id = CS420X_MBP53, .name = "mbp53" },
  293. { .id = CS420X_MBP55, .name = "mbp55" },
  294. { .id = CS420X_IMAC27, .name = "imac27" },
  295. { .id = CS420X_IMAC27_122, .name = "imac27_122" },
  296. { .id = CS420X_APPLE, .name = "apple" },
  297. { .id = CS420X_MBP101, .name = "mbp101" },
  298. { .id = CS420X_MBP81, .name = "mbp81" },
  299. { .id = CS420X_MBA42, .name = "mba42" },
  300. {}
  301. };
  302. static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
  303. SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
  304. SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
  305. SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
  306. SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
  307. /* this conflicts with too many other models */
  308. /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
  309. /* codec SSID */
  310. SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
  311. SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
  312. SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
  313. SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
  314. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
  315. {} /* terminator */
  316. };
  317. static const struct hda_pintbl mbp53_pincfgs[] = {
  318. { 0x09, 0x012b4050 },
  319. { 0x0a, 0x90100141 },
  320. { 0x0b, 0x90100140 },
  321. { 0x0c, 0x018b3020 },
  322. { 0x0d, 0x90a00110 },
  323. { 0x0e, 0x400000f0 },
  324. { 0x0f, 0x01cbe030 },
  325. { 0x10, 0x014be060 },
  326. { 0x12, 0x400000f0 },
  327. { 0x15, 0x400000f0 },
  328. {} /* terminator */
  329. };
  330. static const struct hda_pintbl mbp55_pincfgs[] = {
  331. { 0x09, 0x012b4030 },
  332. { 0x0a, 0x90100121 },
  333. { 0x0b, 0x90100120 },
  334. { 0x0c, 0x400000f0 },
  335. { 0x0d, 0x90a00110 },
  336. { 0x0e, 0x400000f0 },
  337. { 0x0f, 0x400000f0 },
  338. { 0x10, 0x014be040 },
  339. { 0x12, 0x400000f0 },
  340. { 0x15, 0x400000f0 },
  341. {} /* terminator */
  342. };
  343. static const struct hda_pintbl imac27_pincfgs[] = {
  344. { 0x09, 0x012b4050 },
  345. { 0x0a, 0x90100140 },
  346. { 0x0b, 0x90100142 },
  347. { 0x0c, 0x018b3020 },
  348. { 0x0d, 0x90a00110 },
  349. { 0x0e, 0x400000f0 },
  350. { 0x0f, 0x01cbe030 },
  351. { 0x10, 0x014be060 },
  352. { 0x12, 0x01ab9070 },
  353. { 0x15, 0x400000f0 },
  354. {} /* terminator */
  355. };
  356. static const struct hda_pintbl mbp101_pincfgs[] = {
  357. { 0x0d, 0x40ab90f0 },
  358. { 0x0e, 0x90a600f0 },
  359. { 0x12, 0x50a600f0 },
  360. {} /* terminator */
  361. };
  362. static const struct hda_pintbl mba42_pincfgs[] = {
  363. { 0x09, 0x012b4030 }, /* HP */
  364. { 0x0a, 0x400000f0 },
  365. { 0x0b, 0x90100120 }, /* speaker */
  366. { 0x0c, 0x400000f0 },
  367. { 0x0d, 0x90a00110 }, /* mic */
  368. { 0x0e, 0x400000f0 },
  369. { 0x0f, 0x400000f0 },
  370. { 0x10, 0x400000f0 },
  371. { 0x12, 0x400000f0 },
  372. { 0x15, 0x400000f0 },
  373. {} /* terminator */
  374. };
  375. static void cs420x_fixup_gpio_13(struct hda_codec *codec,
  376. const struct hda_fixup *fix, int action)
  377. {
  378. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  379. struct cs_spec *spec = codec->spec;
  380. spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
  381. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  382. spec->gpio_mask = spec->gpio_dir =
  383. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  384. }
  385. }
  386. static void cs420x_fixup_gpio_23(struct hda_codec *codec,
  387. const struct hda_fixup *fix, int action)
  388. {
  389. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  390. struct cs_spec *spec = codec->spec;
  391. spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
  392. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  393. spec->gpio_mask = spec->gpio_dir =
  394. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  395. }
  396. }
  397. static const struct hda_fixup cs420x_fixups[] = {
  398. [CS420X_MBP53] = {
  399. .type = HDA_FIXUP_PINS,
  400. .v.pins = mbp53_pincfgs,
  401. .chained = true,
  402. .chain_id = CS420X_APPLE,
  403. },
  404. [CS420X_MBP55] = {
  405. .type = HDA_FIXUP_PINS,
  406. .v.pins = mbp55_pincfgs,
  407. .chained = true,
  408. .chain_id = CS420X_GPIO_13,
  409. },
  410. [CS420X_IMAC27] = {
  411. .type = HDA_FIXUP_PINS,
  412. .v.pins = imac27_pincfgs,
  413. .chained = true,
  414. .chain_id = CS420X_GPIO_13,
  415. },
  416. [CS420X_GPIO_13] = {
  417. .type = HDA_FIXUP_FUNC,
  418. .v.func = cs420x_fixup_gpio_13,
  419. },
  420. [CS420X_GPIO_23] = {
  421. .type = HDA_FIXUP_FUNC,
  422. .v.func = cs420x_fixup_gpio_23,
  423. },
  424. [CS420X_MBP101] = {
  425. .type = HDA_FIXUP_PINS,
  426. .v.pins = mbp101_pincfgs,
  427. .chained = true,
  428. .chain_id = CS420X_GPIO_13,
  429. },
  430. [CS420X_MBP81] = {
  431. .type = HDA_FIXUP_VERBS,
  432. .v.verbs = (const struct hda_verb[]) {
  433. /* internal mic ADC2: right only, single ended */
  434. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  435. {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
  436. {}
  437. },
  438. .chained = true,
  439. .chain_id = CS420X_GPIO_13,
  440. },
  441. [CS420X_MBA42] = {
  442. .type = HDA_FIXUP_PINS,
  443. .v.pins = mba42_pincfgs,
  444. .chained = true,
  445. .chain_id = CS420X_GPIO_13,
  446. },
  447. };
  448. static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
  449. {
  450. struct cs_spec *spec;
  451. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  452. if (!spec)
  453. return NULL;
  454. codec->spec = spec;
  455. spec->vendor_nid = vendor_nid;
  456. snd_hda_gen_spec_init(&spec->gen);
  457. return spec;
  458. }
  459. static int patch_cs420x(struct hda_codec *codec)
  460. {
  461. struct cs_spec *spec;
  462. int err;
  463. spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
  464. if (!spec)
  465. return -ENOMEM;
  466. spec->gen.automute_hook = cs_automute;
  467. snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
  468. cs420x_fixups);
  469. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  470. err = cs_parse_auto_config(codec);
  471. if (err < 0)
  472. goto error;
  473. codec->patch_ops = cs_patch_ops;
  474. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  475. return 0;
  476. error:
  477. cs_free(codec);
  478. return err;
  479. }
  480. /*
  481. * Cirrus Logic CS4210
  482. *
  483. * 1 DAC => HP(sense) / Speakers,
  484. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  485. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  486. */
  487. /* CS4210 board names */
  488. static const struct hda_model_fixup cs421x_models[] = {
  489. { .id = CS421X_CDB4210, .name = "cdb4210" },
  490. { .id = CS421X_STUMPY, .name = "stumpy" },
  491. {}
  492. };
  493. static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
  494. /* Test Intel board + CDB2410 */
  495. SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
  496. {} /* terminator */
  497. };
  498. /* CS4210 board pinconfigs */
  499. /* Default CS4210 (CDB4210)*/
  500. static const struct hda_pintbl cdb4210_pincfgs[] = {
  501. { 0x05, 0x0321401f },
  502. { 0x06, 0x90170010 },
  503. { 0x07, 0x03813031 },
  504. { 0x08, 0xb7a70037 },
  505. { 0x09, 0xb7a6003e },
  506. { 0x0a, 0x034510f0 },
  507. {} /* terminator */
  508. };
  509. /* Stumpy ChromeBox */
  510. static const struct hda_pintbl stumpy_pincfgs[] = {
  511. { 0x05, 0x022120f0 },
  512. { 0x06, 0x901700f0 },
  513. { 0x07, 0x02a120f0 },
  514. { 0x08, 0x77a70037 },
  515. { 0x09, 0x77a6003e },
  516. { 0x0a, 0x434510f0 },
  517. {} /* terminator */
  518. };
  519. /* Setup GPIO/SENSE for each board (if used) */
  520. static void cs421x_fixup_sense_b(struct hda_codec *codec,
  521. const struct hda_fixup *fix, int action)
  522. {
  523. struct cs_spec *spec = codec->spec;
  524. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  525. spec->sense_b = 1;
  526. }
  527. static const struct hda_fixup cs421x_fixups[] = {
  528. [CS421X_CDB4210] = {
  529. .type = HDA_FIXUP_PINS,
  530. .v.pins = cdb4210_pincfgs,
  531. .chained = true,
  532. .chain_id = CS421X_SENSE_B,
  533. },
  534. [CS421X_SENSE_B] = {
  535. .type = HDA_FIXUP_FUNC,
  536. .v.func = cs421x_fixup_sense_b,
  537. },
  538. [CS421X_STUMPY] = {
  539. .type = HDA_FIXUP_PINS,
  540. .v.pins = stumpy_pincfgs,
  541. },
  542. };
  543. static const struct hda_verb cs421x_coef_init_verbs[] = {
  544. {0x0B, AC_VERB_SET_PROC_STATE, 1},
  545. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
  546. /*
  547. Disable Coefficient Index Auto-Increment(DAI)=1,
  548. PDREF=0
  549. */
  550. {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
  551. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
  552. /* ADC SZCMode = Digital Soft Ramp */
  553. {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
  554. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
  555. {0x0B, AC_VERB_SET_PROC_COEF,
  556. (0x0002 /* DAC SZCMode = Digital Soft Ramp */
  557. | 0x0004 /* Mute DAC on FIFO error */
  558. | 0x0008 /* Enable DAC High Pass Filter */
  559. )},
  560. {} /* terminator */
  561. };
  562. /* Errata: CS4210 rev A1 Silicon
  563. *
  564. * http://www.cirrus.com/en/pubs/errata/
  565. *
  566. * Description:
  567. * 1. Performance degredation is present in the ADC.
  568. * 2. Speaker output is not completely muted upon HP detect.
  569. * 3. Noise is present when clipping occurs on the amplified
  570. * speaker outputs.
  571. *
  572. * Workaround:
  573. * The following verb sequence written to the registers during
  574. * initialization will correct the issues listed above.
  575. */
  576. static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
  577. {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  578. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
  579. {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
  580. {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
  581. {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
  582. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
  583. {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
  584. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
  585. {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
  586. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
  587. {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
  588. {} /* terminator */
  589. };
  590. /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
  591. static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
  592. static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
  593. struct snd_ctl_elem_info *uinfo)
  594. {
  595. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  596. uinfo->count = 1;
  597. uinfo->value.integer.min = 0;
  598. uinfo->value.integer.max = 3;
  599. return 0;
  600. }
  601. static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
  602. struct snd_ctl_elem_value *ucontrol)
  603. {
  604. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  605. ucontrol->value.integer.value[0] =
  606. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
  607. return 0;
  608. }
  609. static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
  610. struct snd_ctl_elem_value *ucontrol)
  611. {
  612. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  613. unsigned int vol = ucontrol->value.integer.value[0];
  614. unsigned int coef =
  615. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
  616. unsigned int original_coef = coef;
  617. coef &= ~0x0003;
  618. coef |= (vol & 0x0003);
  619. if (original_coef == coef)
  620. return 0;
  621. else {
  622. cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
  623. return 1;
  624. }
  625. }
  626. static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
  627. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  628. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  629. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  630. .name = "Speaker Boost Playback Volume",
  631. .info = cs421x_boost_vol_info,
  632. .get = cs421x_boost_vol_get,
  633. .put = cs421x_boost_vol_put,
  634. .tlv = { .p = cs421x_speaker_boost_db_scale },
  635. };
  636. static void cs4210_pinmux_init(struct hda_codec *codec)
  637. {
  638. struct cs_spec *spec = codec->spec;
  639. unsigned int def_conf, coef;
  640. /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
  641. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  642. if (spec->gpio_mask)
  643. coef |= 0x0008; /* B1,B2 are GPIOs */
  644. else
  645. coef &= ~0x0008;
  646. if (spec->sense_b)
  647. coef |= 0x0010; /* B2 is SENSE_B, not inverted */
  648. else
  649. coef &= ~0x0010;
  650. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  651. if ((spec->gpio_mask || spec->sense_b) &&
  652. is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
  653. /*
  654. GPIO or SENSE_B forced - disconnect the DMIC pin.
  655. */
  656. def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
  657. def_conf &= ~AC_DEFCFG_PORT_CONN;
  658. def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
  659. snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
  660. }
  661. }
  662. static void cs4210_spdif_automute(struct hda_codec *codec,
  663. struct hda_jack_tbl *tbl)
  664. {
  665. struct cs_spec *spec = codec->spec;
  666. bool spdif_present = false;
  667. hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
  668. /* detect on spdif is specific to CS4210 */
  669. if (!spec->spdif_detect ||
  670. spec->vendor_nid != CS4210_VENDOR_NID)
  671. return;
  672. spdif_present = snd_hda_jack_detect(codec, spdif_pin);
  673. if (spdif_present == spec->spdif_present)
  674. return;
  675. spec->spdif_present = spdif_present;
  676. /* SPDIF TX on/off */
  677. if (spdif_present)
  678. snd_hda_set_pin_ctl(codec, spdif_pin,
  679. spdif_present ? PIN_OUT : 0);
  680. cs_automute(codec);
  681. }
  682. static void parse_cs421x_digital(struct hda_codec *codec)
  683. {
  684. struct cs_spec *spec = codec->spec;
  685. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  686. int i;
  687. for (i = 0; i < cfg->dig_outs; i++) {
  688. hda_nid_t nid = cfg->dig_out_pins[i];
  689. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
  690. spec->spdif_detect = 1;
  691. snd_hda_jack_detect_enable_callback(codec, nid,
  692. SPDIF_EVENT,
  693. cs4210_spdif_automute);
  694. }
  695. }
  696. }
  697. static int cs421x_init(struct hda_codec *codec)
  698. {
  699. struct cs_spec *spec = codec->spec;
  700. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  701. snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
  702. snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
  703. cs4210_pinmux_init(codec);
  704. }
  705. snd_hda_gen_init(codec);
  706. if (spec->gpio_mask) {
  707. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  708. spec->gpio_mask);
  709. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  710. spec->gpio_dir);
  711. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  712. spec->gpio_data);
  713. }
  714. init_input_coef(codec);
  715. cs4210_spdif_automute(codec, NULL);
  716. return 0;
  717. }
  718. static int cs421x_build_controls(struct hda_codec *codec)
  719. {
  720. struct cs_spec *spec = codec->spec;
  721. int err;
  722. err = snd_hda_gen_build_controls(codec);
  723. if (err < 0)
  724. return err;
  725. if (spec->gen.autocfg.speaker_outs &&
  726. spec->vendor_nid == CS4210_VENDOR_NID) {
  727. err = snd_hda_ctl_add(codec, 0,
  728. snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
  729. if (err < 0)
  730. return err;
  731. }
  732. return 0;
  733. }
  734. static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
  735. {
  736. unsigned int caps;
  737. /* set the upper-limit for mixer amp to 0dB */
  738. caps = query_amp_caps(codec, dac, HDA_OUTPUT);
  739. caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
  740. caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
  741. << AC_AMPCAP_NUM_STEPS_SHIFT;
  742. snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
  743. }
  744. static int cs421x_parse_auto_config(struct hda_codec *codec)
  745. {
  746. struct cs_spec *spec = codec->spec;
  747. hda_nid_t dac = CS4210_DAC_NID;
  748. int err;
  749. fix_volume_caps(codec, dac);
  750. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  751. if (err < 0)
  752. return err;
  753. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  754. if (err < 0)
  755. return err;
  756. parse_cs421x_digital(codec);
  757. return 0;
  758. }
  759. #ifdef CONFIG_PM
  760. /*
  761. Manage PDREF, when transitioning to D3hot
  762. (DAC,ADC) -> D3, PDREF=1, AFG->D3
  763. */
  764. static int cs421x_suspend(struct hda_codec *codec)
  765. {
  766. struct cs_spec *spec = codec->spec;
  767. unsigned int coef;
  768. snd_hda_shutup_pins(codec);
  769. snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
  770. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  771. snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
  772. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  773. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  774. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  775. coef |= 0x0004; /* PDREF */
  776. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  777. }
  778. return 0;
  779. }
  780. #endif
  781. static const struct hda_codec_ops cs421x_patch_ops = {
  782. .build_controls = cs421x_build_controls,
  783. .build_pcms = snd_hda_gen_build_pcms,
  784. .init = cs421x_init,
  785. .free = cs_free,
  786. .unsol_event = snd_hda_jack_unsol_event,
  787. #ifdef CONFIG_PM
  788. .suspend = cs421x_suspend,
  789. #endif
  790. };
  791. static int patch_cs4210(struct hda_codec *codec)
  792. {
  793. struct cs_spec *spec;
  794. int err;
  795. spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
  796. if (!spec)
  797. return -ENOMEM;
  798. spec->gen.automute_hook = cs_automute;
  799. snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
  800. cs421x_fixups);
  801. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  802. /*
  803. Update the GPIO/DMIC/SENSE_B pinmux before the configuration
  804. is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
  805. is disabled.
  806. */
  807. cs4210_pinmux_init(codec);
  808. err = cs421x_parse_auto_config(codec);
  809. if (err < 0)
  810. goto error;
  811. codec->patch_ops = cs421x_patch_ops;
  812. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  813. return 0;
  814. error:
  815. cs_free(codec);
  816. return err;
  817. }
  818. static int patch_cs4213(struct hda_codec *codec)
  819. {
  820. struct cs_spec *spec;
  821. int err;
  822. spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
  823. if (!spec)
  824. return -ENOMEM;
  825. err = cs421x_parse_auto_config(codec);
  826. if (err < 0)
  827. goto error;
  828. codec->patch_ops = cs421x_patch_ops;
  829. return 0;
  830. error:
  831. cs_free(codec);
  832. return err;
  833. }
  834. /*
  835. * patch entries
  836. */
  837. static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
  838. { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
  839. { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
  840. { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
  841. { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
  842. {} /* terminator */
  843. };
  844. MODULE_ALIAS("snd-hda-codec-id:10134206");
  845. MODULE_ALIAS("snd-hda-codec-id:10134207");
  846. MODULE_ALIAS("snd-hda-codec-id:10134210");
  847. MODULE_ALIAS("snd-hda-codec-id:10134213");
  848. MODULE_LICENSE("GPL");
  849. MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
  850. static struct hda_codec_preset_list cirrus_list = {
  851. .preset = snd_hda_preset_cirrus,
  852. .owner = THIS_MODULE,
  853. };
  854. static int __init patch_cirrus_init(void)
  855. {
  856. return snd_hda_add_codec_preset(&cirrus_list);
  857. }
  858. static void __exit patch_cirrus_exit(void)
  859. {
  860. snd_hda_delete_codec_preset(&cirrus_list);
  861. }
  862. module_init(patch_cirrus_init)
  863. module_exit(patch_cirrus_exit)