omapdss.h 34 KB

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  1. /*
  2. * Copyright (C) 2008 Nokia Corporation
  3. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __OMAP_OMAPDSS_H
  18. #define __OMAP_OMAPDSS_H
  19. #include <linux/list.h>
  20. #include <linux/kobject.h>
  21. #include <linux/device.h>
  22. #include <linux/interrupt.h>
  23. #include <video/videomode.h>
  24. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  25. #define DISPC_IRQ_VSYNC (1 << 1)
  26. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  27. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  28. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  29. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  30. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  31. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  32. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  33. #define DISPC_IRQ_OCP_ERR (1 << 9)
  34. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  35. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  36. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  37. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  38. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  39. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  40. #define DISPC_IRQ_WAKEUP (1 << 16)
  41. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  42. #define DISPC_IRQ_VSYNC2 (1 << 18)
  43. #define DISPC_IRQ_VID3_END_WIN (1 << 19)
  44. #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
  45. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  46. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  47. #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
  48. #define DISPC_IRQ_FRAMEDONETV (1 << 24)
  49. #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
  50. #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
  51. #define DISPC_IRQ_VSYNC3 (1 << 28)
  52. #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
  53. #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
  54. struct omap_dss_device;
  55. struct omap_overlay_manager;
  56. struct dss_lcd_mgr_config;
  57. struct snd_aes_iec958;
  58. struct snd_cea_861_aud_if;
  59. enum omap_display_type {
  60. OMAP_DISPLAY_TYPE_NONE = 0,
  61. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  62. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  63. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  64. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  65. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  66. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  67. OMAP_DISPLAY_TYPE_DVI = 1 << 6,
  68. };
  69. enum omap_plane {
  70. OMAP_DSS_GFX = 0,
  71. OMAP_DSS_VIDEO1 = 1,
  72. OMAP_DSS_VIDEO2 = 2,
  73. OMAP_DSS_VIDEO3 = 3,
  74. OMAP_DSS_WB = 4,
  75. };
  76. enum omap_channel {
  77. OMAP_DSS_CHANNEL_LCD = 0,
  78. OMAP_DSS_CHANNEL_DIGIT = 1,
  79. OMAP_DSS_CHANNEL_LCD2 = 2,
  80. OMAP_DSS_CHANNEL_LCD3 = 3,
  81. };
  82. enum omap_color_mode {
  83. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  84. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  85. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  86. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  87. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  88. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  89. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  90. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  91. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  92. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  93. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  94. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  95. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  96. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  97. OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
  98. OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
  99. OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
  100. OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
  101. OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
  102. };
  103. enum omap_dss_load_mode {
  104. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  105. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  106. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  107. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  108. };
  109. enum omap_dss_trans_key_type {
  110. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  111. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  112. };
  113. enum omap_rfbi_te_mode {
  114. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  115. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  116. };
  117. enum omap_dss_signal_level {
  118. OMAPDSS_SIG_ACTIVE_HIGH = 0,
  119. OMAPDSS_SIG_ACTIVE_LOW = 1,
  120. };
  121. enum omap_dss_signal_edge {
  122. OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  123. OMAPDSS_DRIVE_SIG_RISING_EDGE,
  124. OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  125. };
  126. enum omap_dss_venc_type {
  127. OMAP_DSS_VENC_TYPE_COMPOSITE,
  128. OMAP_DSS_VENC_TYPE_SVIDEO,
  129. };
  130. enum omap_dss_dsi_pixel_format {
  131. OMAP_DSS_DSI_FMT_RGB888,
  132. OMAP_DSS_DSI_FMT_RGB666,
  133. OMAP_DSS_DSI_FMT_RGB666_PACKED,
  134. OMAP_DSS_DSI_FMT_RGB565,
  135. };
  136. enum omap_dss_dsi_mode {
  137. OMAP_DSS_DSI_CMD_MODE = 0,
  138. OMAP_DSS_DSI_VIDEO_MODE,
  139. };
  140. enum omap_display_caps {
  141. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  142. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  143. };
  144. enum omap_dss_display_state {
  145. OMAP_DSS_DISPLAY_DISABLED = 0,
  146. OMAP_DSS_DISPLAY_ACTIVE,
  147. };
  148. enum omap_dss_audio_state {
  149. OMAP_DSS_AUDIO_DISABLED = 0,
  150. OMAP_DSS_AUDIO_ENABLED,
  151. OMAP_DSS_AUDIO_CONFIGURED,
  152. OMAP_DSS_AUDIO_PLAYING,
  153. };
  154. struct omap_dss_audio {
  155. struct snd_aes_iec958 *iec;
  156. struct snd_cea_861_aud_if *cea;
  157. };
  158. enum omap_dss_rotation_type {
  159. OMAP_DSS_ROT_DMA = 1 << 0,
  160. OMAP_DSS_ROT_VRFB = 1 << 1,
  161. OMAP_DSS_ROT_TILER = 1 << 2,
  162. };
  163. /* clockwise rotation angle */
  164. enum omap_dss_rotation_angle {
  165. OMAP_DSS_ROT_0 = 0,
  166. OMAP_DSS_ROT_90 = 1,
  167. OMAP_DSS_ROT_180 = 2,
  168. OMAP_DSS_ROT_270 = 3,
  169. };
  170. enum omap_overlay_caps {
  171. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  172. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
  173. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
  174. OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
  175. OMAP_DSS_OVL_CAP_POS = 1 << 4,
  176. OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
  177. };
  178. enum omap_overlay_manager_caps {
  179. OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
  180. };
  181. enum omap_dss_clk_source {
  182. OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
  183. * OMAP4: DSS_FCLK */
  184. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
  185. * OMAP4: PLL1_CLK1 */
  186. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
  187. * OMAP4: PLL1_CLK2 */
  188. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
  189. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
  190. };
  191. enum omap_hdmi_flags {
  192. OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
  193. };
  194. enum omap_dss_output_id {
  195. OMAP_DSS_OUTPUT_DPI = 1 << 0,
  196. OMAP_DSS_OUTPUT_DBI = 1 << 1,
  197. OMAP_DSS_OUTPUT_SDI = 1 << 2,
  198. OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
  199. OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
  200. OMAP_DSS_OUTPUT_VENC = 1 << 5,
  201. OMAP_DSS_OUTPUT_HDMI = 1 << 6,
  202. };
  203. /* RFBI */
  204. struct rfbi_timings {
  205. int cs_on_time;
  206. int cs_off_time;
  207. int we_on_time;
  208. int we_off_time;
  209. int re_on_time;
  210. int re_off_time;
  211. int we_cycle_time;
  212. int re_cycle_time;
  213. int cs_pulse_width;
  214. int access_time;
  215. int clk_div;
  216. u32 tim[5]; /* set by rfbi_convert_timings() */
  217. int converted;
  218. };
  219. void omap_rfbi_write_command(const void *buf, u32 len);
  220. void omap_rfbi_read_data(void *buf, u32 len);
  221. void omap_rfbi_write_data(const void *buf, u32 len);
  222. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  223. u16 x, u16 y,
  224. u16 w, u16 h);
  225. int omap_rfbi_enable_te(bool enable, unsigned line);
  226. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  227. unsigned hs_pulse_time, unsigned vs_pulse_time,
  228. int hs_pol_inv, int vs_pol_inv, int extif_div);
  229. void rfbi_bus_lock(void);
  230. void rfbi_bus_unlock(void);
  231. /* DSI */
  232. enum omap_dss_dsi_trans_mode {
  233. /* Sync Pulses: both sync start and end packets sent */
  234. OMAP_DSS_DSI_PULSE_MODE,
  235. /* Sync Events: only sync start packets sent */
  236. OMAP_DSS_DSI_EVENT_MODE,
  237. /* Burst: only sync start packets sent, pixels are time compressed */
  238. OMAP_DSS_DSI_BURST_MODE,
  239. };
  240. struct omap_dss_dsi_videomode_timings {
  241. unsigned long hsclk;
  242. unsigned ndl;
  243. unsigned bitspp;
  244. /* pixels */
  245. u16 hact;
  246. /* lines */
  247. u16 vact;
  248. /* DSI video mode blanking data */
  249. /* Unit: byte clock cycles */
  250. u16 hss;
  251. u16 hsa;
  252. u16 hse;
  253. u16 hfp;
  254. u16 hbp;
  255. /* Unit: line clocks */
  256. u16 vsa;
  257. u16 vfp;
  258. u16 vbp;
  259. /* DSI blanking modes */
  260. int blanking_mode;
  261. int hsa_blanking_mode;
  262. int hbp_blanking_mode;
  263. int hfp_blanking_mode;
  264. enum omap_dss_dsi_trans_mode trans_mode;
  265. bool ddr_clk_always_on;
  266. int window_sync;
  267. };
  268. struct omap_dss_dsi_config {
  269. enum omap_dss_dsi_mode mode;
  270. enum omap_dss_dsi_pixel_format pixel_format;
  271. const struct omap_video_timings *timings;
  272. unsigned long hs_clk_min, hs_clk_max;
  273. unsigned long lp_clk_min, lp_clk_max;
  274. bool ddr_clk_always_on;
  275. enum omap_dss_dsi_trans_mode trans_mode;
  276. };
  277. void dsi_bus_lock(struct omap_dss_device *dssdev);
  278. void dsi_bus_unlock(struct omap_dss_device *dssdev);
  279. int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
  280. int len);
  281. int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
  282. int len);
  283. int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
  284. int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
  285. int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  286. u8 param);
  287. int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
  288. u8 param);
  289. int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
  290. u8 param1, u8 param2);
  291. int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
  292. u8 *data, int len);
  293. int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
  294. u8 *data, int len);
  295. int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  296. u8 *buf, int buflen);
  297. int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
  298. int buflen);
  299. int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
  300. u8 *buf, int buflen);
  301. int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
  302. u8 param1, u8 param2, u8 *buf, int buflen);
  303. int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
  304. u16 len);
  305. int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
  306. int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
  307. int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
  308. void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
  309. enum omapdss_version {
  310. OMAPDSS_VER_UNKNOWN = 0,
  311. OMAPDSS_VER_OMAP24xx,
  312. OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
  313. OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
  314. OMAPDSS_VER_OMAP3630,
  315. OMAPDSS_VER_AM35xx,
  316. OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
  317. OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
  318. OMAPDSS_VER_OMAP4, /* All other OMAP4s */
  319. OMAPDSS_VER_OMAP5,
  320. };
  321. /* Board specific data */
  322. struct omap_dss_board_info {
  323. int (*get_context_loss_count)(struct device *dev);
  324. int num_devices;
  325. struct omap_dss_device **devices;
  326. struct omap_dss_device *default_device;
  327. const char *default_display_name;
  328. int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
  329. void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
  330. int (*set_min_bus_tput)(struct device *dev, unsigned long r);
  331. enum omapdss_version version;
  332. };
  333. /* Init with the board info */
  334. extern int omap_display_init(struct omap_dss_board_info *board_data);
  335. /* HDMI mux init*/
  336. extern int omap_hdmi_init(enum omap_hdmi_flags flags);
  337. struct omap_video_timings {
  338. /* Unit: pixels */
  339. u16 x_res;
  340. /* Unit: pixels */
  341. u16 y_res;
  342. /* Unit: KHz */
  343. u32 pixel_clock;
  344. /* Unit: pixel clocks */
  345. u16 hsw; /* Horizontal synchronization pulse width */
  346. /* Unit: pixel clocks */
  347. u16 hfp; /* Horizontal front porch */
  348. /* Unit: pixel clocks */
  349. u16 hbp; /* Horizontal back porch */
  350. /* Unit: line clocks */
  351. u16 vsw; /* Vertical synchronization pulse width */
  352. /* Unit: line clocks */
  353. u16 vfp; /* Vertical front porch */
  354. /* Unit: line clocks */
  355. u16 vbp; /* Vertical back porch */
  356. /* Vsync logic level */
  357. enum omap_dss_signal_level vsync_level;
  358. /* Hsync logic level */
  359. enum omap_dss_signal_level hsync_level;
  360. /* Interlaced or Progressive timings */
  361. bool interlace;
  362. /* Pixel clock edge to drive LCD data */
  363. enum omap_dss_signal_edge data_pclk_edge;
  364. /* Data enable logic level */
  365. enum omap_dss_signal_level de_level;
  366. /* Pixel clock edges to drive HSYNC and VSYNC signals */
  367. enum omap_dss_signal_edge sync_pclk_edge;
  368. };
  369. #ifdef CONFIG_OMAP2_DSS_VENC
  370. /* Hardcoded timings for tv modes. Venc only uses these to
  371. * identify the mode, and does not actually use the configs
  372. * itself. However, the configs should be something that
  373. * a normal monitor can also show */
  374. extern const struct omap_video_timings omap_dss_pal_timings;
  375. extern const struct omap_video_timings omap_dss_ntsc_timings;
  376. #endif
  377. struct omap_dss_cpr_coefs {
  378. s16 rr, rg, rb;
  379. s16 gr, gg, gb;
  380. s16 br, bg, bb;
  381. };
  382. struct omap_overlay_info {
  383. u32 paddr;
  384. u32 p_uv_addr; /* for NV12 format */
  385. u16 screen_width;
  386. u16 width;
  387. u16 height;
  388. enum omap_color_mode color_mode;
  389. u8 rotation;
  390. enum omap_dss_rotation_type rotation_type;
  391. bool mirror;
  392. u16 pos_x;
  393. u16 pos_y;
  394. u16 out_width; /* if 0, out_width == width */
  395. u16 out_height; /* if 0, out_height == height */
  396. u8 global_alpha;
  397. u8 pre_mult_alpha;
  398. u8 zorder;
  399. };
  400. struct omap_overlay {
  401. struct kobject kobj;
  402. struct list_head list;
  403. /* static fields */
  404. const char *name;
  405. enum omap_plane id;
  406. enum omap_color_mode supported_modes;
  407. enum omap_overlay_caps caps;
  408. /* dynamic fields */
  409. struct omap_overlay_manager *manager;
  410. /*
  411. * The following functions do not block:
  412. *
  413. * is_enabled
  414. * set_overlay_info
  415. * get_overlay_info
  416. *
  417. * The rest of the functions may block and cannot be called from
  418. * interrupt context
  419. */
  420. int (*enable)(struct omap_overlay *ovl);
  421. int (*disable)(struct omap_overlay *ovl);
  422. bool (*is_enabled)(struct omap_overlay *ovl);
  423. int (*set_manager)(struct omap_overlay *ovl,
  424. struct omap_overlay_manager *mgr);
  425. int (*unset_manager)(struct omap_overlay *ovl);
  426. int (*set_overlay_info)(struct omap_overlay *ovl,
  427. struct omap_overlay_info *info);
  428. void (*get_overlay_info)(struct omap_overlay *ovl,
  429. struct omap_overlay_info *info);
  430. int (*wait_for_go)(struct omap_overlay *ovl);
  431. struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
  432. };
  433. struct omap_overlay_manager_info {
  434. u32 default_color;
  435. enum omap_dss_trans_key_type trans_key_type;
  436. u32 trans_key;
  437. bool trans_enabled;
  438. bool partial_alpha_enabled;
  439. bool cpr_enable;
  440. struct omap_dss_cpr_coefs cpr_coefs;
  441. };
  442. struct omap_overlay_manager {
  443. struct kobject kobj;
  444. /* static fields */
  445. const char *name;
  446. enum omap_channel id;
  447. enum omap_overlay_manager_caps caps;
  448. struct list_head overlays;
  449. enum omap_display_type supported_displays;
  450. enum omap_dss_output_id supported_outputs;
  451. /* dynamic fields */
  452. struct omap_dss_device *output;
  453. /*
  454. * The following functions do not block:
  455. *
  456. * set_manager_info
  457. * get_manager_info
  458. * apply
  459. *
  460. * The rest of the functions may block and cannot be called from
  461. * interrupt context
  462. */
  463. int (*set_output)(struct omap_overlay_manager *mgr,
  464. struct omap_dss_device *output);
  465. int (*unset_output)(struct omap_overlay_manager *mgr);
  466. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  467. struct omap_overlay_manager_info *info);
  468. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  469. struct omap_overlay_manager_info *info);
  470. int (*apply)(struct omap_overlay_manager *mgr);
  471. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  472. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  473. struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
  474. };
  475. /* 22 pins means 1 clk lane and 10 data lanes */
  476. #define OMAP_DSS_MAX_DSI_PINS 22
  477. struct omap_dsi_pin_config {
  478. int num_pins;
  479. /*
  480. * pin numbers in the following order:
  481. * clk+, clk-
  482. * data1+, data1-
  483. * data2+, data2-
  484. * ...
  485. */
  486. int pins[OMAP_DSS_MAX_DSI_PINS];
  487. };
  488. struct omap_dss_writeback_info {
  489. u32 paddr;
  490. u32 p_uv_addr;
  491. u16 buf_width;
  492. u16 width;
  493. u16 height;
  494. enum omap_color_mode color_mode;
  495. u8 rotation;
  496. enum omap_dss_rotation_type rotation_type;
  497. bool mirror;
  498. u8 pre_mult_alpha;
  499. };
  500. struct omapdss_dpi_ops {
  501. int (*connect)(struct omap_dss_device *dssdev,
  502. struct omap_dss_device *dst);
  503. void (*disconnect)(struct omap_dss_device *dssdev,
  504. struct omap_dss_device *dst);
  505. int (*enable)(struct omap_dss_device *dssdev);
  506. void (*disable)(struct omap_dss_device *dssdev);
  507. int (*check_timings)(struct omap_dss_device *dssdev,
  508. struct omap_video_timings *timings);
  509. void (*set_timings)(struct omap_dss_device *dssdev,
  510. struct omap_video_timings *timings);
  511. void (*get_timings)(struct omap_dss_device *dssdev,
  512. struct omap_video_timings *timings);
  513. void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
  514. };
  515. struct omapdss_sdi_ops {
  516. int (*connect)(struct omap_dss_device *dssdev,
  517. struct omap_dss_device *dst);
  518. void (*disconnect)(struct omap_dss_device *dssdev,
  519. struct omap_dss_device *dst);
  520. int (*enable)(struct omap_dss_device *dssdev);
  521. void (*disable)(struct omap_dss_device *dssdev);
  522. int (*check_timings)(struct omap_dss_device *dssdev,
  523. struct omap_video_timings *timings);
  524. void (*set_timings)(struct omap_dss_device *dssdev,
  525. struct omap_video_timings *timings);
  526. void (*get_timings)(struct omap_dss_device *dssdev,
  527. struct omap_video_timings *timings);
  528. void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
  529. };
  530. struct omapdss_dvi_ops {
  531. int (*connect)(struct omap_dss_device *dssdev,
  532. struct omap_dss_device *dst);
  533. void (*disconnect)(struct omap_dss_device *dssdev,
  534. struct omap_dss_device *dst);
  535. int (*enable)(struct omap_dss_device *dssdev);
  536. void (*disable)(struct omap_dss_device *dssdev);
  537. int (*check_timings)(struct omap_dss_device *dssdev,
  538. struct omap_video_timings *timings);
  539. void (*set_timings)(struct omap_dss_device *dssdev,
  540. struct omap_video_timings *timings);
  541. void (*get_timings)(struct omap_dss_device *dssdev,
  542. struct omap_video_timings *timings);
  543. };
  544. struct omapdss_atv_ops {
  545. int (*connect)(struct omap_dss_device *dssdev,
  546. struct omap_dss_device *dst);
  547. void (*disconnect)(struct omap_dss_device *dssdev,
  548. struct omap_dss_device *dst);
  549. int (*enable)(struct omap_dss_device *dssdev);
  550. void (*disable)(struct omap_dss_device *dssdev);
  551. int (*check_timings)(struct omap_dss_device *dssdev,
  552. struct omap_video_timings *timings);
  553. void (*set_timings)(struct omap_dss_device *dssdev,
  554. struct omap_video_timings *timings);
  555. void (*get_timings)(struct omap_dss_device *dssdev,
  556. struct omap_video_timings *timings);
  557. void (*set_type)(struct omap_dss_device *dssdev,
  558. enum omap_dss_venc_type type);
  559. void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
  560. bool invert_polarity);
  561. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  562. u32 (*get_wss)(struct omap_dss_device *dssdev);
  563. };
  564. struct omapdss_hdmi_ops {
  565. int (*connect)(struct omap_dss_device *dssdev,
  566. struct omap_dss_device *dst);
  567. void (*disconnect)(struct omap_dss_device *dssdev,
  568. struct omap_dss_device *dst);
  569. int (*enable)(struct omap_dss_device *dssdev);
  570. void (*disable)(struct omap_dss_device *dssdev);
  571. int (*check_timings)(struct omap_dss_device *dssdev,
  572. struct omap_video_timings *timings);
  573. void (*set_timings)(struct omap_dss_device *dssdev,
  574. struct omap_video_timings *timings);
  575. void (*get_timings)(struct omap_dss_device *dssdev,
  576. struct omap_video_timings *timings);
  577. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  578. bool (*detect)(struct omap_dss_device *dssdev);
  579. /*
  580. * Note: These functions might sleep. Do not call while
  581. * holding a spinlock/readlock.
  582. */
  583. int (*audio_enable)(struct omap_dss_device *dssdev);
  584. void (*audio_disable)(struct omap_dss_device *dssdev);
  585. bool (*audio_supported)(struct omap_dss_device *dssdev);
  586. int (*audio_config)(struct omap_dss_device *dssdev,
  587. struct omap_dss_audio *audio);
  588. /* Note: These functions may not sleep */
  589. int (*audio_start)(struct omap_dss_device *dssdev);
  590. void (*audio_stop)(struct omap_dss_device *dssdev);
  591. };
  592. struct omapdss_dsi_ops {
  593. int (*connect)(struct omap_dss_device *dssdev,
  594. struct omap_dss_device *dst);
  595. void (*disconnect)(struct omap_dss_device *dssdev,
  596. struct omap_dss_device *dst);
  597. int (*enable)(struct omap_dss_device *dssdev);
  598. void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
  599. bool enter_ulps);
  600. /* bus configuration */
  601. int (*set_config)(struct omap_dss_device *dssdev,
  602. const struct omap_dss_dsi_config *cfg);
  603. int (*configure_pins)(struct omap_dss_device *dssdev,
  604. const struct omap_dsi_pin_config *pin_cfg);
  605. void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
  606. bool enable);
  607. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  608. int (*update)(struct omap_dss_device *dssdev, int channel,
  609. void (*callback)(int, void *), void *data);
  610. void (*bus_lock)(struct omap_dss_device *dssdev);
  611. void (*bus_unlock)(struct omap_dss_device *dssdev);
  612. int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
  613. void (*disable_video_output)(struct omap_dss_device *dssdev,
  614. int channel);
  615. int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
  616. int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
  617. int vc_id);
  618. void (*release_vc)(struct omap_dss_device *dssdev, int channel);
  619. /* data transfer */
  620. int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
  621. u8 *data, int len);
  622. int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
  623. u8 *data, int len);
  624. int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  625. u8 *data, int len);
  626. int (*gen_write)(struct omap_dss_device *dssdev, int channel,
  627. u8 *data, int len);
  628. int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
  629. u8 *data, int len);
  630. int (*gen_read)(struct omap_dss_device *dssdev, int channel,
  631. u8 *reqdata, int reqlen,
  632. u8 *data, int len);
  633. int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
  634. int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
  635. int channel, u16 plen);
  636. };
  637. struct omap_dss_device {
  638. /* old device, to be removed */
  639. struct device old_dev;
  640. /* new device, pointer to panel device */
  641. struct device *dev;
  642. struct module *owner;
  643. struct list_head panel_list;
  644. /* alias in the form of "display%d" */
  645. char alias[16];
  646. enum omap_display_type type;
  647. enum omap_display_type output_type;
  648. /* obsolete, to be removed */
  649. enum omap_channel channel;
  650. union {
  651. struct {
  652. u8 data_lines;
  653. } dpi;
  654. struct {
  655. u8 channel;
  656. u8 data_lines;
  657. } rfbi;
  658. struct {
  659. u8 datapairs;
  660. } sdi;
  661. struct {
  662. int module;
  663. } dsi;
  664. struct {
  665. enum omap_dss_venc_type type;
  666. bool invert_polarity;
  667. } venc;
  668. } phy;
  669. struct {
  670. struct omap_video_timings timings;
  671. enum omap_dss_dsi_pixel_format dsi_pix_fmt;
  672. enum omap_dss_dsi_mode dsi_mode;
  673. } panel;
  674. struct {
  675. u8 pixel_size;
  676. struct rfbi_timings rfbi_timings;
  677. } ctrl;
  678. const char *name;
  679. /* used to match device to driver */
  680. const char *driver_name;
  681. void *data;
  682. struct omap_dss_driver *driver;
  683. union {
  684. const struct omapdss_dpi_ops *dpi;
  685. const struct omapdss_sdi_ops *sdi;
  686. const struct omapdss_dvi_ops *dvi;
  687. const struct omapdss_hdmi_ops *hdmi;
  688. const struct omapdss_atv_ops *atv;
  689. const struct omapdss_dsi_ops *dsi;
  690. } ops;
  691. /* helper variable for driver suspend/resume */
  692. bool activate_after_resume;
  693. enum omap_display_caps caps;
  694. struct omap_dss_device *output;
  695. enum omap_dss_display_state state;
  696. enum omap_dss_audio_state audio_state;
  697. /* OMAP DSS output specific fields */
  698. struct list_head list;
  699. /* DISPC channel for this output */
  700. enum omap_channel dispc_channel;
  701. /* output instance */
  702. enum omap_dss_output_id id;
  703. /* dynamic fields */
  704. struct omap_overlay_manager *manager;
  705. struct omap_dss_device *device;
  706. };
  707. struct omap_dss_hdmi_data
  708. {
  709. int ct_cp_hpd_gpio;
  710. int ls_oe_gpio;
  711. int hpd_gpio;
  712. };
  713. struct omap_dss_driver {
  714. struct device_driver driver;
  715. int (*probe)(struct omap_dss_device *);
  716. void (*remove)(struct omap_dss_device *);
  717. int (*connect)(struct omap_dss_device *dssdev);
  718. void (*disconnect)(struct omap_dss_device *dssdev);
  719. int (*enable)(struct omap_dss_device *display);
  720. void (*disable)(struct omap_dss_device *display);
  721. int (*run_test)(struct omap_dss_device *display, int test);
  722. int (*update)(struct omap_dss_device *dssdev,
  723. u16 x, u16 y, u16 w, u16 h);
  724. int (*sync)(struct omap_dss_device *dssdev);
  725. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  726. int (*get_te)(struct omap_dss_device *dssdev);
  727. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  728. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  729. bool (*get_mirror)(struct omap_dss_device *dssdev);
  730. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  731. int (*memory_read)(struct omap_dss_device *dssdev,
  732. void *buf, size_t size,
  733. u16 x, u16 y, u16 w, u16 h);
  734. void (*get_resolution)(struct omap_dss_device *dssdev,
  735. u16 *xres, u16 *yres);
  736. void (*get_dimensions)(struct omap_dss_device *dssdev,
  737. u32 *width, u32 *height);
  738. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  739. int (*check_timings)(struct omap_dss_device *dssdev,
  740. struct omap_video_timings *timings);
  741. void (*set_timings)(struct omap_dss_device *dssdev,
  742. struct omap_video_timings *timings);
  743. void (*get_timings)(struct omap_dss_device *dssdev,
  744. struct omap_video_timings *timings);
  745. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  746. u32 (*get_wss)(struct omap_dss_device *dssdev);
  747. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  748. bool (*detect)(struct omap_dss_device *dssdev);
  749. /*
  750. * For display drivers that support audio. This encompasses
  751. * HDMI and DisplayPort at the moment.
  752. */
  753. /*
  754. * Note: These functions might sleep. Do not call while
  755. * holding a spinlock/readlock.
  756. */
  757. int (*audio_enable)(struct omap_dss_device *dssdev);
  758. void (*audio_disable)(struct omap_dss_device *dssdev);
  759. bool (*audio_supported)(struct omap_dss_device *dssdev);
  760. int (*audio_config)(struct omap_dss_device *dssdev,
  761. struct omap_dss_audio *audio);
  762. /* Note: These functions may not sleep */
  763. int (*audio_start)(struct omap_dss_device *dssdev);
  764. void (*audio_stop)(struct omap_dss_device *dssdev);
  765. };
  766. enum omapdss_version omapdss_get_version(void);
  767. bool omapdss_is_initialized(void);
  768. int omap_dss_register_driver(struct omap_dss_driver *);
  769. void omap_dss_unregister_driver(struct omap_dss_driver *);
  770. int omapdss_register_display(struct omap_dss_device *dssdev);
  771. void omapdss_unregister_display(struct omap_dss_device *dssdev);
  772. struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
  773. void omap_dss_put_device(struct omap_dss_device *dssdev);
  774. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  775. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  776. struct omap_dss_device *omap_dss_find_device(void *data,
  777. int (*match)(struct omap_dss_device *dssdev, void *data));
  778. const char *omapdss_get_default_display_name(void);
  779. void videomode_to_omap_video_timings(const struct videomode *vm,
  780. struct omap_video_timings *ovt);
  781. void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
  782. struct videomode *vm);
  783. int dss_feat_get_num_mgrs(void);
  784. int dss_feat_get_num_ovls(void);
  785. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
  786. enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
  787. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
  788. int omap_dss_get_num_overlay_managers(void);
  789. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  790. int omap_dss_get_num_overlays(void);
  791. struct omap_overlay *omap_dss_get_overlay(int num);
  792. int omapdss_register_output(struct omap_dss_device *output);
  793. void omapdss_unregister_output(struct omap_dss_device *output);
  794. struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
  795. struct omap_dss_device *omap_dss_find_output(const char *name);
  796. struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
  797. int omapdss_output_set_device(struct omap_dss_device *out,
  798. struct omap_dss_device *dssdev);
  799. int omapdss_output_unset_device(struct omap_dss_device *out);
  800. struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
  801. struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
  802. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  803. u16 *xres, u16 *yres);
  804. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  805. void omapdss_default_get_timings(struct omap_dss_device *dssdev,
  806. struct omap_video_timings *timings);
  807. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  808. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  809. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  810. u32 dispc_read_irqstatus(void);
  811. void dispc_clear_irqstatus(u32 mask);
  812. u32 dispc_read_irqenable(void);
  813. void dispc_write_irqenable(u32 mask);
  814. int dispc_request_irq(irq_handler_t handler, void *dev_id);
  815. void dispc_free_irq(void *dev_id);
  816. int dispc_runtime_get(void);
  817. void dispc_runtime_put(void);
  818. void dispc_mgr_enable(enum omap_channel channel, bool enable);
  819. bool dispc_mgr_is_enabled(enum omap_channel channel);
  820. u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
  821. u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
  822. u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
  823. bool dispc_mgr_go_busy(enum omap_channel channel);
  824. void dispc_mgr_go(enum omap_channel channel);
  825. void dispc_mgr_set_lcd_config(enum omap_channel channel,
  826. const struct dss_lcd_mgr_config *config);
  827. void dispc_mgr_set_timings(enum omap_channel channel,
  828. const struct omap_video_timings *timings);
  829. void dispc_mgr_setup(enum omap_channel channel,
  830. const struct omap_overlay_manager_info *info);
  831. int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
  832. const struct omap_overlay_info *oi,
  833. const struct omap_video_timings *timings,
  834. int *x_predecim, int *y_predecim);
  835. int dispc_ovl_enable(enum omap_plane plane, bool enable);
  836. bool dispc_ovl_enabled(enum omap_plane plane);
  837. void dispc_ovl_set_channel_out(enum omap_plane plane,
  838. enum omap_channel channel);
  839. int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
  840. bool replication, const struct omap_video_timings *mgr_timings,
  841. bool mem_to_mem);
  842. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  843. #define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
  844. void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
  845. bool enable);
  846. int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
  847. int omapdss_dsi_set_config(struct omap_dss_device *dssdev,
  848. const struct omap_dss_dsi_config *config);
  849. int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
  850. void (*callback)(int, void *), void *data);
  851. int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
  852. int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
  853. void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
  854. int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev,
  855. const struct omap_dsi_pin_config *pin_cfg);
  856. int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
  857. void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
  858. bool disconnect_lanes, bool enter_ulps);
  859. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
  860. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
  861. void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
  862. struct omap_video_timings *timings);
  863. int dpi_check_timings(struct omap_dss_device *dssdev,
  864. struct omap_video_timings *timings);
  865. void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines);
  866. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  867. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  868. void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
  869. struct omap_video_timings *timings);
  870. void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
  871. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  872. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  873. int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
  874. void *data);
  875. int omap_rfbi_configure(struct omap_dss_device *dssdev);
  876. void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
  877. void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
  878. int pixel_size);
  879. void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
  880. int data_lines);
  881. void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
  882. struct rfbi_timings *timings);
  883. int omapdss_compat_init(void);
  884. void omapdss_compat_uninit(void);
  885. struct dss_mgr_ops {
  886. int (*connect)(struct omap_overlay_manager *mgr,
  887. struct omap_dss_device *dst);
  888. void (*disconnect)(struct omap_overlay_manager *mgr,
  889. struct omap_dss_device *dst);
  890. void (*start_update)(struct omap_overlay_manager *mgr);
  891. int (*enable)(struct omap_overlay_manager *mgr);
  892. void (*disable)(struct omap_overlay_manager *mgr);
  893. void (*set_timings)(struct omap_overlay_manager *mgr,
  894. const struct omap_video_timings *timings);
  895. void (*set_lcd_config)(struct omap_overlay_manager *mgr,
  896. const struct dss_lcd_mgr_config *config);
  897. int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
  898. void (*handler)(void *), void *data);
  899. void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
  900. void (*handler)(void *), void *data);
  901. };
  902. int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
  903. void dss_uninstall_mgr_ops(void);
  904. int dss_mgr_connect(struct omap_overlay_manager *mgr,
  905. struct omap_dss_device *dst);
  906. void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
  907. struct omap_dss_device *dst);
  908. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  909. const struct omap_video_timings *timings);
  910. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  911. const struct dss_lcd_mgr_config *config);
  912. int dss_mgr_enable(struct omap_overlay_manager *mgr);
  913. void dss_mgr_disable(struct omap_overlay_manager *mgr);
  914. void dss_mgr_start_update(struct omap_overlay_manager *mgr);
  915. int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
  916. void (*handler)(void *), void *data);
  917. void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
  918. void (*handler)(void *), void *data);
  919. static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
  920. {
  921. return dssdev->output;
  922. }
  923. static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
  924. {
  925. return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
  926. }
  927. #endif